process.cc revision 6400:b7fd31c84c99
16019Shines@cs.fsu.edu/* 212509Schuan.zhu@arm.com * Copyright (c) 2007-2008 The Florida State University 37189Sgblack@eecs.umich.edu * All rights reserved. 47189Sgblack@eecs.umich.edu * 57189Sgblack@eecs.umich.edu * Redistribution and use in source and binary forms, with or without 67189Sgblack@eecs.umich.edu * modification, are permitted provided that the following conditions are 77189Sgblack@eecs.umich.edu * met: redistributions of source code must retain the above copyright 87189Sgblack@eecs.umich.edu * notice, this list of conditions and the following disclaimer; 97189Sgblack@eecs.umich.edu * redistributions in binary form must reproduce the above copyright 107189Sgblack@eecs.umich.edu * notice, this list of conditions and the following disclaimer in the 117189Sgblack@eecs.umich.edu * documentation and/or other materials provided with the distribution; 127189Sgblack@eecs.umich.edu * neither the name of the copyright holders nor the names of its 137189Sgblack@eecs.umich.edu * contributors may be used to endorse or promote products derived from 146019Shines@cs.fsu.edu * this software without specific prior written permission. 156019Shines@cs.fsu.edu * 166019Shines@cs.fsu.edu * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 176019Shines@cs.fsu.edu * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 186019Shines@cs.fsu.edu * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 196019Shines@cs.fsu.edu * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 206019Shines@cs.fsu.edu * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 216019Shines@cs.fsu.edu * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 226019Shines@cs.fsu.edu * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 236019Shines@cs.fsu.edu * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 246019Shines@cs.fsu.edu * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 256019Shines@cs.fsu.edu * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 266019Shines@cs.fsu.edu * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 276019Shines@cs.fsu.edu * 286019Shines@cs.fsu.edu * Authors: Stephen Hines 296019Shines@cs.fsu.edu */ 306019Shines@cs.fsu.edu 316019Shines@cs.fsu.edu#include "arch/arm/isa_traits.hh" 326019Shines@cs.fsu.edu#include "arch/arm/process.hh" 336019Shines@cs.fsu.edu#include "arch/arm/types.hh" 346019Shines@cs.fsu.edu#include "base/loader/elf_object.hh" 356019Shines@cs.fsu.edu#include "base/loader/object_file.hh" 366019Shines@cs.fsu.edu#include "base/misc.hh" 376019Shines@cs.fsu.edu#include "cpu/thread_context.hh" 386019Shines@cs.fsu.edu#include "mem/page_table.hh" 396019Shines@cs.fsu.edu#include "mem/translating_port.hh" 406019Shines@cs.fsu.edu#include "sim/process_impl.hh" 416735Sgblack@eecs.umich.edu#include "sim/system.hh" 426735Sgblack@eecs.umich.edu 4310037SARM gem5 Developersusing namespace std; 4410037SARM gem5 Developersusing namespace ArmISA; 456019Shines@cs.fsu.edu 466019Shines@cs.fsu.eduArmLiveProcess::ArmLiveProcess(LiveProcessParams *params, ObjectFile *objFile) 476019Shines@cs.fsu.edu : LiveProcess(params, objFile) 486019Shines@cs.fsu.edu{ 496019Shines@cs.fsu.edu stack_base = 0xbf000000L; 507362Sgblack@eecs.umich.edu 5110037SARM gem5 Developers // Set pointer for next thread stack. Reserve 8M for main stack. 526735Sgblack@eecs.umich.edu next_thread_stack_base = stack_base - (8 * 1024 * 1024); 5312334Sgabeblack@google.com 546019Shines@cs.fsu.edu // Set up break point (Top of Heap) 558782Sgblack@eecs.umich.edu brk_point = objFile->dataBase() + objFile->dataSize() + objFile->bssSize(); 566019Shines@cs.fsu.edu brk_point = roundUp(brk_point, VMPageSize); 576019Shines@cs.fsu.edu 586019Shines@cs.fsu.edu // Set up region for mmaps. For now, start at bottom of kuseg space. 596019Shines@cs.fsu.edu mmap_start = mmap_end = 0x70000000L; 606019Shines@cs.fsu.edu} 6111294Sandreas.hansson@arm.com 626019Shines@cs.fsu.eduvoid 637362Sgblack@eecs.umich.eduArmLiveProcess::startup() 646019Shines@cs.fsu.edu{ 656019Shines@cs.fsu.edu argsInit(MachineBytes, VMPageSize); 6610037SARM gem5 Developers} 6710037SARM gem5 Developers 6810037SARM gem5 Developersvoid 6910037SARM gem5 DevelopersArmLiveProcess::copyStringArray32(std::vector<std::string> &strings, 7010037SARM gem5 Developers Addr array_ptr, Addr data_ptr, 7110037SARM gem5 Developers TranslatingPort* memPort) 7210037SARM gem5 Developers{ 7310037SARM gem5 Developers Addr data_ptr_swap; 7410037SARM gem5 Developers for (int i = 0; i < strings.size(); ++i) { 7510037SARM gem5 Developers data_ptr_swap = htog(data_ptr); 7612402Sgiacomo.travaglini@arm.com memPort->writeBlob(array_ptr, (uint8_t*)&data_ptr_swap, 7712402Sgiacomo.travaglini@arm.com sizeof(uint32_t)); 786735Sgblack@eecs.umich.edu memPort->writeString(data_ptr, strings[i].c_str()); 7910037SARM gem5 Developers array_ptr += sizeof(uint32_t); 806735Sgblack@eecs.umich.edu data_ptr += strings[i].size() + 1; 816019Shines@cs.fsu.edu } 8210037SARM gem5 Developers // add NULL terminator 8310037SARM gem5 Developers data_ptr = 0; 8410037SARM gem5 Developers 8510037SARM gem5 Developers memPort->writeBlob(array_ptr, (uint8_t*)&data_ptr, sizeof(uint32_t)); 8610037SARM gem5 Developers} 877362Sgblack@eecs.umich.edu 8810037SARM gem5 Developersvoid 8910037SARM gem5 DevelopersArmLiveProcess::argsInit(int intSize, int pageSize) 9010037SARM gem5 Developers{ 9110037SARM gem5 Developers typedef AuxVector<uint32_t> auxv_t; 9210037SARM gem5 Developers std::vector<auxv_t> auxv; 9310037SARM gem5 Developers 9410037SARM gem5 Developers string filename; 9510037SARM gem5 Developers if (argv.size() < 1) 9610037SARM gem5 Developers filename = ""; 9710037SARM gem5 Developers else 9810037SARM gem5 Developers filename = argv[0]; 9910037SARM gem5 Developers 10010037SARM gem5 Developers //We want 16 byte alignment 10110037SARM gem5 Developers uint64_t align = 16; 10210037SARM gem5 Developers 1037611SGene.Wu@arm.com // Overloaded argsInit so that we can fine-tune for ARM architecture 10410037SARM gem5 Developers Process::startup(); 10510037SARM gem5 Developers 10610037SARM gem5 Developers // load object file into target memory 10710037SARM gem5 Developers objFile->loadSections(initVirtMem); 10810037SARM gem5 Developers 10910037SARM gem5 Developers enum ArmCpuFeature { 11010037SARM gem5 Developers Arm_Swp = 1 << 0, 11110037SARM gem5 Developers Arm_Half = 1 << 1, 11210037SARM gem5 Developers Arm_Thumb = 1 << 2, 11310037SARM gem5 Developers Arm_26Bit = 1 << 3, 11410037SARM gem5 Developers Arm_FastMult = 1 << 4, 11510037SARM gem5 Developers Arm_Fpa = 1 << 5, 11610037SARM gem5 Developers Arm_Vfp = 1 << 6, 11710037SARM gem5 Developers Arm_Edsp = 1 << 7, 11810037SARM gem5 Developers Arm_Java = 1 << 8, 11910037SARM gem5 Developers Arm_Iwmmxt = 1 << 9, 12010037SARM gem5 Developers Arm_Crunch = 1 << 10 12110037SARM gem5 Developers }; 12210037SARM gem5 Developers 12310037SARM gem5 Developers //Setup the auxilliary vectors. These will already have endian conversion. 12410037SARM gem5 Developers //Auxilliary vectors are loaded only for elf formatted executables. 12510037SARM gem5 Developers ElfObject * elfObject = dynamic_cast<ElfObject *>(objFile); 12610037SARM gem5 Developers if (elfObject) { 12710037SARM gem5 Developers uint32_t features = 12810037SARM gem5 Developers Arm_Swp | 12910037SARM gem5 Developers Arm_Half | 13010037SARM gem5 Developers Arm_Thumb | 13110037SARM gem5 Developers// Arm_26Bit | 13210037SARM gem5 Developers Arm_FastMult | 13310037SARM gem5 Developers// Arm_Fpa | 13410037SARM gem5 Developers Arm_Vfp | 13510037SARM gem5 Developers Arm_Edsp | 13610037SARM gem5 Developers Arm_Java | 13710037SARM gem5 Developers// Arm_Iwmmxt | 13810037SARM gem5 Developers// Arm_Crunch | 13910037SARM gem5 Developers 0; 14010037SARM gem5 Developers 1417362Sgblack@eecs.umich.edu //Bits which describe the system hardware capabilities 1427362Sgblack@eecs.umich.edu //XXX Figure out what these should be 1436735Sgblack@eecs.umich.edu auxv.push_back(auxv_t(M5_AT_HWCAP, features)); 1446735Sgblack@eecs.umich.edu //The system page size 1456735Sgblack@eecs.umich.edu auxv.push_back(auxv_t(M5_AT_PAGESZ, ArmISA::VMPageSize)); 14610037SARM gem5 Developers //Frequency at which times() increments 1476735Sgblack@eecs.umich.edu auxv.push_back(auxv_t(M5_AT_CLKTCK, 0x64)); 14810037SARM gem5 Developers // For statically linked executables, this is the virtual address of the 14910037SARM gem5 Developers // program header tables if they appear in the executable image 15010037SARM gem5 Developers auxv.push_back(auxv_t(M5_AT_PHDR, elfObject->programHeaderTable())); 15110037SARM gem5 Developers // This is the size of a program header entry from the elf file. 15210037SARM gem5 Developers auxv.push_back(auxv_t(M5_AT_PHENT, elfObject->programHeaderSize())); 15310037SARM gem5 Developers // This is the number of program headers from the original elf file. 15410037SARM gem5 Developers auxv.push_back(auxv_t(M5_AT_PHNUM, elfObject->programHeaderCount())); 1556735Sgblack@eecs.umich.edu //This is the address of the elf "interpreter", It should be set 15610037SARM gem5 Developers //to 0 for regular executables. It should be something else 1576735Sgblack@eecs.umich.edu //(not sure what) for dynamic libraries. 1586735Sgblack@eecs.umich.edu auxv.push_back(auxv_t(M5_AT_BASE, 0)); 15910037SARM gem5 Developers 16010037SARM gem5 Developers //XXX Figure out what this should be. 16110037SARM gem5 Developers auxv.push_back(auxv_t(M5_AT_FLAGS, 0)); 16210037SARM gem5 Developers //The entry point to the program 16310037SARM gem5 Developers auxv.push_back(auxv_t(M5_AT_ENTRY, objFile->entryPoint())); 16410037SARM gem5 Developers //Different user and group IDs 16510037SARM gem5 Developers auxv.push_back(auxv_t(M5_AT_UID, uid())); 1666735Sgblack@eecs.umich.edu auxv.push_back(auxv_t(M5_AT_EUID, euid())); 1676735Sgblack@eecs.umich.edu auxv.push_back(auxv_t(M5_AT_GID, gid())); 16810037SARM gem5 Developers auxv.push_back(auxv_t(M5_AT_EGID, egid())); 16910037SARM gem5 Developers //Whether to enable "secure mode" in the executable 17010037SARM gem5 Developers auxv.push_back(auxv_t(M5_AT_SECURE, 0)); 17110037SARM gem5 Developers //The filename of the program 17210037SARM gem5 Developers auxv.push_back(auxv_t(M5_AT_EXECFN, 0)); 1736735Sgblack@eecs.umich.edu //The string "v51" with unknown meaning 17412517Srekai.gonzalezalberquilla@arm.com auxv.push_back(auxv_t(M5_AT_PLATFORM, 0)); 17512517Srekai.gonzalezalberquilla@arm.com } 17612517Srekai.gonzalezalberquilla@arm.com 17712517Srekai.gonzalezalberquilla@arm.com //Figure out how big the initial stack nedes to be 17812517Srekai.gonzalezalberquilla@arm.com 17912517Srekai.gonzalezalberquilla@arm.com // A sentry NULL void pointer at the top of the stack. 18012517Srekai.gonzalezalberquilla@arm.com int sentry_size = intSize; 18112517Srekai.gonzalezalberquilla@arm.com 18212517Srekai.gonzalezalberquilla@arm.com string platform = "v51"; 18312517Srekai.gonzalezalberquilla@arm.com int platform_size = platform.size() + 1; 18412517Srekai.gonzalezalberquilla@arm.com 18512517Srekai.gonzalezalberquilla@arm.com // The aux vectors are put on the stack in two groups. The first group are 18612517Srekai.gonzalezalberquilla@arm.com // the vectors that are generated as the elf is loaded. The second group 18712517Srekai.gonzalezalberquilla@arm.com // are the ones that were computed ahead of time and include the platform 18812517Srekai.gonzalezalberquilla@arm.com // string. 18912517Srekai.gonzalezalberquilla@arm.com int aux_data_size = filename.size() + 1; 1906735Sgblack@eecs.umich.edu 1916735Sgblack@eecs.umich.edu int env_data_size = 0; 19210037SARM gem5 Developers for (int i = 0; i < envp.size(); ++i) { 19310537Sandreas.hansson@arm.com env_data_size += envp[i].size() + 1; 19412402Sgiacomo.travaglini@arm.com } 19510037SARM gem5 Developers int arg_data_size = 0; 19610037SARM gem5 Developers for (int i = 0; i < argv.size(); ++i) { 19710037SARM gem5 Developers arg_data_size += argv[i].size() + 1; 19810037SARM gem5 Developers } 19910037SARM gem5 Developers 20010037SARM gem5 Developers int info_block_size = 20110037SARM gem5 Developers sentry_size + env_data_size + arg_data_size + 20210037SARM gem5 Developers aux_data_size + platform_size; 20310417Sandreas.hansson@arm.com 20412176Sandreas.sandberg@arm.com //Each auxilliary vector is two 4 byte words 20510417Sandreas.hansson@arm.com int aux_array_size = intSize * 2 * (auxv.size() + 1); 20610417Sandreas.hansson@arm.com 20710037SARM gem5 Developers int envp_array_size = intSize * (envp.size() + 1); 2086735Sgblack@eecs.umich.edu int argv_array_size = intSize * (argv.size() + 1); 20910037SARM gem5 Developers 21012511Schuan.zhu@arm.com int argc_size = intSize; 2116735Sgblack@eecs.umich.edu 21210037SARM gem5 Developers //Figure out the size of the contents of the actual initial frame 21310037SARM gem5 Developers int frame_size = 21410037SARM gem5 Developers info_block_size + 21510037SARM gem5 Developers aux_array_size + 21610037SARM gem5 Developers envp_array_size + 21710037SARM gem5 Developers argv_array_size + 21810037SARM gem5 Developers argc_size; 21910037SARM gem5 Developers 22010037SARM gem5 Developers //There needs to be padding after the auxiliary vector data so that the 22110037SARM gem5 Developers //very bottom of the stack is aligned properly. 22210037SARM gem5 Developers int partial_size = frame_size; 22310037SARM gem5 Developers int aligned_partial_size = roundUp(partial_size, align); 22410037SARM gem5 Developers int aux_padding = aligned_partial_size - partial_size; 2256019Shines@cs.fsu.edu 2266019Shines@cs.fsu.edu int space_needed = frame_size + aux_padding; 2276735Sgblack@eecs.umich.edu 2287362Sgblack@eecs.umich.edu stack_min = stack_base - space_needed; 2296019Shines@cs.fsu.edu stack_min = roundDown(stack_min, align); 2306735Sgblack@eecs.umich.edu stack_size = stack_base - stack_min; 2316735Sgblack@eecs.umich.edu 2326735Sgblack@eecs.umich.edu // map memory 2336019Shines@cs.fsu.edu pTable->allocate(roundDown(stack_min, pageSize), 23410037SARM gem5 Developers roundUp(stack_size, pageSize)); 23510037SARM gem5 Developers 23612176Sandreas.sandberg@arm.com // map out initial stack contents 23712176Sandreas.sandberg@arm.com uint32_t sentry_base = stack_base - sentry_size; 23812176Sandreas.sandberg@arm.com uint32_t aux_data_base = sentry_base - aux_data_size; 23910037SARM gem5 Developers uint32_t env_data_base = aux_data_base - env_data_size; 24012511Schuan.zhu@arm.com uint32_t arg_data_base = env_data_base - arg_data_size; 24110037SARM gem5 Developers uint32_t platform_base = arg_data_base - platform_size; 24212176Sandreas.sandberg@arm.com uint32_t auxv_array_base = platform_base - aux_array_size - aux_padding; 24312176Sandreas.sandberg@arm.com uint32_t envp_array_base = auxv_array_base - envp_array_size; 24412176Sandreas.sandberg@arm.com uint32_t argv_array_base = envp_array_base - argv_array_size; 24512176Sandreas.sandberg@arm.com uint32_t argc_base = argv_array_base - argc_size; 24612176Sandreas.sandberg@arm.com 24712176Sandreas.sandberg@arm.com DPRINTF(Stack, "The addresses of items on the initial stack:\n"); 24812176Sandreas.sandberg@arm.com DPRINTF(Stack, "0x%x - aux data\n", aux_data_base); 24912176Sandreas.sandberg@arm.com DPRINTF(Stack, "0x%x - env data\n", env_data_base); 25012176Sandreas.sandberg@arm.com DPRINTF(Stack, "0x%x - arg data\n", arg_data_base); 25112176Sandreas.sandberg@arm.com DPRINTF(Stack, "0x%x - platform base\n", platform_base); 25212176Sandreas.sandberg@arm.com DPRINTF(Stack, "0x%x - auxv array\n", auxv_array_base); 25312176Sandreas.sandberg@arm.com DPRINTF(Stack, "0x%x - envp array\n", envp_array_base); 25412176Sandreas.sandberg@arm.com DPRINTF(Stack, "0x%x - argv array\n", argv_array_base); 25512176Sandreas.sandberg@arm.com DPRINTF(Stack, "0x%x - argc \n", argc_base); 25612176Sandreas.sandberg@arm.com DPRINTF(Stack, "0x%x - stack min\n", stack_min); 25712176Sandreas.sandberg@arm.com 25812176Sandreas.sandberg@arm.com // write contents to stack 25912176Sandreas.sandberg@arm.com 2606019Shines@cs.fsu.edu // figure out argc 2616019Shines@cs.fsu.edu uint32_t argc = argv.size(); 2627400SAli.Saidi@ARM.com uint32_t guestArgc = ArmISA::htog(argc); 2637400SAli.Saidi@ARM.com 2647400SAli.Saidi@ARM.com //Write out the sentry void * 26510417Sandreas.hansson@arm.com uint32_t sentry_NULL = 0; 26612176Sandreas.sandberg@arm.com initVirtMem->writeBlob(sentry_base, 2677400SAli.Saidi@ARM.com (uint8_t*)&sentry_NULL, sentry_size); 2687189Sgblack@eecs.umich.edu 2697362Sgblack@eecs.umich.edu //Fix up the aux vectors which point to other data 2707189Sgblack@eecs.umich.edu for (int i = auxv.size() - 1; i >= 0; i--) { 2717189Sgblack@eecs.umich.edu if (auxv[i].a_type == M5_AT_PLATFORM) { 2727189Sgblack@eecs.umich.edu auxv[i].a_val = platform_base; 2737640Sgblack@eecs.umich.edu initVirtMem->writeString(platform_base, platform.c_str()); 27410037SARM gem5 Developers } else if (auxv[i].a_type == M5_AT_EXECFN) { 27510205SAli.Saidi@ARM.com auxv[i].a_val = aux_data_base; 2767189Sgblack@eecs.umich.edu initVirtMem->writeString(aux_data_base, filename.c_str()); 2777189Sgblack@eecs.umich.edu } 2787189Sgblack@eecs.umich.edu } 2797189Sgblack@eecs.umich.edu 2807640Sgblack@eecs.umich.edu //Copy the aux stuff 2817640Sgblack@eecs.umich.edu for(int x = 0; x < auxv.size(); x++) 28210037SARM gem5 Developers { 28310205SAli.Saidi@ARM.com initVirtMem->writeBlob(auxv_array_base + x * 2 * intSize, 28410205SAli.Saidi@ARM.com (uint8_t*)&(auxv[x].a_type), intSize); 28510037SARM gem5 Developers initVirtMem->writeBlob(auxv_array_base + (x * 2 + 1) * intSize, 28610205SAli.Saidi@ARM.com (uint8_t*)&(auxv[x].a_val), intSize); 28710205SAli.Saidi@ARM.com } 28810037SARM gem5 Developers //Write out the terminating zeroed auxilliary vector 28910205SAli.Saidi@ARM.com const uint64_t zero = 0; 29010205SAli.Saidi@ARM.com initVirtMem->writeBlob(auxv_array_base + 2 * intSize * auxv.size(), 2918782Sgblack@eecs.umich.edu (uint8_t*)&zero, 2 * intSize); 2927189Sgblack@eecs.umich.edu 29310417Sandreas.hansson@arm.com copyStringArray(envp, envp_array_base, env_data_base, initVirtMem); 29412176Sandreas.sandberg@arm.com copyStringArray(argv, argv_array_base, arg_data_base, initVirtMem); 29512176Sandreas.sandberg@arm.com 29612176Sandreas.sandberg@arm.com initVirtMem->writeBlob(argc_base, (uint8_t*)&guestArgc, intSize); 29712176Sandreas.sandberg@arm.com 2987189Sgblack@eecs.umich.edu ThreadContext *tc = system->getThreadContext(contextIds[0]); 2997189Sgblack@eecs.umich.edu //Set the stack pointer register 3007362Sgblack@eecs.umich.edu tc->setIntReg(StackPointerReg, stack_min); 3017197Sgblack@eecs.umich.edu //A pointer to a function to run when the program exits. We'll set this 3027197Sgblack@eecs.umich.edu //to zero explicitly to make sure this isn't used. 30310037SARM gem5 Developers tc->setIntReg(ArgumentReg0, 0); 3047197Sgblack@eecs.umich.edu //Set argument regs 1 and 2 to argv[0] and envp[0] respectively 30510037SARM gem5 Developers if (argv.size() > 0) { 30610037SARM gem5 Developers tc->setIntReg(ArgumentReg1, arg_data_base + arg_data_size - 30710037SARM gem5 Developers argv[argv.size() - 1].size() - 1); 30810037SARM gem5 Developers } else { 3098782Sgblack@eecs.umich.edu tc->setIntReg(ArgumentReg1, 0); 3107197Sgblack@eecs.umich.edu } 31110417Sandreas.hansson@arm.com if (envp.size() > 0) { 31212176Sandreas.sandberg@arm.com tc->setIntReg(ArgumentReg2, env_data_base + env_data_size - 31312176Sandreas.sandberg@arm.com envp[envp.size() - 1].size() - 1); 31412176Sandreas.sandberg@arm.com } else { 31512176Sandreas.sandberg@arm.com tc->setIntReg(ArgumentReg2, 0); 31610037SARM gem5 Developers } 31710037SARM gem5 Developers 31810037SARM gem5 Developers Addr prog_entry = objFile->entryPoint(); 31910037SARM gem5 Developers tc->setPC(prog_entry); 32010037SARM gem5 Developers tc->setNextPC(prog_entry + sizeof(MachInst)); 32110037SARM gem5 Developers 32210037SARM gem5 Developers //Align the "stack_min" to a page boundary. 32310037SARM gem5 Developers stack_min = roundDown(stack_min, pageSize); 32410037SARM gem5 Developers} 32510417Sandreas.hansson@arm.com 32612176Sandreas.sandberg@arm.comArmISA::IntReg 32712176Sandreas.sandberg@arm.comArmLiveProcess::getSyscallArg(ThreadContext *tc, int i) 32812176Sandreas.sandberg@arm.com{ 32910037SARM gem5 Developers assert(i < 4); 33010037SARM gem5 Developers return tc->readIntReg(ArgumentReg0 + i); 33110037SARM gem5 Developers} 33210037SARM gem5 Developers 33310037SARM gem5 Developersvoid 33410037SARM gem5 DevelopersArmLiveProcess::setSyscallArg(ThreadContext *tc, 33510037SARM gem5 Developers int i, ArmISA::IntReg val) 33610037SARM gem5 Developers{ 33710037SARM gem5 Developers assert(i < 4); 33810037SARM gem5 Developers tc->setIntReg(ArgumentReg0 + i, val); 33910037SARM gem5 Developers} 34010037SARM gem5 Developers 34110037SARM gem5 Developersvoid 34210037SARM gem5 DevelopersArmLiveProcess::setSyscallReturn(ThreadContext *tc, 34310037SARM gem5 Developers SyscallReturn return_value) 34412509Schuan.zhu@arm.com{ 34512509Schuan.zhu@arm.com tc->setIntReg(ReturnValueReg, return_value.value()); 34612176Sandreas.sandberg@arm.com} 34710037SARM gem5 Developers