process.cc revision 6400
13170Sstever@eecs.umich.edu/* 29383SAli.Saidi@ARM.com * Copyright (c) 2007-2008 The Florida State University 39383SAli.Saidi@ARM.com * All rights reserved. 49383SAli.Saidi@ARM.com * 59383SAli.Saidi@ARM.com * Redistribution and use in source and binary forms, with or without 69383SAli.Saidi@ARM.com * modification, are permitted provided that the following conditions are 79383SAli.Saidi@ARM.com * met: redistributions of source code must retain the above copyright 89383SAli.Saidi@ARM.com * notice, this list of conditions and the following disclaimer; 99383SAli.Saidi@ARM.com * redistributions in binary form must reproduce the above copyright 109383SAli.Saidi@ARM.com * notice, this list of conditions and the following disclaimer in the 119383SAli.Saidi@ARM.com * documentation and/or other materials provided with the distribution; 129383SAli.Saidi@ARM.com * neither the name of the copyright holders nor the names of its 139383SAli.Saidi@ARM.com * contributors may be used to endorse or promote products derived from 145254Sksewell@umich.edu * this software without specific prior written permission. 155254Sksewell@umich.edu * 163170Sstever@eecs.umich.edu * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 175254Sksewell@umich.edu * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 185254Sksewell@umich.edu * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 195254Sksewell@umich.edu * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 205254Sksewell@umich.edu * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 215254Sksewell@umich.edu * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 225254Sksewell@umich.edu * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 235254Sksewell@umich.edu * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 245254Sksewell@umich.edu * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 255254Sksewell@umich.edu * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 265254Sksewell@umich.edu * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 273170Sstever@eecs.umich.edu * 285254Sksewell@umich.edu * Authors: Stephen Hines 295254Sksewell@umich.edu */ 305254Sksewell@umich.edu 315254Sksewell@umich.edu#include "arch/arm/isa_traits.hh" 325254Sksewell@umich.edu#include "arch/arm/process.hh" 335254Sksewell@umich.edu#include "arch/arm/types.hh" 345254Sksewell@umich.edu#include "base/loader/elf_object.hh" 355254Sksewell@umich.edu#include "base/loader/object_file.hh" 365254Sksewell@umich.edu#include "base/misc.hh" 375254Sksewell@umich.edu#include "cpu/thread_context.hh" 385254Sksewell@umich.edu#include "mem/page_table.hh" 393170Sstever@eecs.umich.edu#include "mem/translating_port.hh" 405254Sksewell@umich.edu#include "sim/process_impl.hh" 413170Sstever@eecs.umich.edu#include "sim/system.hh" 423170Sstever@eecs.umich.edu 433170Sstever@eecs.umich.eduusing namespace std; 443170Sstever@eecs.umich.eduusing namespace ArmISA; 453170Sstever@eecs.umich.edu 463170Sstever@eecs.umich.eduArmLiveProcess::ArmLiveProcess(LiveProcessParams *params, ObjectFile *objFile) 473170Sstever@eecs.umich.edu : LiveProcess(params, objFile) 483170Sstever@eecs.umich.edu{ 493170Sstever@eecs.umich.edu stack_base = 0xbf000000L; 503170Sstever@eecs.umich.edu 513170Sstever@eecs.umich.edu // Set pointer for next thread stack. Reserve 8M for main stack. 526329Sgblack@eecs.umich.edu next_thread_stack_base = stack_base - (8 * 1024 * 1024); 534661Sksewell@umich.edu 544661Sksewell@umich.edu // Set up break point (Top of Heap) 558232Snate@binkert.org brk_point = objFile->dataBase() + objFile->dataSize() + objFile->bssSize(); 569383SAli.Saidi@ARM.com brk_point = roundUp(brk_point, VMPageSize); 573170Sstever@eecs.umich.edu 583170Sstever@eecs.umich.edu // Set up region for mmaps. For now, start at bottom of kuseg space. 593170Sstever@eecs.umich.edu mmap_start = mmap_end = 0x70000000L; 603170Sstever@eecs.umich.edu} 619383SAli.Saidi@ARM.com 629383SAli.Saidi@ARM.comvoid 639383SAli.Saidi@ARM.comArmLiveProcess::startup() 649383SAli.Saidi@ARM.com{ 659383SAli.Saidi@ARM.com argsInit(MachineBytes, VMPageSize); 669383SAli.Saidi@ARM.com} 679383SAli.Saidi@ARM.com 689383SAli.Saidi@ARM.comvoid 6910574Sandreas.hansson@arm.comArmLiveProcess::copyStringArray32(std::vector<std::string> &strings, 709383SAli.Saidi@ARM.com Addr array_ptr, Addr data_ptr, 719383SAli.Saidi@ARM.com TranslatingPort* memPort) 729383SAli.Saidi@ARM.com{ 739383SAli.Saidi@ARM.com Addr data_ptr_swap; 749383SAli.Saidi@ARM.com for (int i = 0; i < strings.size(); ++i) { 756378Sgblack@eecs.umich.edu data_ptr_swap = htog(data_ptr); 763170Sstever@eecs.umich.edu memPort->writeBlob(array_ptr, (uint8_t*)&data_ptr_swap, 773170Sstever@eecs.umich.edu sizeof(uint32_t)); 783170Sstever@eecs.umich.edu memPort->writeString(data_ptr, strings[i].c_str()); 793170Sstever@eecs.umich.edu array_ptr += sizeof(uint32_t); 807783SGiacomo.Gabrielli@arm.com data_ptr += strings[i].size() + 1; 817783SGiacomo.Gabrielli@arm.com } 826378Sgblack@eecs.umich.edu // add NULL terminator 836378Sgblack@eecs.umich.edu data_ptr = 0; 845715Shsul@eecs.umich.edu 853170Sstever@eecs.umich.edu memPort->writeBlob(array_ptr, (uint8_t*)&data_ptr, sizeof(uint32_t)); 863170Sstever@eecs.umich.edu} 873170Sstever@eecs.umich.edu 8810030SAli.Saidi@ARM.comvoid 8910030SAli.Saidi@ARM.comArmLiveProcess::argsInit(int intSize, int pageSize) 9010030SAli.Saidi@ARM.com{ 9110030SAli.Saidi@ARM.com typedef AuxVector<uint32_t> auxv_t; 9210030SAli.Saidi@ARM.com std::vector<auxv_t> auxv; 9310030SAli.Saidi@ARM.com 943170Sstever@eecs.umich.edu string filename; 9510030SAli.Saidi@ARM.com if (argv.size() < 1) 963170Sstever@eecs.umich.edu filename = ""; 974661Sksewell@umich.edu else 984661Sksewell@umich.edu filename = argv[0]; 994661Sksewell@umich.edu 1004661Sksewell@umich.edu //We want 16 byte alignment 1014661Sksewell@umich.edu uint64_t align = 16; 1024661Sksewell@umich.edu 1037783SGiacomo.Gabrielli@arm.com // Overloaded argsInit so that we can fine-tune for ARM architecture 1047783SGiacomo.Gabrielli@arm.com Process::startup(); 1054661Sksewell@umich.edu 1064661Sksewell@umich.edu // load object file into target memory 1074661Sksewell@umich.edu objFile->loadSections(initVirtMem); 1084661Sksewell@umich.edu 1094661Sksewell@umich.edu enum ArmCpuFeature { 1107783SGiacomo.Gabrielli@arm.com Arm_Swp = 1 << 0, 1114661Sksewell@umich.edu Arm_Half = 1 << 1, 1124661Sksewell@umich.edu Arm_Thumb = 1 << 2, 1134661Sksewell@umich.edu Arm_26Bit = 1 << 3, 1144661Sksewell@umich.edu Arm_FastMult = 1 << 4, 1154661Sksewell@umich.edu Arm_Fpa = 1 << 5, 1164661Sksewell@umich.edu Arm_Vfp = 1 << 6, 1174661Sksewell@umich.edu Arm_Edsp = 1 << 7, 1184661Sksewell@umich.edu Arm_Java = 1 << 8, 1196425Sksewell@umich.edu Arm_Iwmmxt = 1 << 9, 1205714Shsul@eecs.umich.edu Arm_Crunch = 1 << 10 1214661Sksewell@umich.edu }; 1227823Ssteve.reinhardt@amd.com 1234661Sksewell@umich.edu //Setup the auxilliary vectors. These will already have endian conversion. 1244661Sksewell@umich.edu //Auxilliary vectors are loaded only for elf formatted executables. 1254661Sksewell@umich.edu ElfObject * elfObject = dynamic_cast<ElfObject *>(objFile); 1266378Sgblack@eecs.umich.edu if (elfObject) { 1276378Sgblack@eecs.umich.edu uint32_t features = 1285715Shsul@eecs.umich.edu Arm_Swp | 1294661Sksewell@umich.edu Arm_Half | 1306378Sgblack@eecs.umich.edu Arm_Thumb | 1316378Sgblack@eecs.umich.edu// Arm_26Bit | 1325715Shsul@eecs.umich.edu Arm_FastMult | 1334661Sksewell@umich.edu// Arm_Fpa | 1344661Sksewell@umich.edu Arm_Vfp | 1354661Sksewell@umich.edu Arm_Edsp | 1364661Sksewell@umich.edu Arm_Java | 1374661Sksewell@umich.edu// Arm_Iwmmxt | 1384661Sksewell@umich.edu// Arm_Crunch | 1393170Sstever@eecs.umich.edu 0; 1403170Sstever@eecs.umich.edu 1413170Sstever@eecs.umich.edu //Bits which describe the system hardware capabilities 1423170Sstever@eecs.umich.edu //XXX Figure out what these should be 1433170Sstever@eecs.umich.edu auxv.push_back(auxv_t(M5_AT_HWCAP, features)); 1443170Sstever@eecs.umich.edu //The system page size 145 auxv.push_back(auxv_t(M5_AT_PAGESZ, ArmISA::VMPageSize)); 146 //Frequency at which times() increments 147 auxv.push_back(auxv_t(M5_AT_CLKTCK, 0x64)); 148 // For statically linked executables, this is the virtual address of the 149 // program header tables if they appear in the executable image 150 auxv.push_back(auxv_t(M5_AT_PHDR, elfObject->programHeaderTable())); 151 // This is the size of a program header entry from the elf file. 152 auxv.push_back(auxv_t(M5_AT_PHENT, elfObject->programHeaderSize())); 153 // This is the number of program headers from the original elf file. 154 auxv.push_back(auxv_t(M5_AT_PHNUM, elfObject->programHeaderCount())); 155 //This is the address of the elf "interpreter", It should be set 156 //to 0 for regular executables. It should be something else 157 //(not sure what) for dynamic libraries. 158 auxv.push_back(auxv_t(M5_AT_BASE, 0)); 159 160 //XXX Figure out what this should be. 161 auxv.push_back(auxv_t(M5_AT_FLAGS, 0)); 162 //The entry point to the program 163 auxv.push_back(auxv_t(M5_AT_ENTRY, objFile->entryPoint())); 164 //Different user and group IDs 165 auxv.push_back(auxv_t(M5_AT_UID, uid())); 166 auxv.push_back(auxv_t(M5_AT_EUID, euid())); 167 auxv.push_back(auxv_t(M5_AT_GID, gid())); 168 auxv.push_back(auxv_t(M5_AT_EGID, egid())); 169 //Whether to enable "secure mode" in the executable 170 auxv.push_back(auxv_t(M5_AT_SECURE, 0)); 171 //The filename of the program 172 auxv.push_back(auxv_t(M5_AT_EXECFN, 0)); 173 //The string "v51" with unknown meaning 174 auxv.push_back(auxv_t(M5_AT_PLATFORM, 0)); 175 } 176 177 //Figure out how big the initial stack nedes to be 178 179 // A sentry NULL void pointer at the top of the stack. 180 int sentry_size = intSize; 181 182 string platform = "v51"; 183 int platform_size = platform.size() + 1; 184 185 // The aux vectors are put on the stack in two groups. The first group are 186 // the vectors that are generated as the elf is loaded. The second group 187 // are the ones that were computed ahead of time and include the platform 188 // string. 189 int aux_data_size = filename.size() + 1; 190 191 int env_data_size = 0; 192 for (int i = 0; i < envp.size(); ++i) { 193 env_data_size += envp[i].size() + 1; 194 } 195 int arg_data_size = 0; 196 for (int i = 0; i < argv.size(); ++i) { 197 arg_data_size += argv[i].size() + 1; 198 } 199 200 int info_block_size = 201 sentry_size + env_data_size + arg_data_size + 202 aux_data_size + platform_size; 203 204 //Each auxilliary vector is two 4 byte words 205 int aux_array_size = intSize * 2 * (auxv.size() + 1); 206 207 int envp_array_size = intSize * (envp.size() + 1); 208 int argv_array_size = intSize * (argv.size() + 1); 209 210 int argc_size = intSize; 211 212 //Figure out the size of the contents of the actual initial frame 213 int frame_size = 214 info_block_size + 215 aux_array_size + 216 envp_array_size + 217 argv_array_size + 218 argc_size; 219 220 //There needs to be padding after the auxiliary vector data so that the 221 //very bottom of the stack is aligned properly. 222 int partial_size = frame_size; 223 int aligned_partial_size = roundUp(partial_size, align); 224 int aux_padding = aligned_partial_size - partial_size; 225 226 int space_needed = frame_size + aux_padding; 227 228 stack_min = stack_base - space_needed; 229 stack_min = roundDown(stack_min, align); 230 stack_size = stack_base - stack_min; 231 232 // map memory 233 pTable->allocate(roundDown(stack_min, pageSize), 234 roundUp(stack_size, pageSize)); 235 236 // map out initial stack contents 237 uint32_t sentry_base = stack_base - sentry_size; 238 uint32_t aux_data_base = sentry_base - aux_data_size; 239 uint32_t env_data_base = aux_data_base - env_data_size; 240 uint32_t arg_data_base = env_data_base - arg_data_size; 241 uint32_t platform_base = arg_data_base - platform_size; 242 uint32_t auxv_array_base = platform_base - aux_array_size - aux_padding; 243 uint32_t envp_array_base = auxv_array_base - envp_array_size; 244 uint32_t argv_array_base = envp_array_base - argv_array_size; 245 uint32_t argc_base = argv_array_base - argc_size; 246 247 DPRINTF(Stack, "The addresses of items on the initial stack:\n"); 248 DPRINTF(Stack, "0x%x - aux data\n", aux_data_base); 249 DPRINTF(Stack, "0x%x - env data\n", env_data_base); 250 DPRINTF(Stack, "0x%x - arg data\n", arg_data_base); 251 DPRINTF(Stack, "0x%x - platform base\n", platform_base); 252 DPRINTF(Stack, "0x%x - auxv array\n", auxv_array_base); 253 DPRINTF(Stack, "0x%x - envp array\n", envp_array_base); 254 DPRINTF(Stack, "0x%x - argv array\n", argv_array_base); 255 DPRINTF(Stack, "0x%x - argc \n", argc_base); 256 DPRINTF(Stack, "0x%x - stack min\n", stack_min); 257 258 // write contents to stack 259 260 // figure out argc 261 uint32_t argc = argv.size(); 262 uint32_t guestArgc = ArmISA::htog(argc); 263 264 //Write out the sentry void * 265 uint32_t sentry_NULL = 0; 266 initVirtMem->writeBlob(sentry_base, 267 (uint8_t*)&sentry_NULL, sentry_size); 268 269 //Fix up the aux vectors which point to other data 270 for (int i = auxv.size() - 1; i >= 0; i--) { 271 if (auxv[i].a_type == M5_AT_PLATFORM) { 272 auxv[i].a_val = platform_base; 273 initVirtMem->writeString(platform_base, platform.c_str()); 274 } else if (auxv[i].a_type == M5_AT_EXECFN) { 275 auxv[i].a_val = aux_data_base; 276 initVirtMem->writeString(aux_data_base, filename.c_str()); 277 } 278 } 279 280 //Copy the aux stuff 281 for(int x = 0; x < auxv.size(); x++) 282 { 283 initVirtMem->writeBlob(auxv_array_base + x * 2 * intSize, 284 (uint8_t*)&(auxv[x].a_type), intSize); 285 initVirtMem->writeBlob(auxv_array_base + (x * 2 + 1) * intSize, 286 (uint8_t*)&(auxv[x].a_val), intSize); 287 } 288 //Write out the terminating zeroed auxilliary vector 289 const uint64_t zero = 0; 290 initVirtMem->writeBlob(auxv_array_base + 2 * intSize * auxv.size(), 291 (uint8_t*)&zero, 2 * intSize); 292 293 copyStringArray(envp, envp_array_base, env_data_base, initVirtMem); 294 copyStringArray(argv, argv_array_base, arg_data_base, initVirtMem); 295 296 initVirtMem->writeBlob(argc_base, (uint8_t*)&guestArgc, intSize); 297 298 ThreadContext *tc = system->getThreadContext(contextIds[0]); 299 //Set the stack pointer register 300 tc->setIntReg(StackPointerReg, stack_min); 301 //A pointer to a function to run when the program exits. We'll set this 302 //to zero explicitly to make sure this isn't used. 303 tc->setIntReg(ArgumentReg0, 0); 304 //Set argument regs 1 and 2 to argv[0] and envp[0] respectively 305 if (argv.size() > 0) { 306 tc->setIntReg(ArgumentReg1, arg_data_base + arg_data_size - 307 argv[argv.size() - 1].size() - 1); 308 } else { 309 tc->setIntReg(ArgumentReg1, 0); 310 } 311 if (envp.size() > 0) { 312 tc->setIntReg(ArgumentReg2, env_data_base + env_data_size - 313 envp[envp.size() - 1].size() - 1); 314 } else { 315 tc->setIntReg(ArgumentReg2, 0); 316 } 317 318 Addr prog_entry = objFile->entryPoint(); 319 tc->setPC(prog_entry); 320 tc->setNextPC(prog_entry + sizeof(MachInst)); 321 322 //Align the "stack_min" to a page boundary. 323 stack_min = roundDown(stack_min, pageSize); 324} 325 326ArmISA::IntReg 327ArmLiveProcess::getSyscallArg(ThreadContext *tc, int i) 328{ 329 assert(i < 4); 330 return tc->readIntReg(ArgumentReg0 + i); 331} 332 333void 334ArmLiveProcess::setSyscallArg(ThreadContext *tc, 335 int i, ArmISA::IntReg val) 336{ 337 assert(i < 4); 338 tc->setIntReg(ArgumentReg0 + i, val); 339} 340 341void 342ArmLiveProcess::setSyscallReturn(ThreadContext *tc, 343 SyscallReturn return_value) 344{ 345 tc->setIntReg(ReturnValueReg, return_value.value()); 346} 347