process.cc revision 11794
1/* 2 * Copyright (c) 2010, 2012 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software 9 * licensed hereunder. You may use the software subject to the license 10 * terms below provided that you ensure that this notice is replicated 11 * unmodified and in its entirety in all distributions of the software, 12 * modified or unmodified, in source code or in binary form. 13 * 14 * Copyright (c) 2007-2008 The Florida State University 15 * All rights reserved. 16 * 17 * Redistribution and use in source and binary forms, with or without 18 * modification, are permitted provided that the following conditions are 19 * met: redistributions of source code must retain the above copyright 20 * notice, this list of conditions and the following disclaimer; 21 * redistributions in binary form must reproduce the above copyright 22 * notice, this list of conditions and the following disclaimer in the 23 * documentation and/or other materials provided with the distribution; 24 * neither the name of the copyright holders nor the names of its 25 * contributors may be used to endorse or promote products derived from 26 * this software without specific prior written permission. 27 * 28 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 29 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 30 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 31 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 32 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 33 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 34 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 35 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 36 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 37 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 38 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 39 * 40 * Authors: Stephen Hines 41 * Ali Saidi 42 */ 43 44#include "arch/arm/process.hh" 45 46#include "arch/arm/isa_traits.hh" 47#include "arch/arm/types.hh" 48#include "base/loader/elf_object.hh" 49#include "base/loader/object_file.hh" 50#include "base/misc.hh" 51#include "cpu/thread_context.hh" 52#include "debug/Stack.hh" 53#include "mem/page_table.hh" 54#include "sim/byteswap.hh" 55#include "sim/process_impl.hh" 56#include "sim/system.hh" 57 58using namespace std; 59using namespace ArmISA; 60 61ArmLiveProcess::ArmLiveProcess(LiveProcessParams *params, ObjectFile *objFile, 62 ObjectFile::Arch _arch) 63 : LiveProcess(params, objFile), arch(_arch) 64{ 65} 66 67ArmLiveProcess32::ArmLiveProcess32(LiveProcessParams *params, 68 ObjectFile *objFile, ObjectFile::Arch _arch) 69 : ArmLiveProcess(params, objFile, _arch) 70{ 71 stack_base = 0xbf000000L; 72 73 // Set pointer for next thread stack. Reserve 8M for main stack. 74 next_thread_stack_base = stack_base - (8 * 1024 * 1024); 75 76 // Set up break point (Top of Heap) 77 brk_point = objFile->dataBase() + objFile->dataSize() + objFile->bssSize(); 78 brk_point = roundUp(brk_point, PageBytes); 79 80 // Set up region for mmaps. For now, start at bottom of kuseg space. 81 mmap_end = 0x40000000L; 82} 83 84ArmLiveProcess64::ArmLiveProcess64(LiveProcessParams *params, 85 ObjectFile *objFile, ObjectFile::Arch _arch) 86 : ArmLiveProcess(params, objFile, _arch) 87{ 88 stack_base = 0x7fffff0000L; 89 90 // Set pointer for next thread stack. Reserve 8M for main stack. 91 next_thread_stack_base = stack_base - (8 * 1024 * 1024); 92 93 // Set up break point (Top of Heap) 94 brk_point = objFile->dataBase() + objFile->dataSize() + objFile->bssSize(); 95 brk_point = roundUp(brk_point, PageBytes); 96 97 // Set up region for mmaps. For now, start at bottom of kuseg space. 98 mmap_end = 0x4000000000L; 99} 100 101void 102ArmLiveProcess32::initState() 103{ 104 LiveProcess::initState(); 105 argsInit<uint32_t>(PageBytes, INTREG_SP); 106 for (int i = 0; i < contextIds.size(); i++) { 107 ThreadContext * tc = system->getThreadContext(contextIds[i]); 108 CPACR cpacr = tc->readMiscReg(MISCREG_CPACR); 109 // Enable the floating point coprocessors. 110 cpacr.cp10 = 0x3; 111 cpacr.cp11 = 0x3; 112 tc->setMiscReg(MISCREG_CPACR, cpacr); 113 // Generically enable floating point support. 114 FPEXC fpexc = tc->readMiscReg(MISCREG_FPEXC); 115 fpexc.en = 1; 116 tc->setMiscReg(MISCREG_FPEXC, fpexc); 117 } 118} 119 120void 121ArmLiveProcess64::initState() 122{ 123 LiveProcess::initState(); 124 argsInit<uint64_t>(PageBytes, INTREG_SP0); 125 for (int i = 0; i < contextIds.size(); i++) { 126 ThreadContext * tc = system->getThreadContext(contextIds[i]); 127 CPSR cpsr = tc->readMiscReg(MISCREG_CPSR); 128 cpsr.mode = MODE_EL0T; 129 tc->setMiscReg(MISCREG_CPSR, cpsr); 130 CPACR cpacr = tc->readMiscReg(MISCREG_CPACR_EL1); 131 // Enable the floating point coprocessors. 132 cpacr.cp10 = 0x3; 133 cpacr.cp11 = 0x3; 134 tc->setMiscReg(MISCREG_CPACR_EL1, cpacr); 135 // Generically enable floating point support. 136 FPEXC fpexc = tc->readMiscReg(MISCREG_FPEXC); 137 fpexc.en = 1; 138 tc->setMiscReg(MISCREG_FPEXC, fpexc); 139 } 140} 141 142template <class IntType> 143void 144ArmLiveProcess::argsInit(int pageSize, IntRegIndex spIndex) 145{ 146 int intSize = sizeof(IntType); 147 148 typedef AuxVector<IntType> auxv_t; 149 std::vector<auxv_t> auxv; 150 151 string filename; 152 if (argv.size() < 1) 153 filename = ""; 154 else 155 filename = argv[0]; 156 157 //We want 16 byte alignment 158 uint64_t align = 16; 159 160 // Patch the ld_bias for dynamic executables. 161 updateBias(); 162 163 // load object file into target memory 164 objFile->loadSections(initVirtMem); 165 166 enum ArmCpuFeature { 167 Arm_Swp = 1 << 0, 168 Arm_Half = 1 << 1, 169 Arm_Thumb = 1 << 2, 170 Arm_26Bit = 1 << 3, 171 Arm_FastMult = 1 << 4, 172 Arm_Fpa = 1 << 5, 173 Arm_Vfp = 1 << 6, 174 Arm_Edsp = 1 << 7, 175 Arm_Java = 1 << 8, 176 Arm_Iwmmxt = 1 << 9, 177 Arm_Crunch = 1 << 10, 178 Arm_ThumbEE = 1 << 11, 179 Arm_Neon = 1 << 12, 180 Arm_Vfpv3 = 1 << 13, 181 Arm_Vfpv3d16 = 1 << 14 182 }; 183 184 //Setup the auxilliary vectors. These will already have endian conversion. 185 //Auxilliary vectors are loaded only for elf formatted executables. 186 ElfObject * elfObject = dynamic_cast<ElfObject *>(objFile); 187 if (elfObject) { 188 189 if (objFile->getOpSys() == ObjectFile::Linux) { 190 IntType features = 191 Arm_Swp | 192 Arm_Half | 193 Arm_Thumb | 194// Arm_26Bit | 195 Arm_FastMult | 196// Arm_Fpa | 197 Arm_Vfp | 198 Arm_Edsp | 199// Arm_Java | 200// Arm_Iwmmxt | 201// Arm_Crunch | 202 Arm_ThumbEE | 203 Arm_Neon | 204 Arm_Vfpv3 | 205 Arm_Vfpv3d16 | 206 0; 207 208 //Bits which describe the system hardware capabilities 209 //XXX Figure out what these should be 210 auxv.push_back(auxv_t(M5_AT_HWCAP, features)); 211 //Frequency at which times() increments 212 auxv.push_back(auxv_t(M5_AT_CLKTCK, 0x64)); 213 //Whether to enable "secure mode" in the executable 214 auxv.push_back(auxv_t(M5_AT_SECURE, 0)); 215 // Pointer to 16 bytes of random data 216 auxv.push_back(auxv_t(M5_AT_RANDOM, 0)); 217 //The filename of the program 218 auxv.push_back(auxv_t(M5_AT_EXECFN, 0)); 219 //The string "v71" -- ARM v7 architecture 220 auxv.push_back(auxv_t(M5_AT_PLATFORM, 0)); 221 } 222 223 //The system page size 224 auxv.push_back(auxv_t(M5_AT_PAGESZ, ArmISA::PageBytes)); 225 // For statically linked executables, this is the virtual address of the 226 // program header tables if they appear in the executable image 227 auxv.push_back(auxv_t(M5_AT_PHDR, elfObject->programHeaderTable())); 228 // This is the size of a program header entry from the elf file. 229 auxv.push_back(auxv_t(M5_AT_PHENT, elfObject->programHeaderSize())); 230 // This is the number of program headers from the original elf file. 231 auxv.push_back(auxv_t(M5_AT_PHNUM, elfObject->programHeaderCount())); 232 // This is the base address of the ELF interpreter; it should be 233 // zero for static executables or contain the base address for 234 // dynamic executables. 235 auxv.push_back(auxv_t(M5_AT_BASE, getBias())); 236 //XXX Figure out what this should be. 237 auxv.push_back(auxv_t(M5_AT_FLAGS, 0)); 238 //The entry point to the program 239 auxv.push_back(auxv_t(M5_AT_ENTRY, objFile->entryPoint())); 240 //Different user and group IDs 241 auxv.push_back(auxv_t(M5_AT_UID, uid())); 242 auxv.push_back(auxv_t(M5_AT_EUID, euid())); 243 auxv.push_back(auxv_t(M5_AT_GID, gid())); 244 auxv.push_back(auxv_t(M5_AT_EGID, egid())); 245 } 246 247 //Figure out how big the initial stack nedes to be 248 249 // A sentry NULL void pointer at the top of the stack. 250 int sentry_size = intSize; 251 252 string platform = "v71"; 253 int platform_size = platform.size() + 1; 254 255 // Bytes for AT_RANDOM above, we'll just keep them 0 256 int aux_random_size = 16; // as per the specification 257 258 // The aux vectors are put on the stack in two groups. The first group are 259 // the vectors that are generated as the elf is loaded. The second group 260 // are the ones that were computed ahead of time and include the platform 261 // string. 262 int aux_data_size = filename.size() + 1; 263 264 int env_data_size = 0; 265 for (int i = 0; i < envp.size(); ++i) { 266 env_data_size += envp[i].size() + 1; 267 } 268 int arg_data_size = 0; 269 for (int i = 0; i < argv.size(); ++i) { 270 arg_data_size += argv[i].size() + 1; 271 } 272 273 int info_block_size = 274 sentry_size + env_data_size + arg_data_size + 275 aux_data_size + platform_size + aux_random_size; 276 277 //Each auxilliary vector is two 4 byte words 278 int aux_array_size = intSize * 2 * (auxv.size() + 1); 279 280 int envp_array_size = intSize * (envp.size() + 1); 281 int argv_array_size = intSize * (argv.size() + 1); 282 283 int argc_size = intSize; 284 285 //Figure out the size of the contents of the actual initial frame 286 int frame_size = 287 info_block_size + 288 aux_array_size + 289 envp_array_size + 290 argv_array_size + 291 argc_size; 292 293 //There needs to be padding after the auxiliary vector data so that the 294 //very bottom of the stack is aligned properly. 295 int partial_size = frame_size; 296 int aligned_partial_size = roundUp(partial_size, align); 297 int aux_padding = aligned_partial_size - partial_size; 298 299 int space_needed = frame_size + aux_padding; 300 301 stack_min = stack_base - space_needed; 302 stack_min = roundDown(stack_min, align); 303 stack_size = stack_base - stack_min; 304 305 // map memory 306 allocateMem(roundDown(stack_min, pageSize), roundUp(stack_size, pageSize)); 307 308 // map out initial stack contents 309 IntType sentry_base = stack_base - sentry_size; 310 IntType aux_data_base = sentry_base - aux_data_size; 311 IntType env_data_base = aux_data_base - env_data_size; 312 IntType arg_data_base = env_data_base - arg_data_size; 313 IntType platform_base = arg_data_base - platform_size; 314 IntType aux_random_base = platform_base - aux_random_size; 315 IntType auxv_array_base = aux_random_base - aux_array_size - aux_padding; 316 IntType envp_array_base = auxv_array_base - envp_array_size; 317 IntType argv_array_base = envp_array_base - argv_array_size; 318 IntType argc_base = argv_array_base - argc_size; 319 320 DPRINTF(Stack, "The addresses of items on the initial stack:\n"); 321 DPRINTF(Stack, "0x%x - aux data\n", aux_data_base); 322 DPRINTF(Stack, "0x%x - env data\n", env_data_base); 323 DPRINTF(Stack, "0x%x - arg data\n", arg_data_base); 324 DPRINTF(Stack, "0x%x - random data\n", aux_random_base); 325 DPRINTF(Stack, "0x%x - platform base\n", platform_base); 326 DPRINTF(Stack, "0x%x - auxv array\n", auxv_array_base); 327 DPRINTF(Stack, "0x%x - envp array\n", envp_array_base); 328 DPRINTF(Stack, "0x%x - argv array\n", argv_array_base); 329 DPRINTF(Stack, "0x%x - argc \n", argc_base); 330 DPRINTF(Stack, "0x%x - stack min\n", stack_min); 331 332 // write contents to stack 333 334 // figure out argc 335 IntType argc = argv.size(); 336 IntType guestArgc = ArmISA::htog(argc); 337 338 //Write out the sentry void * 339 IntType sentry_NULL = 0; 340 initVirtMem.writeBlob(sentry_base, 341 (uint8_t*)&sentry_NULL, sentry_size); 342 343 //Fix up the aux vectors which point to other data 344 for (int i = auxv.size() - 1; i >= 0; i--) { 345 if (auxv[i].a_type == M5_AT_PLATFORM) { 346 auxv[i].a_val = platform_base; 347 initVirtMem.writeString(platform_base, platform.c_str()); 348 } else if (auxv[i].a_type == M5_AT_EXECFN) { 349 auxv[i].a_val = aux_data_base; 350 initVirtMem.writeString(aux_data_base, filename.c_str()); 351 } else if (auxv[i].a_type == M5_AT_RANDOM) { 352 auxv[i].a_val = aux_random_base; 353 // Just leave the value 0, we don't want randomness 354 } 355 } 356 357 //Copy the aux stuff 358 for (int x = 0; x < auxv.size(); x++) { 359 initVirtMem.writeBlob(auxv_array_base + x * 2 * intSize, 360 (uint8_t*)&(auxv[x].a_type), intSize); 361 initVirtMem.writeBlob(auxv_array_base + (x * 2 + 1) * intSize, 362 (uint8_t*)&(auxv[x].a_val), intSize); 363 } 364 //Write out the terminating zeroed auxilliary vector 365 const uint64_t zero = 0; 366 initVirtMem.writeBlob(auxv_array_base + 2 * intSize * auxv.size(), 367 (uint8_t*)&zero, 2 * intSize); 368 369 copyStringArray(envp, envp_array_base, env_data_base, initVirtMem); 370 copyStringArray(argv, argv_array_base, arg_data_base, initVirtMem); 371 372 initVirtMem.writeBlob(argc_base, (uint8_t*)&guestArgc, intSize); 373 374 ThreadContext *tc = system->getThreadContext(contextIds[0]); 375 //Set the stack pointer register 376 tc->setIntReg(spIndex, stack_min); 377 //A pointer to a function to run when the program exits. We'll set this 378 //to zero explicitly to make sure this isn't used. 379 tc->setIntReg(ArgumentReg0, 0); 380 //Set argument regs 1 and 2 to argv[0] and envp[0] respectively 381 if (argv.size() > 0) { 382 tc->setIntReg(ArgumentReg1, arg_data_base + arg_data_size - 383 argv[argv.size() - 1].size() - 1); 384 } else { 385 tc->setIntReg(ArgumentReg1, 0); 386 } 387 if (envp.size() > 0) { 388 tc->setIntReg(ArgumentReg2, env_data_base + env_data_size - 389 envp[envp.size() - 1].size() - 1); 390 } else { 391 tc->setIntReg(ArgumentReg2, 0); 392 } 393 394 PCState pc; 395 pc.thumb(arch == ObjectFile::Thumb); 396 pc.nextThumb(pc.thumb()); 397 pc.aarch64(arch == ObjectFile::Arm64); 398 pc.nextAArch64(pc.aarch64()); 399 pc.set(getStartPC() & ~mask(1)); 400 tc->pcState(pc); 401 402 //Align the "stack_min" to a page boundary. 403 stack_min = roundDown(stack_min, pageSize); 404} 405 406ArmISA::IntReg 407ArmLiveProcess32::getSyscallArg(ThreadContext *tc, int &i) 408{ 409 assert(i < 6); 410 return tc->readIntReg(ArgumentReg0 + i++); 411} 412 413ArmISA::IntReg 414ArmLiveProcess64::getSyscallArg(ThreadContext *tc, int &i) 415{ 416 assert(i < 8); 417 return tc->readIntReg(ArgumentReg0 + i++); 418} 419 420ArmISA::IntReg 421ArmLiveProcess32::getSyscallArg(ThreadContext *tc, int &i, int width) 422{ 423 assert(width == 32 || width == 64); 424 if (width == 32) 425 return getSyscallArg(tc, i); 426 427 // 64 bit arguments are passed starting in an even register 428 if (i % 2 != 0) 429 i++; 430 431 // Registers r0-r6 can be used 432 assert(i < 5); 433 uint64_t val; 434 val = tc->readIntReg(ArgumentReg0 + i++); 435 val |= ((uint64_t)tc->readIntReg(ArgumentReg0 + i++) << 32); 436 return val; 437} 438 439ArmISA::IntReg 440ArmLiveProcess64::getSyscallArg(ThreadContext *tc, int &i, int width) 441{ 442 return getSyscallArg(tc, i); 443} 444 445 446void 447ArmLiveProcess32::setSyscallArg(ThreadContext *tc, int i, ArmISA::IntReg val) 448{ 449 assert(i < 6); 450 tc->setIntReg(ArgumentReg0 + i, val); 451} 452 453void 454ArmLiveProcess64::setSyscallArg(ThreadContext *tc, 455 int i, ArmISA::IntReg val) 456{ 457 assert(i < 8); 458 tc->setIntReg(ArgumentReg0 + i, val); 459} 460 461void 462ArmLiveProcess32::setSyscallReturn(ThreadContext *tc, SyscallReturn sysret) 463{ 464 465 if (objFile->getOpSys() == ObjectFile::FreeBSD) { 466 // Decode return value 467 if (sysret.encodedValue() >= 0) 468 // FreeBSD checks the carry bit to determine if syscall is succeeded 469 tc->setCCReg(CCREG_C, 0); 470 else { 471 sysret = -sysret.encodedValue(); 472 } 473 } 474 475 tc->setIntReg(ReturnValueReg, sysret.encodedValue()); 476} 477 478void 479ArmLiveProcess64::setSyscallReturn(ThreadContext *tc, SyscallReturn sysret) 480{ 481 482 if (objFile->getOpSys() == ObjectFile::FreeBSD) { 483 // Decode return value 484 if (sysret.encodedValue() >= 0) 485 // FreeBSD checks the carry bit to determine if syscall is succeeded 486 tc->setCCReg(CCREG_C, 0); 487 else { 488 sysret = -sysret.encodedValue(); 489 } 490 } 491 492 tc->setIntReg(ReturnValueReg, sysret.encodedValue()); 493} 494