process.cc revision 11389:1e55f16160cb
1/* 2 * Copyright (c) 2010, 2012 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software 9 * licensed hereunder. You may use the software subject to the license 10 * terms below provided that you ensure that this notice is replicated 11 * unmodified and in its entirety in all distributions of the software, 12 * modified or unmodified, in source code or in binary form. 13 * 14 * Copyright (c) 2007-2008 The Florida State University 15 * All rights reserved. 16 * 17 * Redistribution and use in source and binary forms, with or without 18 * modification, are permitted provided that the following conditions are 19 * met: redistributions of source code must retain the above copyright 20 * notice, this list of conditions and the following disclaimer; 21 * redistributions in binary form must reproduce the above copyright 22 * notice, this list of conditions and the following disclaimer in the 23 * documentation and/or other materials provided with the distribution; 24 * neither the name of the copyright holders nor the names of its 25 * contributors may be used to endorse or promote products derived from 26 * this software without specific prior written permission. 27 * 28 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 29 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 30 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 31 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 32 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 33 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 34 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 35 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 36 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 37 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 38 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 39 * 40 * Authors: Stephen Hines 41 * Ali Saidi 42 */ 43 44#include "arch/arm/isa_traits.hh" 45#include "arch/arm/process.hh" 46#include "arch/arm/types.hh" 47#include "base/loader/elf_object.hh" 48#include "base/loader/object_file.hh" 49#include "base/misc.hh" 50#include "cpu/thread_context.hh" 51#include "debug/Stack.hh" 52#include "mem/page_table.hh" 53#include "sim/byteswap.hh" 54#include "sim/process_impl.hh" 55#include "sim/system.hh" 56 57using namespace std; 58using namespace ArmISA; 59 60ArmLiveProcess::ArmLiveProcess(LiveProcessParams *params, ObjectFile *objFile, 61 ObjectFile::Arch _arch) 62 : LiveProcess(params, objFile), arch(_arch) 63{ 64} 65 66ArmLiveProcess32::ArmLiveProcess32(LiveProcessParams *params, 67 ObjectFile *objFile, ObjectFile::Arch _arch) 68 : ArmLiveProcess(params, objFile, _arch) 69{ 70 stack_base = 0xbf000000L; 71 72 // Set pointer for next thread stack. Reserve 8M for main stack. 73 next_thread_stack_base = stack_base - (8 * 1024 * 1024); 74 75 // Set up break point (Top of Heap) 76 brk_point = objFile->dataBase() + objFile->dataSize() + objFile->bssSize(); 77 brk_point = roundUp(brk_point, PageBytes); 78 79 // Set up region for mmaps. For now, start at bottom of kuseg space. 80 mmap_end = 0x40000000L; 81} 82 83ArmLiveProcess64::ArmLiveProcess64(LiveProcessParams *params, 84 ObjectFile *objFile, ObjectFile::Arch _arch) 85 : ArmLiveProcess(params, objFile, _arch) 86{ 87 stack_base = 0x7fffff0000L; 88 89 // Set pointer for next thread stack. Reserve 8M for main stack. 90 next_thread_stack_base = stack_base - (8 * 1024 * 1024); 91 92 // Set up break point (Top of Heap) 93 brk_point = objFile->dataBase() + objFile->dataSize() + objFile->bssSize(); 94 brk_point = roundUp(brk_point, PageBytes); 95 96 // Set up region for mmaps. For now, start at bottom of kuseg space. 97 mmap_end = 0x4000000000L; 98} 99 100void 101ArmLiveProcess32::initState() 102{ 103 LiveProcess::initState(); 104 argsInit<uint32_t>(PageBytes, INTREG_SP); 105 for (int i = 0; i < contextIds.size(); i++) { 106 ThreadContext * tc = system->getThreadContext(contextIds[i]); 107 CPACR cpacr = tc->readMiscReg(MISCREG_CPACR); 108 // Enable the floating point coprocessors. 109 cpacr.cp10 = 0x3; 110 cpacr.cp11 = 0x3; 111 tc->setMiscReg(MISCREG_CPACR, cpacr); 112 // Generically enable floating point support. 113 FPEXC fpexc = tc->readMiscReg(MISCREG_FPEXC); 114 fpexc.en = 1; 115 tc->setMiscReg(MISCREG_FPEXC, fpexc); 116 } 117} 118 119void 120ArmLiveProcess64::initState() 121{ 122 LiveProcess::initState(); 123 argsInit<uint64_t>(PageBytes, INTREG_SP0); 124 for (int i = 0; i < contextIds.size(); i++) { 125 ThreadContext * tc = system->getThreadContext(contextIds[i]); 126 CPSR cpsr = tc->readMiscReg(MISCREG_CPSR); 127 cpsr.mode = MODE_EL0T; 128 tc->setMiscReg(MISCREG_CPSR, cpsr); 129 CPACR cpacr = tc->readMiscReg(MISCREG_CPACR_EL1); 130 // Enable the floating point coprocessors. 131 cpacr.cp10 = 0x3; 132 cpacr.cp11 = 0x3; 133 tc->setMiscReg(MISCREG_CPACR_EL1, cpacr); 134 // Generically enable floating point support. 135 FPEXC fpexc = tc->readMiscReg(MISCREG_FPEXC); 136 fpexc.en = 1; 137 tc->setMiscReg(MISCREG_FPEXC, fpexc); 138 } 139} 140 141template <class IntType> 142void 143ArmLiveProcess::argsInit(int pageSize, IntRegIndex spIndex) 144{ 145 int intSize = sizeof(IntType); 146 147 typedef AuxVector<IntType> auxv_t; 148 std::vector<auxv_t> auxv; 149 150 string filename; 151 if (argv.size() < 1) 152 filename = ""; 153 else 154 filename = argv[0]; 155 156 //We want 16 byte alignment 157 uint64_t align = 16; 158 159 // Patch the ld_bias for dynamic executables. 160 updateBias(); 161 162 // load object file into target memory 163 objFile->loadSections(initVirtMem); 164 165 enum ArmCpuFeature { 166 Arm_Swp = 1 << 0, 167 Arm_Half = 1 << 1, 168 Arm_Thumb = 1 << 2, 169 Arm_26Bit = 1 << 3, 170 Arm_FastMult = 1 << 4, 171 Arm_Fpa = 1 << 5, 172 Arm_Vfp = 1 << 6, 173 Arm_Edsp = 1 << 7, 174 Arm_Java = 1 << 8, 175 Arm_Iwmmxt = 1 << 9, 176 Arm_Crunch = 1 << 10, 177 Arm_ThumbEE = 1 << 11, 178 Arm_Neon = 1 << 12, 179 Arm_Vfpv3 = 1 << 13, 180 Arm_Vfpv3d16 = 1 << 14 181 }; 182 183 //Setup the auxilliary vectors. These will already have endian conversion. 184 //Auxilliary vectors are loaded only for elf formatted executables. 185 ElfObject * elfObject = dynamic_cast<ElfObject *>(objFile); 186 if (elfObject) { 187 188 if (objFile->getOpSys() == ObjectFile::Linux) { 189 IntType features = 190 Arm_Swp | 191 Arm_Half | 192 Arm_Thumb | 193// Arm_26Bit | 194 Arm_FastMult | 195// Arm_Fpa | 196 Arm_Vfp | 197 Arm_Edsp | 198// Arm_Java | 199// Arm_Iwmmxt | 200// Arm_Crunch | 201 Arm_ThumbEE | 202 Arm_Neon | 203 Arm_Vfpv3 | 204 Arm_Vfpv3d16 | 205 0; 206 207 //Bits which describe the system hardware capabilities 208 //XXX Figure out what these should be 209 auxv.push_back(auxv_t(M5_AT_HWCAP, features)); 210 //Frequency at which times() increments 211 auxv.push_back(auxv_t(M5_AT_CLKTCK, 0x64)); 212 //Whether to enable "secure mode" in the executable 213 auxv.push_back(auxv_t(M5_AT_SECURE, 0)); 214 // Pointer to 16 bytes of random data 215 auxv.push_back(auxv_t(M5_AT_RANDOM, 0)); 216 //The filename of the program 217 auxv.push_back(auxv_t(M5_AT_EXECFN, 0)); 218 //The string "v71" -- ARM v7 architecture 219 auxv.push_back(auxv_t(M5_AT_PLATFORM, 0)); 220 } 221 222 //The system page size 223 auxv.push_back(auxv_t(M5_AT_PAGESZ, ArmISA::PageBytes)); 224 // For statically linked executables, this is the virtual address of the 225 // program header tables if they appear in the executable image 226 auxv.push_back(auxv_t(M5_AT_PHDR, elfObject->programHeaderTable())); 227 // This is the size of a program header entry from the elf file. 228 auxv.push_back(auxv_t(M5_AT_PHENT, elfObject->programHeaderSize())); 229 // This is the number of program headers from the original elf file. 230 auxv.push_back(auxv_t(M5_AT_PHNUM, elfObject->programHeaderCount())); 231 // This is the base address of the ELF interpreter; it should be 232 // zero for static executables or contain the base address for 233 // dynamic executables. 234 auxv.push_back(auxv_t(M5_AT_BASE, getBias())); 235 //XXX Figure out what this should be. 236 auxv.push_back(auxv_t(M5_AT_FLAGS, 0)); 237 //The entry point to the program 238 auxv.push_back(auxv_t(M5_AT_ENTRY, objFile->entryPoint())); 239 //Different user and group IDs 240 auxv.push_back(auxv_t(M5_AT_UID, uid())); 241 auxv.push_back(auxv_t(M5_AT_EUID, euid())); 242 auxv.push_back(auxv_t(M5_AT_GID, gid())); 243 auxv.push_back(auxv_t(M5_AT_EGID, egid())); 244 } 245 246 //Figure out how big the initial stack nedes to be 247 248 // A sentry NULL void pointer at the top of the stack. 249 int sentry_size = intSize; 250 251 string platform = "v71"; 252 int platform_size = platform.size() + 1; 253 254 // Bytes for AT_RANDOM above, we'll just keep them 0 255 int aux_random_size = 16; // as per the specification 256 257 // The aux vectors are put on the stack in two groups. The first group are 258 // the vectors that are generated as the elf is loaded. The second group 259 // are the ones that were computed ahead of time and include the platform 260 // string. 261 int aux_data_size = filename.size() + 1; 262 263 int env_data_size = 0; 264 for (int i = 0; i < envp.size(); ++i) { 265 env_data_size += envp[i].size() + 1; 266 } 267 int arg_data_size = 0; 268 for (int i = 0; i < argv.size(); ++i) { 269 arg_data_size += argv[i].size() + 1; 270 } 271 272 int info_block_size = 273 sentry_size + env_data_size + arg_data_size + 274 aux_data_size + platform_size + aux_random_size; 275 276 //Each auxilliary vector is two 4 byte words 277 int aux_array_size = intSize * 2 * (auxv.size() + 1); 278 279 int envp_array_size = intSize * (envp.size() + 1); 280 int argv_array_size = intSize * (argv.size() + 1); 281 282 int argc_size = intSize; 283 284 //Figure out the size of the contents of the actual initial frame 285 int frame_size = 286 info_block_size + 287 aux_array_size + 288 envp_array_size + 289 argv_array_size + 290 argc_size; 291 292 //There needs to be padding after the auxiliary vector data so that the 293 //very bottom of the stack is aligned properly. 294 int partial_size = frame_size; 295 int aligned_partial_size = roundUp(partial_size, align); 296 int aux_padding = aligned_partial_size - partial_size; 297 298 int space_needed = frame_size + aux_padding; 299 300 stack_min = stack_base - space_needed; 301 stack_min = roundDown(stack_min, align); 302 stack_size = stack_base - stack_min; 303 304 // map memory 305 allocateMem(roundDown(stack_min, pageSize), roundUp(stack_size, pageSize)); 306 307 // map out initial stack contents 308 IntType sentry_base = stack_base - sentry_size; 309 IntType aux_data_base = sentry_base - aux_data_size; 310 IntType env_data_base = aux_data_base - env_data_size; 311 IntType arg_data_base = env_data_base - arg_data_size; 312 IntType platform_base = arg_data_base - platform_size; 313 IntType aux_random_base = platform_base - aux_random_size; 314 IntType auxv_array_base = aux_random_base - aux_array_size - aux_padding; 315 IntType envp_array_base = auxv_array_base - envp_array_size; 316 IntType argv_array_base = envp_array_base - argv_array_size; 317 IntType argc_base = argv_array_base - argc_size; 318 319 DPRINTF(Stack, "The addresses of items on the initial stack:\n"); 320 DPRINTF(Stack, "0x%x - aux data\n", aux_data_base); 321 DPRINTF(Stack, "0x%x - env data\n", env_data_base); 322 DPRINTF(Stack, "0x%x - arg data\n", arg_data_base); 323 DPRINTF(Stack, "0x%x - random data\n", aux_random_base); 324 DPRINTF(Stack, "0x%x - platform base\n", platform_base); 325 DPRINTF(Stack, "0x%x - auxv array\n", auxv_array_base); 326 DPRINTF(Stack, "0x%x - envp array\n", envp_array_base); 327 DPRINTF(Stack, "0x%x - argv array\n", argv_array_base); 328 DPRINTF(Stack, "0x%x - argc \n", argc_base); 329 DPRINTF(Stack, "0x%x - stack min\n", stack_min); 330 331 // write contents to stack 332 333 // figure out argc 334 IntType argc = argv.size(); 335 IntType guestArgc = ArmISA::htog(argc); 336 337 //Write out the sentry void * 338 IntType sentry_NULL = 0; 339 initVirtMem.writeBlob(sentry_base, 340 (uint8_t*)&sentry_NULL, sentry_size); 341 342 //Fix up the aux vectors which point to other data 343 for (int i = auxv.size() - 1; i >= 0; i--) { 344 if (auxv[i].a_type == M5_AT_PLATFORM) { 345 auxv[i].a_val = platform_base; 346 initVirtMem.writeString(platform_base, platform.c_str()); 347 } else if (auxv[i].a_type == M5_AT_EXECFN) { 348 auxv[i].a_val = aux_data_base; 349 initVirtMem.writeString(aux_data_base, filename.c_str()); 350 } else if (auxv[i].a_type == M5_AT_RANDOM) { 351 auxv[i].a_val = aux_random_base; 352 // Just leave the value 0, we don't want randomness 353 } 354 } 355 356 //Copy the aux stuff 357 for (int x = 0; x < auxv.size(); x++) { 358 initVirtMem.writeBlob(auxv_array_base + x * 2 * intSize, 359 (uint8_t*)&(auxv[x].a_type), intSize); 360 initVirtMem.writeBlob(auxv_array_base + (x * 2 + 1) * intSize, 361 (uint8_t*)&(auxv[x].a_val), intSize); 362 } 363 //Write out the terminating zeroed auxilliary vector 364 const uint64_t zero = 0; 365 initVirtMem.writeBlob(auxv_array_base + 2 * intSize * auxv.size(), 366 (uint8_t*)&zero, 2 * intSize); 367 368 copyStringArray(envp, envp_array_base, env_data_base, initVirtMem); 369 copyStringArray(argv, argv_array_base, arg_data_base, initVirtMem); 370 371 initVirtMem.writeBlob(argc_base, (uint8_t*)&guestArgc, intSize); 372 373 ThreadContext *tc = system->getThreadContext(contextIds[0]); 374 //Set the stack pointer register 375 tc->setIntReg(spIndex, stack_min); 376 //A pointer to a function to run when the program exits. We'll set this 377 //to zero explicitly to make sure this isn't used. 378 tc->setIntReg(ArgumentReg0, 0); 379 //Set argument regs 1 and 2 to argv[0] and envp[0] respectively 380 if (argv.size() > 0) { 381 tc->setIntReg(ArgumentReg1, arg_data_base + arg_data_size - 382 argv[argv.size() - 1].size() - 1); 383 } else { 384 tc->setIntReg(ArgumentReg1, 0); 385 } 386 if (envp.size() > 0) { 387 tc->setIntReg(ArgumentReg2, env_data_base + env_data_size - 388 envp[envp.size() - 1].size() - 1); 389 } else { 390 tc->setIntReg(ArgumentReg2, 0); 391 } 392 393 PCState pc; 394 pc.thumb(arch == ObjectFile::Thumb); 395 pc.nextThumb(pc.thumb()); 396 pc.aarch64(arch == ObjectFile::Arm64); 397 pc.nextAArch64(pc.aarch64()); 398 pc.set(getStartPC() & ~mask(1)); 399 tc->pcState(pc); 400 401 //Align the "stack_min" to a page boundary. 402 stack_min = roundDown(stack_min, pageSize); 403} 404 405ArmISA::IntReg 406ArmLiveProcess32::getSyscallArg(ThreadContext *tc, int &i) 407{ 408 assert(i < 6); 409 return tc->readIntReg(ArgumentReg0 + i++); 410} 411 412ArmISA::IntReg 413ArmLiveProcess64::getSyscallArg(ThreadContext *tc, int &i) 414{ 415 assert(i < 8); 416 return tc->readIntReg(ArgumentReg0 + i++); 417} 418 419ArmISA::IntReg 420ArmLiveProcess32::getSyscallArg(ThreadContext *tc, int &i, int width) 421{ 422 assert(width == 32 || width == 64); 423 if (width == 32) 424 return getSyscallArg(tc, i); 425 426 // 64 bit arguments are passed starting in an even register 427 if (i % 2 != 0) 428 i++; 429 430 // Registers r0-r6 can be used 431 assert(i < 5); 432 uint64_t val; 433 val = tc->readIntReg(ArgumentReg0 + i++); 434 val |= ((uint64_t)tc->readIntReg(ArgumentReg0 + i++) << 32); 435 return val; 436} 437 438ArmISA::IntReg 439ArmLiveProcess64::getSyscallArg(ThreadContext *tc, int &i, int width) 440{ 441 return getSyscallArg(tc, i); 442} 443 444 445void 446ArmLiveProcess32::setSyscallArg(ThreadContext *tc, int i, ArmISA::IntReg val) 447{ 448 assert(i < 6); 449 tc->setIntReg(ArgumentReg0 + i, val); 450} 451 452void 453ArmLiveProcess64::setSyscallArg(ThreadContext *tc, 454 int i, ArmISA::IntReg val) 455{ 456 assert(i < 8); 457 tc->setIntReg(ArgumentReg0 + i, val); 458} 459 460void 461ArmLiveProcess32::setSyscallReturn(ThreadContext *tc, SyscallReturn sysret) 462{ 463 464 if (objFile->getOpSys() == ObjectFile::FreeBSD) { 465 // Decode return value 466 if (sysret.encodedValue() >= 0) 467 // FreeBSD checks the carry bit to determine if syscall is succeeded 468 tc->setCCReg(CCREG_C, 0); 469 else { 470 sysret = -sysret.encodedValue(); 471 } 472 } 473 474 tc->setIntReg(ReturnValueReg, sysret.encodedValue()); 475} 476 477void 478ArmLiveProcess64::setSyscallReturn(ThreadContext *tc, SyscallReturn sysret) 479{ 480 481 if (objFile->getOpSys() == ObjectFile::FreeBSD) { 482 // Decode return value 483 if (sysret.encodedValue() >= 0) 484 // FreeBSD checks the carry bit to determine if syscall is succeeded 485 tc->setCCReg(CCREG_C, 0); 486 else { 487 sysret = -sysret.encodedValue(); 488 } 489 } 490 491 tc->setIntReg(ReturnValueReg, sysret.encodedValue()); 492} 493