1// 2// Copyright (c) 2010 ARM Limited 3// All rights reserved 4// 5// The license below extends only to copyright in the software and shall 6// not be construed as granting a license to any other intellectual 7// property including but not limited to intellectual property relating 8// to a hardware implementation of the functionality of the software 9// licensed hereunder. You may use the software subject to the license 10// terms below provided that you ensure that this notice is replicated 11// unmodified and in its entirety in all distributions of the software, 12// modified or unmodified, in source code or in binary form. 13// 14// Redistribution and use in source and binary forms, with or without 15// modification, are permitted provided that the following conditions are 16// met: redistributions of source code must retain the above copyright 17// notice, this list of conditions and the following disclaimer; 18// redistributions in binary form must reproduce the above copyright 19// notice, this list of conditions and the following disclaimer in the 20// documentation and/or other materials provided with the distribution; 21// neither the name of the copyright holders nor the names of its 22// contributors may be used to endorse or promote products derived from 23// this software without specific prior written permission. 24// 25// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 26// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 27// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 28// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 29// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 30// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 31// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 32// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 33// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 34// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 35// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 36// 37// Authors: Gene Wu 38/// 39 40def format M5ops() {{ 41 decode_block = ''' 42 { 43 const uint32_t m5func = bits(machInst, 23, 16); 44 switch(m5func) { 45 case M5OP_ARM: return new Arm(machInst); 46 case M5OP_QUIESCE: return new Quiesce(machInst); 47 case M5OP_QUIESCE_NS: return new QuiesceNs(machInst); 48 case M5OP_QUIESCE_CYCLE: return new QuiesceCycles(machInst); 49 case M5OP_QUIESCE_TIME: return new QuiesceTime(machInst); 50 case M5OP_RPNS: return new Rpns(machInst); 51 case M5OP_WAKE_CPU: return new WakeCPU(machInst); 52 case M5OP_DEPRECATED1: return new Deprecated_ivlb(machInst); 53 case M5OP_DEPRECATED2: return new Deprecated_ivle(machInst); 54 case M5OP_DEPRECATED3: return new Deprecated_exit (machInst); 55 case M5OP_EXIT: return new M5exit(machInst); 56 case M5OP_FAIL: return new M5fail(machInst); 57 case M5OP_LOAD_SYMBOL: return new Loadsymbol(machInst); 58 case M5OP_INIT_PARAM: return new Initparam(machInst); 59 case M5OP_RESET_STATS: return new Resetstats(machInst); 60 case M5OP_DUMP_STATS: return new Dumpstats(machInst); 61 case M5OP_DUMP_RESET_STATS: return new Dumpresetstats(machInst); 62 case M5OP_CHECKPOINT: return new M5checkpoint(machInst); 63 case M5OP_WRITE_FILE: return new M5writefile(machInst); 64 case M5OP_READ_FILE: return new M5readfile(machInst); 65 case M5OP_DEBUG_BREAK: return new M5break(machInst); 66 case M5OP_SWITCH_CPU: return new M5switchcpu(machInst); 67 case M5OP_ADD_SYMBOL: return new M5addsymbol(machInst); 68 case M5OP_PANIC: return new M5panic(machInst); 69 case M5OP_WORK_BEGIN: return new M5workbegin(machInst); 70 case M5OP_WORK_END: return new M5workend(machInst); 71 default: return new Unknown(machInst); 72 } 73 } 74 ''' 75}}; 76