branch.isa revision 7344:82a4e24e7fad
110993Sjungma@eit.uni-kl.de// -*- mode:c++ -*- 210993Sjungma@eit.uni-kl.de 310993Sjungma@eit.uni-kl.de// Copyright (c) 2010 ARM Limited 410993Sjungma@eit.uni-kl.de// All rights reserved 510993Sjungma@eit.uni-kl.de// 610993Sjungma@eit.uni-kl.de// The license below extends only to copyright in the software and shall 710993Sjungma@eit.uni-kl.de// not be construed as granting a license to any other intellectual 810993Sjungma@eit.uni-kl.de// property including but not limited to intellectual property relating 910993Sjungma@eit.uni-kl.de// to a hardware implementation of the functionality of the software 1010993Sjungma@eit.uni-kl.de// licensed hereunder. You may use the software subject to the license 1110993Sjungma@eit.uni-kl.de// terms below provided that you ensure that this notice is replicated 1210993Sjungma@eit.uni-kl.de// unmodified and in its entirety in all distributions of the software, 1310993Sjungma@eit.uni-kl.de// modified or unmodified, in source code or in binary form. 1410993Sjungma@eit.uni-kl.de// 1510993Sjungma@eit.uni-kl.de// Copyright (c) 2007-2008 The Florida State University 1610993Sjungma@eit.uni-kl.de// All rights reserved. 1710993Sjungma@eit.uni-kl.de// 1810993Sjungma@eit.uni-kl.de// Redistribution and use in source and binary forms, with or without 1910993Sjungma@eit.uni-kl.de// modification, are permitted provided that the following conditions are 2010993Sjungma@eit.uni-kl.de// met: redistributions of source code must retain the above copyright 2110993Sjungma@eit.uni-kl.de// notice, this list of conditions and the following disclaimer; 2210993Sjungma@eit.uni-kl.de// redistributions in binary form must reproduce the above copyright 2310993Sjungma@eit.uni-kl.de// notice, this list of conditions and the following disclaimer in the 2410993Sjungma@eit.uni-kl.de// documentation and/or other materials provided with the distribution; 2510993Sjungma@eit.uni-kl.de// neither the name of the copyright holders nor the names of its 2610993Sjungma@eit.uni-kl.de// contributors may be used to endorse or promote products derived from 2710993Sjungma@eit.uni-kl.de// this software without specific prior written permission. 2810993Sjungma@eit.uni-kl.de// 2910993Sjungma@eit.uni-kl.de// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 3010993Sjungma@eit.uni-kl.de// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 3110993Sjungma@eit.uni-kl.de// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 3210993Sjungma@eit.uni-kl.de// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 3310993Sjungma@eit.uni-kl.de// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 3410993Sjungma@eit.uni-kl.de// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 3510993Sjungma@eit.uni-kl.de// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 3611099Sabdul.mutaal@gmail.com// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 3710993Sjungma@eit.uni-kl.de// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 3811791Sjungma@eit.uni-kl.de// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 3911791Sjungma@eit.uni-kl.de// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 4011791Sjungma@eit.uni-kl.de// 4110993Sjungma@eit.uni-kl.de// Authors: Stephen Hines 4210993Sjungma@eit.uni-kl.de 4310993Sjungma@eit.uni-kl.de//////////////////////////////////////////////////////////////////// 4411791Sjungma@eit.uni-kl.de// 4511791Sjungma@eit.uni-kl.de// Control transfer instructions 4611791Sjungma@eit.uni-kl.de// 4711791Sjungma@eit.uni-kl.de 4811791Sjungma@eit.uni-kl.dedef format ArmBBlxImm() {{ 4911791Sjungma@eit.uni-kl.de decode_block = ''' 5011791Sjungma@eit.uni-kl.de if (machInst.condCode == 0xF) { 5111791Sjungma@eit.uni-kl.de int32_t imm = (sext<26>(bits(machInst, 23, 0) << 2)) | 5211791Sjungma@eit.uni-kl.de (bits(machInst, 24) << 1); 5311791Sjungma@eit.uni-kl.de return new BlxImm(machInst, imm); 5411791Sjungma@eit.uni-kl.de } else { 5511791Sjungma@eit.uni-kl.de return new B(machInst, sext<26>(bits(machInst, 23, 0) << 2), 5611791Sjungma@eit.uni-kl.de (ConditionCode)(uint32_t)machInst.condCode); 5711791Sjungma@eit.uni-kl.de } 5810993Sjungma@eit.uni-kl.de ''' 5910993Sjungma@eit.uni-kl.de}}; 6010993Sjungma@eit.uni-kl.de 6110993Sjungma@eit.uni-kl.dedef format ArmBlBlxImm() {{ 6210993Sjungma@eit.uni-kl.de decode_block = ''' 6310993Sjungma@eit.uni-kl.de if (machInst.condCode == 0xF) { 6410993Sjungma@eit.uni-kl.de int32_t imm = (sext<26>(bits(machInst, 23, 0) << 2)) | 6510993Sjungma@eit.uni-kl.de (bits(machInst, 24) << 1); 6610993Sjungma@eit.uni-kl.de return new BlxImm(machInst, imm); 6710993Sjungma@eit.uni-kl.de } else { 6810993Sjungma@eit.uni-kl.de return new Bl(machInst, sext<26>(bits(machInst, 23, 0) << 2), 6910993Sjungma@eit.uni-kl.de (ConditionCode)(uint32_t)machInst.condCode); 7010993Sjungma@eit.uni-kl.de } 7110993Sjungma@eit.uni-kl.de ''' 7210993Sjungma@eit.uni-kl.de}}; 7310993Sjungma@eit.uni-kl.de 7410993Sjungma@eit.uni-kl.dedef format ArmBxClz() {{ 7510993Sjungma@eit.uni-kl.de decode_block = ''' 7610993Sjungma@eit.uni-kl.de { 7710993Sjungma@eit.uni-kl.de const IntRegIndex rm = (IntRegIndex)(uint32_t)bits(machInst, 3, 0); 7810993Sjungma@eit.uni-kl.de const IntRegIndex rd = (IntRegIndex)(uint32_t)bits(machInst, 15, 12); 7910993Sjungma@eit.uni-kl.de if (OPCODE == 0x9) { 8010993Sjungma@eit.uni-kl.de return new BxReg(machInst, rm, 8110993Sjungma@eit.uni-kl.de (ConditionCode)(uint32_t)machInst.condCode); 8210993Sjungma@eit.uni-kl.de } else if (OPCODE == 0xb) { 8310993Sjungma@eit.uni-kl.de return new Clz(machInst, rd, rm); 8410993Sjungma@eit.uni-kl.de } else { 8510993Sjungma@eit.uni-kl.de return new Unknown(machInst); 8610993Sjungma@eit.uni-kl.de } 8710993Sjungma@eit.uni-kl.de } 8810993Sjungma@eit.uni-kl.de ''' 8910993Sjungma@eit.uni-kl.de}}; 9010993Sjungma@eit.uni-kl.de 9110993Sjungma@eit.uni-kl.dedef format ArmBlxReg() {{ 9210993Sjungma@eit.uni-kl.de decode_block = ''' 9310993Sjungma@eit.uni-kl.de return new BlxReg(machInst, (IntRegIndex)(uint32_t)bits(machInst, 3, 0), 9410993Sjungma@eit.uni-kl.de (ConditionCode)(uint32_t)machInst.condCode); 9510993Sjungma@eit.uni-kl.de ''' 9610993Sjungma@eit.uni-kl.de}}; 9710993Sjungma@eit.uni-kl.de 9810993Sjungma@eit.uni-kl.dedef format Thumb16CondBranchAndSvc() {{ 9910993Sjungma@eit.uni-kl.de decode_block = ''' 10010993Sjungma@eit.uni-kl.de if (bits(machInst, 11, 9) != 0x7) { 10110993Sjungma@eit.uni-kl.de return new B(machInst, sext<9>(bits(machInst, 7, 0) << 1), 10210993Sjungma@eit.uni-kl.de (ConditionCode)(uint32_t)bits(machInst, 11, 8)); 10310993Sjungma@eit.uni-kl.de } else if (bits(machInst, 8)) { 10410993Sjungma@eit.uni-kl.de return new Svc(machInst); 10510993Sjungma@eit.uni-kl.de } else { 10610993Sjungma@eit.uni-kl.de // This space will not be allocated in the future. 10710993Sjungma@eit.uni-kl.de return new Unknown(machInst); 10810993Sjungma@eit.uni-kl.de } 10910993Sjungma@eit.uni-kl.de ''' 11010993Sjungma@eit.uni-kl.de}}; 11110993Sjungma@eit.uni-kl.de 11210993Sjungma@eit.uni-kl.dedef format Thumb16UncondBranch() {{ 11311554Sjungma@eit.uni-kl.de decode_block = ''' 11411554Sjungma@eit.uni-kl.de return new B(machInst, sext<12>(bits(machInst, 10, 0) << 1), COND_UC); 11511554Sjungma@eit.uni-kl.de ''' 11611554Sjungma@eit.uni-kl.de}}; 11711554Sjungma@eit.uni-kl.de 11811554Sjungma@eit.uni-kl.dedef format Thumb32BranchesAndMiscCtrl() {{ 11911554Sjungma@eit.uni-kl.de decode_block = ''' 12011554Sjungma@eit.uni-kl.de { 12111554Sjungma@eit.uni-kl.de const uint32_t op = bits(machInst, 26, 20); 12211554Sjungma@eit.uni-kl.de const uint32_t op1 = bits(machInst, 14, 12); 12311554Sjungma@eit.uni-kl.de switch (op1 & 0x5) { 12411554Sjungma@eit.uni-kl.de case 0x0: 12511554Sjungma@eit.uni-kl.de if (op == 127) { 12611554Sjungma@eit.uni-kl.de if (op1 & 0x2) { 12711554Sjungma@eit.uni-kl.de // Permanently undefined. 12811554Sjungma@eit.uni-kl.de return new Unknown(machInst); 12911554Sjungma@eit.uni-kl.de } else { 13011554Sjungma@eit.uni-kl.de return new WarnUnimplemented("smc", machInst); 13111554Sjungma@eit.uni-kl.de } 13211554Sjungma@eit.uni-kl.de } else if ((op & 0x38) != 0x38) { 13311554Sjungma@eit.uni-kl.de const uint32_t s = bits(machInst, 26); 13411554Sjungma@eit.uni-kl.de const uint32_t j1 = bits(machInst, 13); 13511554Sjungma@eit.uni-kl.de const uint32_t j2 = bits(machInst, 11); 136 const uint32_t imm6 = bits(machInst, 21, 16); 137 const uint32_t imm11 = bits(machInst, 10, 0); 138 const int32_t imm = sext<21>((s << 20) | 139 (j2 << 19) | (j1 << 18) | 140 (imm6 << 12) | (imm11 << 1)); 141 return new B(machInst, imm, 142 (ConditionCode)(uint32_t)bits(machInst, 25, 22)); 143 } else { 144 switch (op) { 145 case 0x38: 146 { 147 const IntRegIndex rn = 148 (IntRegIndex)(uint32_t)bits(machInst, 19, 16); 149 const uint8_t byteMask = bits(machInst, 11, 8); 150 return new MsrCpsrReg(machInst, rn, byteMask); 151 } 152 case 0x39: 153 { 154 const IntRegIndex rn = 155 (IntRegIndex)(uint32_t)bits(machInst, 19, 16); 156 const uint8_t byteMask = bits(machInst, 11, 8); 157 return new MsrSpsrReg(machInst, rn, byteMask); 158 } 159 case 0x3a: 160 { 161 const uint32_t op1 = bits(machInst, 10, 8); 162 const uint32_t op2 = bits(machInst, 7, 0); 163 if (op1 != 0) { 164 const bool enable = bits(machInst, 10, 9) == 0x2; 165 const uint32_t mods = bits(machInst, 8, 0) | 166 ((enable ? 1 : 0) << 9); 167 return new Cps(machInst, mods); 168 } else if ((op2 & 0xf0) == 0xf0) { 169 return new WarnUnimplemented("dbg", machInst); 170 } else { 171 switch (op2) { 172 case 0x0: 173 return new NopInst(machInst); 174 case 0x1: 175 return new WarnUnimplemented("yield", machInst); 176 case 0x2: 177 return new WarnUnimplemented("wfe", machInst); 178 case 0x3: 179 return new WarnUnimplemented("wfi", machInst); 180 case 0x4: 181 return new WarnUnimplemented("sev", machInst); 182 default: 183 break; 184 } 185 } 186 break; 187 } 188 case 0x3b: 189 { 190 const uint32_t op = bits(machInst, 7, 4); 191 switch (op) { 192 case 0x0: 193 return new Leavex(machInst); 194 case 0x1: 195 return new Enterx(machInst); 196 case 0x2: 197 return new WarnUnimplemented("clrex", machInst); 198 case 0x4: 199 return new WarnUnimplemented("dsb", machInst); 200 case 0x5: 201 return new WarnUnimplemented("dmb", machInst); 202 case 0x6: 203 return new WarnUnimplemented("isb", machInst); 204 default: 205 break; 206 } 207 break; 208 } 209 case 0x3c: 210 { 211 // On systems that don't support bxj, bxj == bx 212 return new BxReg(machInst, 213 (IntRegIndex)(uint32_t)bits(machInst, 19, 16), 214 COND_UC); 215 } 216 case 0x3d: 217 { 218 const uint32_t imm32 = bits(machInst, 7, 0); 219 return new SubsImmPclr(machInst, INTREG_PC, INTREG_LR, 220 imm32, false); 221 } 222 case 0x3e: 223 { 224 const IntRegIndex rd = 225 (IntRegIndex)(uint32_t)bits(machInst, 11, 8); 226 return new MrsCpsr(machInst, rd); 227 } 228 case 0x3f: 229 { 230 const IntRegIndex rd = 231 (IntRegIndex)(uint32_t)bits(machInst, 11, 8); 232 return new MrsSpsr(machInst, rd); 233 } 234 } 235 break; 236 } 237 case 0x1: 238 { 239 const uint32_t s = bits(machInst, 26); 240 const uint32_t i1 = !(bits(machInst, 13) ^ s); 241 const uint32_t i2 = !(bits(machInst, 11) ^ s); 242 const uint32_t imm10 = bits(machInst, 25, 16); 243 const uint32_t imm11 = bits(machInst, 10, 0); 244 const int32_t imm = sext<25>((s << 24) | 245 (i1 << 23) | (i2 << 22) | 246 (imm10 << 12) | (imm11 << 1)); 247 return new B(machInst, imm, COND_UC); 248 } 249 case 0x4: 250 { 251 if (bits(machInst, 0) == 1) { 252 return new Unknown(machInst); 253 } 254 const uint32_t s = bits(machInst, 26); 255 const uint32_t i1 = !(bits(machInst, 13) ^ s); 256 const uint32_t i2 = !(bits(machInst, 11) ^ s); 257 const uint32_t imm10h = bits(machInst, 25, 16); 258 const uint32_t imm10l = bits(machInst, 10, 1); 259 const int32_t imm = sext<25>((s << 24) | 260 (i1 << 23) | (i2 << 22) | 261 (imm10h << 12) | (imm10l << 2)); 262 return new BlxImm(machInst, imm); 263 } 264 case 0x5: 265 { 266 const uint32_t s = bits(machInst, 26); 267 const uint32_t i1 = !(bits(machInst, 13) ^ s); 268 const uint32_t i2 = !(bits(machInst, 11) ^ s); 269 const uint32_t imm10 = bits(machInst, 25, 16); 270 const uint32_t imm11 = bits(machInst, 10, 0); 271 const int32_t imm = sext<25>((s << 24) | 272 (i1 << 23) | (i2 << 22) | 273 (imm10 << 12) | (imm11 << 1)); 274 return new Bl(machInst, imm, COND_UC); 275 } 276 default: 277 break; 278 } 279 return new Unknown(machInst); 280 } 281 ''' 282}}; 283