thumb.isa revision 7278:562ced200e54
1// -*- mode:c++ -*-
2
3// Copyright (c) 2010 ARM Limited
4// All rights reserved
5//
6// The license below extends only to copyright in the software and shall
7// not be construed as granting a license to any other intellectual
8// property including but not limited to intellectual property relating
9// to a hardware implementation of the functionality of the software
10// licensed hereunder.  You may use the software subject to the license
11// terms below provided that you ensure that this notice is replicated
12// unmodified and in its entirety in all distributions of the software,
13// modified or unmodified, in source code or in binary form.
14//
15// Copyright (c) 2009 The Regents of The University of Michigan
16// All rights reserved.
17//
18// Redistribution and use in source and binary forms, with or without
19// modification, are permitted provided that the following conditions are
20// met: redistributions of source code must retain the above copyright
21// notice, this list of conditions and the following disclaimer;
22// redistributions in binary form must reproduce the above copyright
23// notice, this list of conditions and the following disclaimer in the
24// documentation and/or other materials provided with the distribution;
25// neither the name of the copyright holders nor the names of its
26// contributors may be used to endorse or promote products derived from
27// this software without specific prior written permission.
28//
29// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
30// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
31// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
32// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
33// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
34// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
35// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
36// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
37// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
38// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
39// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
40//
41// Authors: Gabe Black
42
431: decode BIGTHUMB {
44    // 16 bit thumb instructions.
45    0: decode TOPCODE_15_13 {
46        0x0, 0x1: Thumb16ShiftAddSubMoveCmp::thumb16ShiftAddMoveCmp();
47        0x2: decode TOPCODE_12_10 {
48            0x0: Thumb16DataProcessing::thumb16DataProcessing();
49            0x1: Thumb16SpecDataAndBx::thumb16SpecDataAndBx();
50            0x2, 0x3: Thumb16MemLit::thumb16MemLit();
51            default: Thumb16MemReg::thumb16MemReg();
52        }
53        0x3, 0x4: Thumb16MemImm::thumb16MemImm();
54        0x5: decode TOPCODE_12_11 {
55            0x0: Thumb16Adr::thumb16Adr();
56            0x1: Thumb16AddSp::thumb16AddSp(); //sp, immediate
57            0x2, 0x3: Thumb16Misc::thumb16Misc();
58        }
59        0x6: decode TOPCODE_12_11 {
60            0x0, 0x1: Thumb16MacroMem::thumb16MacroMem();
61            0x2, 0x3: Thumb16CondBranchAndSvc::thumb16CondBranchAndSvc();
62        }
63        0x7: decode TOPCODE_12_11 {
64            0x0: Thumb16UncondBranch::thumb16UncondBranch();
65        }
66    }
67
68    // 32 bit thumb instructions.
69    1: decode HTOPCODE_12_11 {
70        0x1: decode HTOPCODE_10_9 {
71            0x0: decode HTOPCODE_6 {
72                0x0: decode HTOPCODE_8_7 {
73                    0x0, 0x3: decode HTOPCODE_4 {
74                        0x0: WarnUnimpl::srs();
75                        0x1: WarnUnimpl::rfe();
76                    }
77                    // This uses the same encoding as regular ARM.
78                    default: ArmMacroMem::armMacroMem();
79                }
80                0x1: Thumb32LdrStrDExTbh::thumb32LdrStrDExTbh();
81            }
82            0x1: Thumb32DataProcShiftReg::thumb32DataProcShiftReg();
83            default: decode HTOPCODE_9_8 {
84                0x2: decode LTOPCODE_4 {
85                    0x0: decode LTCOPROC {
86                        0xa, 0xb: decode OPCODE_23_20 {
87##include "vfp.isa"
88                        }
89                        default: WarnUnimpl::cdp(); // cdp2
90                    }
91                    0x1: decode LTCOPROC {
92                        0xa, 0xb: WarnUnimpl::Core_to_extension_transfer();
93                        default: decode CPNUM {
94                            15: McrMrc15::mcrMrc15();
95                            default: decode HTOPCODE_4 {
96                                0x0: WarnUnimpl::mcr();
97                                0x1: WarnUnimpl::mrc();
98                            }
99                        }
100                    }
101                }
102                0x3: WarnUnimpl::Advanced_SIMD();
103                default: decode LTCOPROC {
104                    0xa, 0xb: decode HTOPCODE_9_4 {
105                        0x00: WarnUnimpl::undefined();
106                        0x04: WarnUnimpl::mcrr(); // mcrr2
107                        0x05: WarnUnimpl::mrrc(); // mrrc2
108                        0x02, 0x06, 0x08, 0x0a, 0x0c, 0x0e, 0x10,
109                        0x12, 0x14, 0x16, 0x18, 0x1a, 0x1c, 0x1e:
110                            WarnUnimpl::stc(); // stc2
111                        0x03, 0x07, 0x09, 0x0b, 0x0d, 0x0f, 0x11,
112                        0x13, 0x15, 0x17, 0x19, 0x1b, 0x1d, 0x1f:
113                            decode HTRN {
114                                0xf: WarnUnimpl::ldc(); // ldc2 (literal)
115                                default: WarnUnimpl::ldc(); // ldc2 (immediate)
116                            }
117                    }
118                    default: decode HTOPCODE_9_5 {
119                        0x00: WarnUnimpl::undefined();
120                        0x02: WarnUnimpl::SIMD_VFP_64_bit_core_extension_transfer();
121                        0x01, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
122                        0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f:
123                            WarnUnimpl::Extension_register_load_store_instruction();
124                    }
125                }
126            }
127        }
128        0x2: decode LTOPCODE_15 {
129            0x0: decode HTOPCODE_9 {
130                0x0: Thumb32DataProcModImm::thumb32DataProcModImm();
131                0x1: Thumb32DataProcPlainBin::thumb32DataProcPlainBin();
132            }
133            0x1: Thumb32BranchesAndMiscCtrl::thumb32BranchesAndMiscCtrl();
134        }
135        0x3: decode HTOPCODE_10_9 {
136            0x0: decode HTOPCODE_4 {
137                0x0: decode HTOPCODE_8 {
138                    0x0: Thumb32StoreSingle::thumb32StoreSingle();
139                    0x1: WarnUnimpl::Advanced_SIMD_or_structure_load_store();
140                }
141                0x1: decode HTOPCODE_6_5 {
142                    0x0: LoadByteMemoryHints::loadByteMemoryHints();
143                    0x1: LoadHalfwordMemoryHints::loadHalfwordMemoryHints();
144                    0x2: Thumb32LoadWord::thumb32LoadWord();
145                    0x3: WarnUnimpl::undefined();
146                }
147            }
148            0x1: decode HTOPCODE_8_7 {
149                0x2: Thumb32MulMulAccAndAbsDiff::thumb32MulMulAccAndAbsDiff();
150                0x3: Thumb32LongMulMulAccAndDiv::thumb32LongMulMulAccAndDiv();
151                default: Thumb32DataProcReg::thumb32DataProcReg();
152            }
153            default: decode HTOPCODE_9_8 {
154                0x2: decode LTOPCODE_4 {
155                    0x0: decode LTCOPROC {
156                        0xa, 0xb: WarnUnimpl::VFP_Inst();
157                        default: WarnUnimpl::cdp(); // cdp2
158                    }
159                    0x1: decode LTCOPROC {
160                        0xa, 0xb: WarnUnimpl::Core_to_extension_transfer();
161                        default: decode CPNUM {
162                            15: McrMrc15::mcr2Mrc215();
163                            default: decode HTOPCODE_4 {
164                                0x0: WarnUnimpl::mcr2();
165                                0x1: WarnUnimpl::mrc2();
166                            }
167                        }
168                    }
169                }
170                0x3: WarnUnimpl::Advanced_SIMD();
171                default: decode LTCOPROC {
172                    0xa, 0xb: decode HTOPCODE_9_4 {
173                        0x00: WarnUnimpl::undefined();
174                        0x04: WarnUnimpl::mcrr(); // mcrr2
175                        0x05: WarnUnimpl::mrrc(); // mrrc2
176                        0x02, 0x06, 0x08, 0x0a, 0x0c, 0x0e, 0x10,
177                        0x12, 0x14, 0x16, 0x18, 0x1a, 0x1c, 0x1e:
178                            WarnUnimpl::stc(); // stc2
179                        0x03, 0x07, 0x09, 0x0b, 0x0d, 0x0f, 0x11,
180                        0x13, 0x15, 0x17, 0x19, 0x1b, 0x1d, 0x1f:
181                            decode HTRN {
182                                0xf: WarnUnimpl::ldc(); // ldc2 (literal)
183                                default: WarnUnimpl::ldc(); // ldc2 (immediate)
184                            }
185                    }
186                    default: decode HTOPCODE_9_5 {
187                        0x00: WarnUnimpl::undefined();
188                        0x02: WarnUnimpl::SIMD_VFP_64_bit_core_extension_transfer();
189                        0x01, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
190                        0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f:
191                            WarnUnimpl::Extension_register_load_store_instruction();
192                    }
193                }
194            }
195        }
196    }
197}
198