arm.isa revision 7433
16019SN/A// -*- mode:c++ -*- 26019SN/A 37102SN/A// Copyright (c) 2010 ARM Limited 47102SN/A// All rights reserved 57102SN/A// 67102SN/A// The license below extends only to copyright in the software and shall 77102SN/A// not be construed as granting a license to any other intellectual 87102SN/A// property including but not limited to intellectual property relating 97102SN/A// to a hardware implementation of the functionality of the software 107102SN/A// licensed hereunder. You may use the software subject to the license 117102SN/A// terms below provided that you ensure that this notice is replicated 127102SN/A// unmodified and in its entirety in all distributions of the software, 137102SN/A// modified or unmodified, in source code or in binary form. 147102SN/A// 156019SN/A// Copyright (c) 2007-2008 The Florida State University 166019SN/A// All rights reserved. 176019SN/A// 186019SN/A// Redistribution and use in source and binary forms, with or without 196019SN/A// modification, are permitted provided that the following conditions are 206019SN/A// met: redistributions of source code must retain the above copyright 216019SN/A// notice, this list of conditions and the following disclaimer; 226019SN/A// redistributions in binary form must reproduce the above copyright 236019SN/A// notice, this list of conditions and the following disclaimer in the 246019SN/A// documentation and/or other materials provided with the distribution; 256019SN/A// neither the name of the copyright holders nor the names of its 266019SN/A// contributors may be used to endorse or promote products derived from 276019SN/A// this software without specific prior written permission. 286019SN/A// 296019SN/A// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 306019SN/A// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 316019SN/A// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 326019SN/A// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 336019SN/A// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 346019SN/A// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 356019SN/A// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 366019SN/A// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 376019SN/A// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 386019SN/A// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 396019SN/A// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 406019SN/A// 416019SN/A// Authors: Stephen Hines 426019SN/A 436019SN/A//////////////////////////////////////////////////////////////////// 446019SN/A// 456019SN/A// The actual ARM ISA decoder 466019SN/A// -------------------------- 476019SN/A// The following instructions are specified in the ARM ISA 486019SN/A// Specification. Decoding closely follows the style specified 496019SN/A// in the ARM ISA specification document starting with Table B.1 or 3-1 506019SN/A// 516019SN/A// 526310SN/A 537433Sgblack@eecs.umich.edudecode COND_CODE { 547191Sgblack@eecs.umich.edu0xF: ArmUnconditional::armUnconditional(); 557191Sgblack@eecs.umich.edudefault: decode ENCODING { 566268SN/Aformat DataOp { 576268SN/A 0x0: decode SEVEN_AND_FOUR { 586268SN/A 1: decode MISC_OPCODE { 596268SN/A 0x9: decode PREPOST { 607161Sgblack@eecs.umich.edu 0: ArmMultAndMultAcc::armMultAndMultAcc(); 617206Sgblack@eecs.umich.edu 1: ArmSyncMem::armSyncMem(); 626019SN/A } 637129Sgblack@eecs.umich.edu 0xb, 0xd, 0xf: AddrMode3::addrMode3(); 646019SN/A } 656268SN/A 0: decode IS_MISC { 667139Sgblack@eecs.umich.edu 0: ArmDataProcReg::armDataProcReg(); 677161Sgblack@eecs.umich.edu 1: decode OPCODE_7 { 687161Sgblack@eecs.umich.edu 0x0: decode MISC_OPCODE { 697203Sgblack@eecs.umich.edu 0x0: ArmMsrMrs::armMsrMrs(); 707344SAli.Saidi@ARM.com // bxj unimplemented, treated as bx 717344SAli.Saidi@ARM.com 0x1,0x2: ArmBxClz::armBxClz(); 727161Sgblack@eecs.umich.edu 0x3: decode OPCODE { 737161Sgblack@eecs.umich.edu 0x9: ArmBlxReg::armBlxReg(); 747161Sgblack@eecs.umich.edu } 757195Sgblack@eecs.umich.edu 0x5: ArmSatAddSub::armSatAddSub(); 767401SAli.Saidi@ARM.com 0x7: Breakpoint::bkpt(); 776268SN/A } 787161Sgblack@eecs.umich.edu 0x1: ArmHalfWordMultAndMultAcc::armHalfWordMultAndMultAcc(); 796268SN/A } 806268SN/A } 816268SN/A } 826268SN/A 0x1: decode IS_MISC { 837139Sgblack@eecs.umich.edu 0: ArmDataProcImm::armDataProcImm(); 847418Sgblack@eecs.umich.edu 1: ArmMisc::armMisc(); 856268SN/A } 867120Sgblack@eecs.umich.edu 0x2: AddrMode2::addrMode2(True); 876268SN/A 0x3: decode OPCODE_4 { 887120Sgblack@eecs.umich.edu 0: AddrMode2::addrMode2(False); 897161Sgblack@eecs.umich.edu 1: decode OPCODE_24_23 { 907194Sgblack@eecs.umich.edu 0x0: ArmParallelAddSubtract::armParallelAddSubtract(); 917210Sgblack@eecs.umich.edu 0x1: ArmPackUnpackSatReverse::armPackUnpackSatReverse(); 927161Sgblack@eecs.umich.edu 0x2: ArmSignedMultiplies::armSignedMultiplies(); 937255Sgblack@eecs.umich.edu 0x3: ArmMiscMedia::armMiscMedia(); 946269SN/A } 956268SN/A } 967134Sgblack@eecs.umich.edu 0x4: ArmMacroMem::armMacroMem(); 976268SN/A 0x5: decode OPCODE_24 { 987152Sgblack@eecs.umich.edu 0: ArmBBlxImm::armBBlxImm(); 997152Sgblack@eecs.umich.edu 1: ArmBlBlxImm::armBlBlxImm(); 1006268SN/A } 1016268SN/A 0x6: decode CPNUM { 1027334Sgblack@eecs.umich.edu 0xa, 0xb: ExtensionRegLoadStore::extensionRegLoadStore(); 1036268SN/A } 1046268SN/A 0x7: decode OPCODE_24 { 1056743SN/A 0: decode OPCODE_4 { 1066743SN/A 0: decode CPNUM { 1077363Sgblack@eecs.umich.edu 0xa, 0xb: VfpData::vfpData(); 1086743SN/A } // CPNUM 1096743SN/A 1: decode CPNUM { // 27-24=1110,4 ==1 1107321Sgblack@eecs.umich.edu 0xa, 0xb: ShortFpTransfer::shortFpTransfer(); 1117269Sgblack@eecs.umich.edu 0xf: McrMrc15::mcrMrc15(); 1126743SN/A } // CPNUM (OP4 == 1) 1136743SN/A } //OPCODE_4 1146743SN/A 1157199Sgblack@eecs.umich.edu 1: Svc::svc(); 1166743SN/A } // OPCODE_24 1176743SN/A 1186268SN/A} 1196268SN/A} 1207191Sgblack@eecs.umich.edu} 1216019SN/A 122