pred_inst.hh revision 6306
1/* Copyright (c) 2007-2008 The Florida State University 2 * All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions are 6 * met: redistributions of source code must retain the above copyright 7 * notice, this list of conditions and the following disclaimer; 8 * redistributions in binary form must reproduce the above copyright 9 * notice, this list of conditions and the following disclaimer in the 10 * documentation and/or other materials provided with the distribution; 11 * neither the name of the copyright holders nor the names of its 12 * contributors may be used to endorse or promote products derived from 13 * this software without specific prior written permission. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 16 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 17 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 18 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 19 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 20 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 21 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 22 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 23 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 24 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 25 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 26 * 27 * Authors: Stephen Hines 28 */ 29#ifndef __ARCH_ARM_INSTS_PREDINST_HH__ 30#define __ARCH_ARM_INSTS_PREDINST_HH__ 31 32#include "arch/arm/insts/static_inst.hh" 33#include "base/trace.hh" 34 35namespace ArmISA 36{ 37static inline uint32_t 38rotate_imm(uint32_t immValue, int rotateValue) 39{ 40 return ((immValue >> (rotateValue & 31)) | 41 (immValue << (32 - (rotateValue & 31)))); 42} 43 44/** 45 * Base class for predicated integer operations. 46 */ 47class PredOp : public ArmStaticInst 48{ 49 protected: 50 51 ConditionCode condCode; 52 53 /// Constructor 54 PredOp(const char *mnem, MachInst _machInst, OpClass __opClass) : 55 ArmStaticInst(mnem, _machInst, __opClass), 56 condCode((ConditionCode)(unsigned)machInst.condCode) 57 { 58 } 59}; 60 61/** 62 * Base class for predicated immediate operations. 63 */ 64class PredImmOp : public PredOp 65{ 66 protected: 67 68 uint32_t imm; 69 uint32_t rotate; 70 uint32_t rotated_imm; 71 uint32_t rotated_carry; 72 73 /// Constructor 74 PredImmOp(const char *mnem, MachInst _machInst, OpClass __opClass) : 75 PredOp(mnem, _machInst, __opClass), 76 imm(machInst.imm), rotate(machInst.rotate << 1), 77 rotated_imm(0), rotated_carry(0) 78 { 79 rotated_imm = rotate_imm(imm, rotate); 80 if (rotate != 0) 81 rotated_carry = (rotated_imm >> 31) & 1; 82 } 83 84 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; 85}; 86 87/** 88 * Base class for predicated integer operations. 89 */ 90class PredIntOp : public PredOp 91{ 92 protected: 93 94 uint32_t shift_size; 95 uint32_t shift; 96 97 /// Constructor 98 PredIntOp(const char *mnem, MachInst _machInst, OpClass __opClass) : 99 PredOp(mnem, _machInst, __opClass), 100 shift_size(machInst.shiftSize), shift(machInst.shift) 101 { 102 } 103 104 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; 105}; 106 107/** 108 * Base class for predicated macro-operations. 109 */ 110class PredMacroOp : public PredOp 111{ 112 protected: 113 114 uint32_t numMicroops; 115 StaticInstPtr * microOps; 116 117 /// Constructor 118 PredMacroOp(const char *mnem, MachInst _machInst, OpClass __opClass) : 119 PredOp(mnem, _machInst, __opClass), 120 numMicroops(0) 121 { 122 // We rely on the subclasses of this object to handle the 123 // initialization of the micro-operations, since they are 124 // all of variable length 125 flags[IsMacroop] = true; 126 } 127 128 ~PredMacroOp() 129 { 130 if (numMicroops) 131 delete [] microOps; 132 } 133 134 StaticInstPtr 135 fetchMicroop(MicroPC microPC) 136 { 137 assert(microPC < numMicroops); 138 return microOps[microPC]; 139 } 140 141 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; 142}; 143 144/** 145 * Base class for predicated micro-operations. 146 */ 147class PredMicroop : public PredOp 148{ 149 /// Constructor 150 PredMicroop(const char *mnem, MachInst _machInst, OpClass __opClass) : 151 PredOp(mnem, _machInst, __opClass) 152 { 153 flags[IsMicroop] = true; 154 } 155}; 156} 157 158#endif //__ARCH_ARM_INSTS_PREDINST_HH__ 159