pred_inst.hh revision 12616
17110Sgblack@eecs.umich.edu/* 210037SARM gem5 Developers * Copyright (c) 2010, 2012-2013 ARM Limited 37110Sgblack@eecs.umich.edu * All rights reserved 47110Sgblack@eecs.umich.edu * 57110Sgblack@eecs.umich.edu * The license below extends only to copyright in the software and shall 67110Sgblack@eecs.umich.edu * not be construed as granting a license to any other intellectual 77110Sgblack@eecs.umich.edu * property including but not limited to intellectual property relating 87110Sgblack@eecs.umich.edu * to a hardware implementation of the functionality of the software 97110Sgblack@eecs.umich.edu * licensed hereunder. You may use the software subject to the license 107110Sgblack@eecs.umich.edu * terms below provided that you ensure that this notice is replicated 117110Sgblack@eecs.umich.edu * unmodified and in its entirety in all distributions of the software, 127110Sgblack@eecs.umich.edu * modified or unmodified, in source code or in binary form. 137110Sgblack@eecs.umich.edu * 147110Sgblack@eecs.umich.edu * Copyright (c) 2007-2008 The Florida State University 156253Sgblack@eecs.umich.edu * All rights reserved. 166253Sgblack@eecs.umich.edu * 176253Sgblack@eecs.umich.edu * Redistribution and use in source and binary forms, with or without 186253Sgblack@eecs.umich.edu * modification, are permitted provided that the following conditions are 196253Sgblack@eecs.umich.edu * met: redistributions of source code must retain the above copyright 206253Sgblack@eecs.umich.edu * notice, this list of conditions and the following disclaimer; 216253Sgblack@eecs.umich.edu * redistributions in binary form must reproduce the above copyright 226253Sgblack@eecs.umich.edu * notice, this list of conditions and the following disclaimer in the 236253Sgblack@eecs.umich.edu * documentation and/or other materials provided with the distribution; 246253Sgblack@eecs.umich.edu * neither the name of the copyright holders nor the names of its 256253Sgblack@eecs.umich.edu * contributors may be used to endorse or promote products derived from 266253Sgblack@eecs.umich.edu * this software without specific prior written permission. 276253Sgblack@eecs.umich.edu * 286253Sgblack@eecs.umich.edu * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 296253Sgblack@eecs.umich.edu * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 306253Sgblack@eecs.umich.edu * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 316253Sgblack@eecs.umich.edu * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 326253Sgblack@eecs.umich.edu * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 336253Sgblack@eecs.umich.edu * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 346253Sgblack@eecs.umich.edu * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 356253Sgblack@eecs.umich.edu * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 366253Sgblack@eecs.umich.edu * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 376253Sgblack@eecs.umich.edu * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 386253Sgblack@eecs.umich.edu * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 396253Sgblack@eecs.umich.edu * 406253Sgblack@eecs.umich.edu * Authors: Stephen Hines 416253Sgblack@eecs.umich.edu */ 426253Sgblack@eecs.umich.edu#ifndef __ARCH_ARM_INSTS_PREDINST_HH__ 436253Sgblack@eecs.umich.edu#define __ARCH_ARM_INSTS_PREDINST_HH__ 446253Sgblack@eecs.umich.edu 456253Sgblack@eecs.umich.edu#include "arch/arm/insts/static_inst.hh" 466253Sgblack@eecs.umich.edu#include "base/trace.hh" 476253Sgblack@eecs.umich.edu 486253Sgblack@eecs.umich.edunamespace ArmISA 496253Sgblack@eecs.umich.edu{ 506253Sgblack@eecs.umich.edustatic inline uint32_t 5110418Sandreas.hansson@arm.comrotate_imm(uint32_t immValue, uint32_t rotateValue) 526253Sgblack@eecs.umich.edu{ 5310418Sandreas.hansson@arm.com rotateValue &= 31; 5410418Sandreas.hansson@arm.com return rotateValue == 0 ? immValue : 5510418Sandreas.hansson@arm.com (immValue >> rotateValue) | (immValue << (32 - rotateValue)); 566253Sgblack@eecs.umich.edu} 576253Sgblack@eecs.umich.edu 587140Sgblack@eecs.umich.edustatic inline uint32_t 597140Sgblack@eecs.umich.edumodified_imm(uint8_t ctrlImm, uint8_t dataImm) 607140Sgblack@eecs.umich.edu{ 617140Sgblack@eecs.umich.edu uint32_t bigData = dataImm; 627140Sgblack@eecs.umich.edu uint32_t bigCtrl = ctrlImm; 637140Sgblack@eecs.umich.edu if (bigCtrl < 4) { 647140Sgblack@eecs.umich.edu switch (bigCtrl) { 657140Sgblack@eecs.umich.edu case 0: 667140Sgblack@eecs.umich.edu return bigData; 677140Sgblack@eecs.umich.edu case 1: 687140Sgblack@eecs.umich.edu return bigData | (bigData << 16); 697140Sgblack@eecs.umich.edu case 2: 707140Sgblack@eecs.umich.edu return (bigData << 8) | (bigData << 24); 717140Sgblack@eecs.umich.edu case 3: 727140Sgblack@eecs.umich.edu return (bigData << 0) | (bigData << 8) | 737140Sgblack@eecs.umich.edu (bigData << 16) | (bigData << 24); 747140Sgblack@eecs.umich.edu } 757140Sgblack@eecs.umich.edu } 767140Sgblack@eecs.umich.edu bigCtrl = (bigCtrl << 1) | ((bigData >> 7) & 0x1); 777140Sgblack@eecs.umich.edu bigData |= (1 << 7); 787140Sgblack@eecs.umich.edu return bigData << (32 - bigCtrl); 797140Sgblack@eecs.umich.edu} 807140Sgblack@eecs.umich.edu 817328Sgblack@eecs.umich.edustatic inline uint64_t 8210037SARM gem5 Developerssimd_modified_imm(bool op, uint8_t cmode, uint8_t data, bool &immValid, 8310037SARM gem5 Developers bool isAarch64 = false) 847328Sgblack@eecs.umich.edu{ 857328Sgblack@eecs.umich.edu uint64_t bigData = data; 867853SMatt.Horsnell@ARM.com immValid = true; 877328Sgblack@eecs.umich.edu switch (cmode) { 887328Sgblack@eecs.umich.edu case 0x0: 897328Sgblack@eecs.umich.edu case 0x1: 907328Sgblack@eecs.umich.edu bigData = (bigData << 0) | (bigData << 32); 917328Sgblack@eecs.umich.edu break; 927328Sgblack@eecs.umich.edu case 0x2: 937328Sgblack@eecs.umich.edu case 0x3: 947328Sgblack@eecs.umich.edu bigData = (bigData << 8) | (bigData << 40); 957328Sgblack@eecs.umich.edu break; 967328Sgblack@eecs.umich.edu case 0x4: 977328Sgblack@eecs.umich.edu case 0x5: 987328Sgblack@eecs.umich.edu bigData = (bigData << 16) | (bigData << 48); 997328Sgblack@eecs.umich.edu break; 1007328Sgblack@eecs.umich.edu case 0x6: 1017328Sgblack@eecs.umich.edu case 0x7: 1027328Sgblack@eecs.umich.edu bigData = (bigData << 24) | (bigData << 56); 1037328Sgblack@eecs.umich.edu break; 1047328Sgblack@eecs.umich.edu case 0x8: 1057328Sgblack@eecs.umich.edu case 0x9: 1067328Sgblack@eecs.umich.edu bigData = (bigData << 0) | (bigData << 16) | 1077328Sgblack@eecs.umich.edu (bigData << 32) | (bigData << 48); 1087328Sgblack@eecs.umich.edu break; 1097328Sgblack@eecs.umich.edu case 0xa: 1107328Sgblack@eecs.umich.edu case 0xb: 1117328Sgblack@eecs.umich.edu bigData = (bigData << 8) | (bigData << 24) | 1127328Sgblack@eecs.umich.edu (bigData << 40) | (bigData << 56); 1137328Sgblack@eecs.umich.edu break; 1147328Sgblack@eecs.umich.edu case 0xc: 1157328Sgblack@eecs.umich.edu bigData = (0xffULL << 0) | (bigData << 8) | 1167328Sgblack@eecs.umich.edu (0xffULL << 32) | (bigData << 40); 1177328Sgblack@eecs.umich.edu break; 1187328Sgblack@eecs.umich.edu case 0xd: 1197328Sgblack@eecs.umich.edu bigData = (0xffffULL << 0) | (bigData << 16) | 1207328Sgblack@eecs.umich.edu (0xffffULL << 32) | (bigData << 48); 1217328Sgblack@eecs.umich.edu break; 1227328Sgblack@eecs.umich.edu case 0xe: 1237328Sgblack@eecs.umich.edu if (op) { 1247639Sgblack@eecs.umich.edu bigData = 0; 1257639Sgblack@eecs.umich.edu for (int i = 7; i >= 0; i--) { 1267639Sgblack@eecs.umich.edu if (bits(data, i)) { 1277639Sgblack@eecs.umich.edu bigData |= (ULL(0xFF) << (i * 8)); 1287639Sgblack@eecs.umich.edu } 1297639Sgblack@eecs.umich.edu } 1307639Sgblack@eecs.umich.edu } else { 1317328Sgblack@eecs.umich.edu bigData = (bigData << 0) | (bigData << 8) | 1327328Sgblack@eecs.umich.edu (bigData << 16) | (bigData << 24) | 1337328Sgblack@eecs.umich.edu (bigData << 32) | (bigData << 40) | 1347328Sgblack@eecs.umich.edu (bigData << 48) | (bigData << 56); 1357328Sgblack@eecs.umich.edu } 1367639Sgblack@eecs.umich.edu break; 1377328Sgblack@eecs.umich.edu case 0xf: 13810037SARM gem5 Developers { 13910037SARM gem5 Developers uint64_t bVal = 0; 14010037SARM gem5 Developers if (!op) { 14110037SARM gem5 Developers bVal = bits(bigData, 6) ? (0x1F) : (0x20); 14210037SARM gem5 Developers bigData = (bits(bigData, 5, 0) << 19) | 14310037SARM gem5 Developers (bVal << 25) | (bits(bigData, 7) << 31); 14410037SARM gem5 Developers bigData |= (bigData << 32); 14510037SARM gem5 Developers break; 14610037SARM gem5 Developers } else if (isAarch64) { 14710037SARM gem5 Developers bVal = bits(bigData, 6) ? (0x0FF) : (0x100); 14810037SARM gem5 Developers bigData = (bits(bigData, 5, 0) << 48) | 14910037SARM gem5 Developers (bVal << 54) | (bits(bigData, 7) << 63); 15010037SARM gem5 Developers break; 15110037SARM gem5 Developers } 1527328Sgblack@eecs.umich.edu } 15312595Ssiddhesh.poyarekar@gmail.com M5_FALLTHROUGH; 1547328Sgblack@eecs.umich.edu default: 1557853SMatt.Horsnell@ARM.com immValid = false; 1567853SMatt.Horsnell@ARM.com break; 1577328Sgblack@eecs.umich.edu } 1587328Sgblack@eecs.umich.edu return bigData; 1597328Sgblack@eecs.umich.edu} 1607328Sgblack@eecs.umich.edu 1617329Sgblack@eecs.umich.edustatic inline uint64_t 1627329Sgblack@eecs.umich.eduvfp_modified_imm(uint8_t data, bool wide) 1637329Sgblack@eecs.umich.edu{ 1647329Sgblack@eecs.umich.edu uint64_t bigData = data; 1657329Sgblack@eecs.umich.edu uint64_t repData; 1667329Sgblack@eecs.umich.edu if (wide) { 1677329Sgblack@eecs.umich.edu repData = bits(data, 6) ? 0xFF : 0; 1687329Sgblack@eecs.umich.edu bigData = (bits(bigData, 5, 0) << 48) | 1697329Sgblack@eecs.umich.edu (repData << 54) | (bits(~bigData, 6) << 62) | 1707329Sgblack@eecs.umich.edu (bits(bigData, 7) << 63); 1717329Sgblack@eecs.umich.edu } else { 1727329Sgblack@eecs.umich.edu repData = bits(data, 6) ? 0x1F : 0; 1737329Sgblack@eecs.umich.edu bigData = (bits(bigData, 5, 0) << 19) | 1747329Sgblack@eecs.umich.edu (repData << 25) | (bits(~bigData, 6) << 30) | 1757329Sgblack@eecs.umich.edu (bits(bigData, 7) << 31); 1767329Sgblack@eecs.umich.edu } 1777329Sgblack@eecs.umich.edu return bigData; 1787329Sgblack@eecs.umich.edu} 1797329Sgblack@eecs.umich.edu 1807140Sgblack@eecs.umich.edu 1816253Sgblack@eecs.umich.edu/** 1826253Sgblack@eecs.umich.edu * Base class for predicated integer operations. 1836253Sgblack@eecs.umich.edu */ 1846253Sgblack@eecs.umich.educlass PredOp : public ArmStaticInst 1856253Sgblack@eecs.umich.edu{ 1866253Sgblack@eecs.umich.edu protected: 1876253Sgblack@eecs.umich.edu 1886253Sgblack@eecs.umich.edu ConditionCode condCode; 1896253Sgblack@eecs.umich.edu 1906253Sgblack@eecs.umich.edu /// Constructor 1917099Sgblack@eecs.umich.edu PredOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass) : 19210037SARM gem5 Developers ArmStaticInst(mnem, _machInst, __opClass) 1936253Sgblack@eecs.umich.edu { 19410037SARM gem5 Developers if (machInst.aarch64) 19510037SARM gem5 Developers condCode = COND_UC; 19610037SARM gem5 Developers else if (machInst.itstateMask) 19710037SARM gem5 Developers condCode = (ConditionCode)(uint8_t)machInst.itstateCond; 19810037SARM gem5 Developers else 19910037SARM gem5 Developers condCode = (ConditionCode)(unsigned)machInst.condCode; 2006253Sgblack@eecs.umich.edu } 2016253Sgblack@eecs.umich.edu}; 2026253Sgblack@eecs.umich.edu 2036253Sgblack@eecs.umich.edu/** 2046253Sgblack@eecs.umich.edu * Base class for predicated immediate operations. 2056253Sgblack@eecs.umich.edu */ 2067143Sgblack@eecs.umich.educlass PredImmOp : public PredOp 2076253Sgblack@eecs.umich.edu{ 2086306Sgblack@eecs.umich.edu protected: 2096253Sgblack@eecs.umich.edu 2106306Sgblack@eecs.umich.edu uint32_t imm; 2116306Sgblack@eecs.umich.edu uint32_t rotated_imm; 2126306Sgblack@eecs.umich.edu uint32_t rotated_carry; 2137110Sgblack@eecs.umich.edu uint32_t rotate; 2147110Sgblack@eecs.umich.edu 2157110Sgblack@eecs.umich.edu /// Constructor 2167099Sgblack@eecs.umich.edu PredImmOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass) : 2177143Sgblack@eecs.umich.edu PredOp(mnem, _machInst, __opClass), 2187143Sgblack@eecs.umich.edu imm(machInst.imm), rotated_imm(0), rotated_carry(0), 2197110Sgblack@eecs.umich.edu rotate(machInst.rotate << 1) 2206306Sgblack@eecs.umich.edu { 2216306Sgblack@eecs.umich.edu rotated_imm = rotate_imm(imm, rotate); 2226306Sgblack@eecs.umich.edu if (rotate != 0) 2237110Sgblack@eecs.umich.edu rotated_carry = bits(rotated_imm, 31); 2246306Sgblack@eecs.umich.edu } 2256306Sgblack@eecs.umich.edu 22612616Sgabeblack@google.com std::string generateDisassembly( 22712616Sgabeblack@google.com Addr pc, const SymbolTable *symtab) const override; 2286253Sgblack@eecs.umich.edu}; 2296253Sgblack@eecs.umich.edu 2306253Sgblack@eecs.umich.edu/** 2316253Sgblack@eecs.umich.edu * Base class for predicated integer operations. 2326253Sgblack@eecs.umich.edu */ 2336253Sgblack@eecs.umich.educlass PredIntOp : public PredOp 2346253Sgblack@eecs.umich.edu{ 2356306Sgblack@eecs.umich.edu protected: 2366253Sgblack@eecs.umich.edu 2376306Sgblack@eecs.umich.edu uint32_t shift_size; 2386306Sgblack@eecs.umich.edu uint32_t shift; 2396253Sgblack@eecs.umich.edu 2406306Sgblack@eecs.umich.edu /// Constructor 2417099Sgblack@eecs.umich.edu PredIntOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass) : 2426306Sgblack@eecs.umich.edu PredOp(mnem, _machInst, __opClass), 2436306Sgblack@eecs.umich.edu shift_size(machInst.shiftSize), shift(machInst.shift) 2446306Sgblack@eecs.umich.edu { 2456306Sgblack@eecs.umich.edu } 2466306Sgblack@eecs.umich.edu 24712616Sgabeblack@google.com std::string generateDisassembly( 24812616Sgabeblack@google.com Addr pc, const SymbolTable *symtab) const override; 2496253Sgblack@eecs.umich.edu}; 2506253Sgblack@eecs.umich.edu 2517137Sgblack@eecs.umich.educlass DataImmOp : public PredOp 2527137Sgblack@eecs.umich.edu{ 2537137Sgblack@eecs.umich.edu protected: 2547137Sgblack@eecs.umich.edu IntRegIndex dest, op1; 2557137Sgblack@eecs.umich.edu uint32_t imm; 2567137Sgblack@eecs.umich.edu // Whether the carry flag should be modified if that's an option for 2577137Sgblack@eecs.umich.edu // this instruction. 2587137Sgblack@eecs.umich.edu bool rotC; 2597137Sgblack@eecs.umich.edu 2607137Sgblack@eecs.umich.edu DataImmOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, 2617137Sgblack@eecs.umich.edu IntRegIndex _dest, IntRegIndex _op1, uint32_t _imm, bool _rotC) : 2627137Sgblack@eecs.umich.edu PredOp(mnem, _machInst, __opClass), 2637137Sgblack@eecs.umich.edu dest(_dest), op1(_op1), imm(_imm), rotC(_rotC) 2647137Sgblack@eecs.umich.edu {} 2657142Sgblack@eecs.umich.edu 26612616Sgabeblack@google.com std::string generateDisassembly( 26712616Sgabeblack@google.com Addr pc, const SymbolTable *symtab) const override; 2687137Sgblack@eecs.umich.edu}; 2697137Sgblack@eecs.umich.edu 2707137Sgblack@eecs.umich.educlass DataRegOp : public PredOp 2717137Sgblack@eecs.umich.edu{ 2727137Sgblack@eecs.umich.edu protected: 2737137Sgblack@eecs.umich.edu IntRegIndex dest, op1, op2; 2747137Sgblack@eecs.umich.edu int32_t shiftAmt; 2757137Sgblack@eecs.umich.edu ArmShiftType shiftType; 2767137Sgblack@eecs.umich.edu 2777137Sgblack@eecs.umich.edu DataRegOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, 2787137Sgblack@eecs.umich.edu IntRegIndex _dest, IntRegIndex _op1, IntRegIndex _op2, 2797137Sgblack@eecs.umich.edu int32_t _shiftAmt, ArmShiftType _shiftType) : 2807137Sgblack@eecs.umich.edu PredOp(mnem, _machInst, __opClass), 2817137Sgblack@eecs.umich.edu dest(_dest), op1(_op1), op2(_op2), 2827137Sgblack@eecs.umich.edu shiftAmt(_shiftAmt), shiftType(_shiftType) 2837137Sgblack@eecs.umich.edu {} 2847142Sgblack@eecs.umich.edu 28512616Sgabeblack@google.com std::string generateDisassembly( 28612616Sgabeblack@google.com Addr pc, const SymbolTable *symtab) const override; 2877137Sgblack@eecs.umich.edu}; 2887137Sgblack@eecs.umich.edu 2897137Sgblack@eecs.umich.educlass DataRegRegOp : public PredOp 2907137Sgblack@eecs.umich.edu{ 2917137Sgblack@eecs.umich.edu protected: 2927137Sgblack@eecs.umich.edu IntRegIndex dest, op1, op2, shift; 2937137Sgblack@eecs.umich.edu ArmShiftType shiftType; 2947137Sgblack@eecs.umich.edu 2957137Sgblack@eecs.umich.edu DataRegRegOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, 2967137Sgblack@eecs.umich.edu IntRegIndex _dest, IntRegIndex _op1, IntRegIndex _op2, 2977137Sgblack@eecs.umich.edu IntRegIndex _shift, ArmShiftType _shiftType) : 2987137Sgblack@eecs.umich.edu PredOp(mnem, _machInst, __opClass), 2997137Sgblack@eecs.umich.edu dest(_dest), op1(_op1), op2(_op2), shift(_shift), 3007137Sgblack@eecs.umich.edu shiftType(_shiftType) 3017137Sgblack@eecs.umich.edu {} 3027142Sgblack@eecs.umich.edu 30312616Sgabeblack@google.com std::string generateDisassembly( 30412616Sgabeblack@google.com Addr pc, const SymbolTable *symtab) const override; 3057137Sgblack@eecs.umich.edu}; 3067137Sgblack@eecs.umich.edu 3076253Sgblack@eecs.umich.edu/** 3086253Sgblack@eecs.umich.edu * Base class for predicated macro-operations. 3096253Sgblack@eecs.umich.edu */ 3106253Sgblack@eecs.umich.educlass PredMacroOp : public PredOp 3116253Sgblack@eecs.umich.edu{ 3126306Sgblack@eecs.umich.edu protected: 3136253Sgblack@eecs.umich.edu 3146306Sgblack@eecs.umich.edu uint32_t numMicroops; 3156306Sgblack@eecs.umich.edu StaticInstPtr * microOps; 3166253Sgblack@eecs.umich.edu 3176306Sgblack@eecs.umich.edu /// Constructor 3187099Sgblack@eecs.umich.edu PredMacroOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass) : 3196306Sgblack@eecs.umich.edu PredOp(mnem, _machInst, __opClass), 32010537Sandreas.hansson@arm.com numMicroops(0), microOps(nullptr) 3216306Sgblack@eecs.umich.edu { 3226306Sgblack@eecs.umich.edu // We rely on the subclasses of this object to handle the 3236306Sgblack@eecs.umich.edu // initialization of the micro-operations, since they are 3246306Sgblack@eecs.umich.edu // all of variable length 3256306Sgblack@eecs.umich.edu flags[IsMacroop] = true; 3266306Sgblack@eecs.umich.edu } 3276253Sgblack@eecs.umich.edu 3286306Sgblack@eecs.umich.edu ~PredMacroOp() 3296306Sgblack@eecs.umich.edu { 3306306Sgblack@eecs.umich.edu if (numMicroops) 3316306Sgblack@eecs.umich.edu delete [] microOps; 3326306Sgblack@eecs.umich.edu } 3336253Sgblack@eecs.umich.edu 3346306Sgblack@eecs.umich.edu StaticInstPtr 33512616Sgabeblack@google.com fetchMicroop(MicroPC microPC) const override 3366306Sgblack@eecs.umich.edu { 3376306Sgblack@eecs.umich.edu assert(microPC < numMicroops); 3386306Sgblack@eecs.umich.edu return microOps[microPC]; 3396306Sgblack@eecs.umich.edu } 3406253Sgblack@eecs.umich.edu 34112236Sgabeblack@google.com Fault 34212616Sgabeblack@google.com execute(ExecContext *, Trace::InstRecord *) const override 34312236Sgabeblack@google.com { 34412236Sgabeblack@google.com panic("Execute method called when it shouldn't!"); 34512236Sgabeblack@google.com } 34612236Sgabeblack@google.com 34712616Sgabeblack@google.com std::string generateDisassembly( 34812616Sgabeblack@google.com Addr pc, const SymbolTable *symtab) const override; 3496253Sgblack@eecs.umich.edu}; 3506253Sgblack@eecs.umich.edu 3516253Sgblack@eecs.umich.edu/** 3526253Sgblack@eecs.umich.edu * Base class for predicated micro-operations. 3536253Sgblack@eecs.umich.edu */ 3546253Sgblack@eecs.umich.educlass PredMicroop : public PredOp 3556253Sgblack@eecs.umich.edu{ 3566306Sgblack@eecs.umich.edu /// Constructor 3577099Sgblack@eecs.umich.edu PredMicroop(const char *mnem, ExtMachInst _machInst, OpClass __opClass) : 3586306Sgblack@eecs.umich.edu PredOp(mnem, _machInst, __opClass) 3596306Sgblack@eecs.umich.edu { 3606306Sgblack@eecs.umich.edu flags[IsMicroop] = true; 3616306Sgblack@eecs.umich.edu } 3627720Sgblack@eecs.umich.edu 3637720Sgblack@eecs.umich.edu void 3647720Sgblack@eecs.umich.edu advancePC(PCState &pcState) const 3657720Sgblack@eecs.umich.edu { 3667720Sgblack@eecs.umich.edu if (flags[IsLastMicroop]) 3677720Sgblack@eecs.umich.edu pcState.uEnd(); 3687720Sgblack@eecs.umich.edu else 3697720Sgblack@eecs.umich.edu pcState.uAdvance(); 3707720Sgblack@eecs.umich.edu } 3716253Sgblack@eecs.umich.edu}; 3726253Sgblack@eecs.umich.edu} 3736253Sgblack@eecs.umich.edu 3746253Sgblack@eecs.umich.edu#endif //__ARCH_ARM_INSTS_PREDINST_HH__ 375