pred_inst.hh revision 10037
17110Sgblack@eecs.umich.edu/* 210037SARM gem5 Developers * Copyright (c) 2010, 2012-2013 ARM Limited 37110Sgblack@eecs.umich.edu * All rights reserved 47110Sgblack@eecs.umich.edu * 57110Sgblack@eecs.umich.edu * The license below extends only to copyright in the software and shall 67110Sgblack@eecs.umich.edu * not be construed as granting a license to any other intellectual 77110Sgblack@eecs.umich.edu * property including but not limited to intellectual property relating 87110Sgblack@eecs.umich.edu * to a hardware implementation of the functionality of the software 97110Sgblack@eecs.umich.edu * licensed hereunder. You may use the software subject to the license 107110Sgblack@eecs.umich.edu * terms below provided that you ensure that this notice is replicated 117110Sgblack@eecs.umich.edu * unmodified and in its entirety in all distributions of the software, 127110Sgblack@eecs.umich.edu * modified or unmodified, in source code or in binary form. 137110Sgblack@eecs.umich.edu * 147110Sgblack@eecs.umich.edu * Copyright (c) 2007-2008 The Florida State University 156253Sgblack@eecs.umich.edu * All rights reserved. 166253Sgblack@eecs.umich.edu * 176253Sgblack@eecs.umich.edu * Redistribution and use in source and binary forms, with or without 186253Sgblack@eecs.umich.edu * modification, are permitted provided that the following conditions are 196253Sgblack@eecs.umich.edu * met: redistributions of source code must retain the above copyright 206253Sgblack@eecs.umich.edu * notice, this list of conditions and the following disclaimer; 216253Sgblack@eecs.umich.edu * redistributions in binary form must reproduce the above copyright 226253Sgblack@eecs.umich.edu * notice, this list of conditions and the following disclaimer in the 236253Sgblack@eecs.umich.edu * documentation and/or other materials provided with the distribution; 246253Sgblack@eecs.umich.edu * neither the name of the copyright holders nor the names of its 256253Sgblack@eecs.umich.edu * contributors may be used to endorse or promote products derived from 266253Sgblack@eecs.umich.edu * this software without specific prior written permission. 276253Sgblack@eecs.umich.edu * 286253Sgblack@eecs.umich.edu * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 296253Sgblack@eecs.umich.edu * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 306253Sgblack@eecs.umich.edu * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 316253Sgblack@eecs.umich.edu * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 326253Sgblack@eecs.umich.edu * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 336253Sgblack@eecs.umich.edu * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 346253Sgblack@eecs.umich.edu * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 356253Sgblack@eecs.umich.edu * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 366253Sgblack@eecs.umich.edu * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 376253Sgblack@eecs.umich.edu * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 386253Sgblack@eecs.umich.edu * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 396253Sgblack@eecs.umich.edu * 406253Sgblack@eecs.umich.edu * Authors: Stephen Hines 416253Sgblack@eecs.umich.edu */ 426253Sgblack@eecs.umich.edu#ifndef __ARCH_ARM_INSTS_PREDINST_HH__ 436253Sgblack@eecs.umich.edu#define __ARCH_ARM_INSTS_PREDINST_HH__ 446253Sgblack@eecs.umich.edu 456253Sgblack@eecs.umich.edu#include "arch/arm/insts/static_inst.hh" 466253Sgblack@eecs.umich.edu#include "base/trace.hh" 476253Sgblack@eecs.umich.edu 486253Sgblack@eecs.umich.edunamespace ArmISA 496253Sgblack@eecs.umich.edu{ 506253Sgblack@eecs.umich.edustatic inline uint32_t 516253Sgblack@eecs.umich.edurotate_imm(uint32_t immValue, int rotateValue) 526253Sgblack@eecs.umich.edu{ 536253Sgblack@eecs.umich.edu return ((immValue >> (rotateValue & 31)) | 546253Sgblack@eecs.umich.edu (immValue << (32 - (rotateValue & 31)))); 556253Sgblack@eecs.umich.edu} 566253Sgblack@eecs.umich.edu 577140Sgblack@eecs.umich.edustatic inline uint32_t 587140Sgblack@eecs.umich.edumodified_imm(uint8_t ctrlImm, uint8_t dataImm) 597140Sgblack@eecs.umich.edu{ 607140Sgblack@eecs.umich.edu uint32_t bigData = dataImm; 617140Sgblack@eecs.umich.edu uint32_t bigCtrl = ctrlImm; 627140Sgblack@eecs.umich.edu if (bigCtrl < 4) { 637140Sgblack@eecs.umich.edu switch (bigCtrl) { 647140Sgblack@eecs.umich.edu case 0: 657140Sgblack@eecs.umich.edu return bigData; 667140Sgblack@eecs.umich.edu case 1: 677140Sgblack@eecs.umich.edu return bigData | (bigData << 16); 687140Sgblack@eecs.umich.edu case 2: 697140Sgblack@eecs.umich.edu return (bigData << 8) | (bigData << 24); 707140Sgblack@eecs.umich.edu case 3: 717140Sgblack@eecs.umich.edu return (bigData << 0) | (bigData << 8) | 727140Sgblack@eecs.umich.edu (bigData << 16) | (bigData << 24); 737140Sgblack@eecs.umich.edu } 747140Sgblack@eecs.umich.edu } 757140Sgblack@eecs.umich.edu bigCtrl = (bigCtrl << 1) | ((bigData >> 7) & 0x1); 767140Sgblack@eecs.umich.edu bigData |= (1 << 7); 777140Sgblack@eecs.umich.edu return bigData << (32 - bigCtrl); 787140Sgblack@eecs.umich.edu} 797140Sgblack@eecs.umich.edu 807328Sgblack@eecs.umich.edustatic inline uint64_t 8110037SARM gem5 Developerssimd_modified_imm(bool op, uint8_t cmode, uint8_t data, bool &immValid, 8210037SARM gem5 Developers bool isAarch64 = false) 837328Sgblack@eecs.umich.edu{ 847328Sgblack@eecs.umich.edu uint64_t bigData = data; 857853SMatt.Horsnell@ARM.com immValid = true; 867328Sgblack@eecs.umich.edu switch (cmode) { 877328Sgblack@eecs.umich.edu case 0x0: 887328Sgblack@eecs.umich.edu case 0x1: 897328Sgblack@eecs.umich.edu bigData = (bigData << 0) | (bigData << 32); 907328Sgblack@eecs.umich.edu break; 917328Sgblack@eecs.umich.edu case 0x2: 927328Sgblack@eecs.umich.edu case 0x3: 937328Sgblack@eecs.umich.edu bigData = (bigData << 8) | (bigData << 40); 947328Sgblack@eecs.umich.edu break; 957328Sgblack@eecs.umich.edu case 0x4: 967328Sgblack@eecs.umich.edu case 0x5: 977328Sgblack@eecs.umich.edu bigData = (bigData << 16) | (bigData << 48); 987328Sgblack@eecs.umich.edu break; 997328Sgblack@eecs.umich.edu case 0x6: 1007328Sgblack@eecs.umich.edu case 0x7: 1017328Sgblack@eecs.umich.edu bigData = (bigData << 24) | (bigData << 56); 1027328Sgblack@eecs.umich.edu break; 1037328Sgblack@eecs.umich.edu case 0x8: 1047328Sgblack@eecs.umich.edu case 0x9: 1057328Sgblack@eecs.umich.edu bigData = (bigData << 0) | (bigData << 16) | 1067328Sgblack@eecs.umich.edu (bigData << 32) | (bigData << 48); 1077328Sgblack@eecs.umich.edu break; 1087328Sgblack@eecs.umich.edu case 0xa: 1097328Sgblack@eecs.umich.edu case 0xb: 1107328Sgblack@eecs.umich.edu bigData = (bigData << 8) | (bigData << 24) | 1117328Sgblack@eecs.umich.edu (bigData << 40) | (bigData << 56); 1127328Sgblack@eecs.umich.edu break; 1137328Sgblack@eecs.umich.edu case 0xc: 1147328Sgblack@eecs.umich.edu bigData = (0xffULL << 0) | (bigData << 8) | 1157328Sgblack@eecs.umich.edu (0xffULL << 32) | (bigData << 40); 1167328Sgblack@eecs.umich.edu break; 1177328Sgblack@eecs.umich.edu case 0xd: 1187328Sgblack@eecs.umich.edu bigData = (0xffffULL << 0) | (bigData << 16) | 1197328Sgblack@eecs.umich.edu (0xffffULL << 32) | (bigData << 48); 1207328Sgblack@eecs.umich.edu break; 1217328Sgblack@eecs.umich.edu case 0xe: 1227328Sgblack@eecs.umich.edu if (op) { 1237639Sgblack@eecs.umich.edu bigData = 0; 1247639Sgblack@eecs.umich.edu for (int i = 7; i >= 0; i--) { 1257639Sgblack@eecs.umich.edu if (bits(data, i)) { 1267639Sgblack@eecs.umich.edu bigData |= (ULL(0xFF) << (i * 8)); 1277639Sgblack@eecs.umich.edu } 1287639Sgblack@eecs.umich.edu } 1297639Sgblack@eecs.umich.edu } else { 1307328Sgblack@eecs.umich.edu bigData = (bigData << 0) | (bigData << 8) | 1317328Sgblack@eecs.umich.edu (bigData << 16) | (bigData << 24) | 1327328Sgblack@eecs.umich.edu (bigData << 32) | (bigData << 40) | 1337328Sgblack@eecs.umich.edu (bigData << 48) | (bigData << 56); 1347328Sgblack@eecs.umich.edu } 1357639Sgblack@eecs.umich.edu break; 1367328Sgblack@eecs.umich.edu case 0xf: 13710037SARM gem5 Developers { 13810037SARM gem5 Developers uint64_t bVal = 0; 13910037SARM gem5 Developers if (!op) { 14010037SARM gem5 Developers bVal = bits(bigData, 6) ? (0x1F) : (0x20); 14110037SARM gem5 Developers bigData = (bits(bigData, 5, 0) << 19) | 14210037SARM gem5 Developers (bVal << 25) | (bits(bigData, 7) << 31); 14310037SARM gem5 Developers bigData |= (bigData << 32); 14410037SARM gem5 Developers break; 14510037SARM gem5 Developers } else if (isAarch64) { 14610037SARM gem5 Developers bVal = bits(bigData, 6) ? (0x0FF) : (0x100); 14710037SARM gem5 Developers bigData = (bits(bigData, 5, 0) << 48) | 14810037SARM gem5 Developers (bVal << 54) | (bits(bigData, 7) << 63); 14910037SARM gem5 Developers break; 15010037SARM gem5 Developers } 1517328Sgblack@eecs.umich.edu } 1527853SMatt.Horsnell@ARM.com // Fall through, immediate encoding is invalid. 1537328Sgblack@eecs.umich.edu default: 1547853SMatt.Horsnell@ARM.com immValid = false; 1557853SMatt.Horsnell@ARM.com break; 1567328Sgblack@eecs.umich.edu } 1577328Sgblack@eecs.umich.edu return bigData; 1587328Sgblack@eecs.umich.edu} 1597328Sgblack@eecs.umich.edu 1607329Sgblack@eecs.umich.edustatic inline uint64_t 1617329Sgblack@eecs.umich.eduvfp_modified_imm(uint8_t data, bool wide) 1627329Sgblack@eecs.umich.edu{ 1637329Sgblack@eecs.umich.edu uint64_t bigData = data; 1647329Sgblack@eecs.umich.edu uint64_t repData; 1657329Sgblack@eecs.umich.edu if (wide) { 1667329Sgblack@eecs.umich.edu repData = bits(data, 6) ? 0xFF : 0; 1677329Sgblack@eecs.umich.edu bigData = (bits(bigData, 5, 0) << 48) | 1687329Sgblack@eecs.umich.edu (repData << 54) | (bits(~bigData, 6) << 62) | 1697329Sgblack@eecs.umich.edu (bits(bigData, 7) << 63); 1707329Sgblack@eecs.umich.edu } else { 1717329Sgblack@eecs.umich.edu repData = bits(data, 6) ? 0x1F : 0; 1727329Sgblack@eecs.umich.edu bigData = (bits(bigData, 5, 0) << 19) | 1737329Sgblack@eecs.umich.edu (repData << 25) | (bits(~bigData, 6) << 30) | 1747329Sgblack@eecs.umich.edu (bits(bigData, 7) << 31); 1757329Sgblack@eecs.umich.edu } 1767329Sgblack@eecs.umich.edu return bigData; 1777329Sgblack@eecs.umich.edu} 1787329Sgblack@eecs.umich.edu 1797140Sgblack@eecs.umich.edu 1806253Sgblack@eecs.umich.edu/** 1816253Sgblack@eecs.umich.edu * Base class for predicated integer operations. 1826253Sgblack@eecs.umich.edu */ 1836253Sgblack@eecs.umich.educlass PredOp : public ArmStaticInst 1846253Sgblack@eecs.umich.edu{ 1856253Sgblack@eecs.umich.edu protected: 1866253Sgblack@eecs.umich.edu 1876253Sgblack@eecs.umich.edu ConditionCode condCode; 1886253Sgblack@eecs.umich.edu 1896253Sgblack@eecs.umich.edu /// Constructor 1907099Sgblack@eecs.umich.edu PredOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass) : 19110037SARM gem5 Developers ArmStaticInst(mnem, _machInst, __opClass) 1926253Sgblack@eecs.umich.edu { 19310037SARM gem5 Developers if (machInst.aarch64) 19410037SARM gem5 Developers condCode = COND_UC; 19510037SARM gem5 Developers else if (machInst.itstateMask) 19610037SARM gem5 Developers condCode = (ConditionCode)(uint8_t)machInst.itstateCond; 19710037SARM gem5 Developers else 19810037SARM gem5 Developers condCode = (ConditionCode)(unsigned)machInst.condCode; 1996253Sgblack@eecs.umich.edu } 2006253Sgblack@eecs.umich.edu}; 2016253Sgblack@eecs.umich.edu 2026253Sgblack@eecs.umich.edu/** 2036253Sgblack@eecs.umich.edu * Base class for predicated immediate operations. 2046253Sgblack@eecs.umich.edu */ 2057143Sgblack@eecs.umich.educlass PredImmOp : public PredOp 2066253Sgblack@eecs.umich.edu{ 2076306Sgblack@eecs.umich.edu protected: 2086253Sgblack@eecs.umich.edu 2096306Sgblack@eecs.umich.edu uint32_t imm; 2106306Sgblack@eecs.umich.edu uint32_t rotated_imm; 2116306Sgblack@eecs.umich.edu uint32_t rotated_carry; 2127110Sgblack@eecs.umich.edu uint32_t rotate; 2137110Sgblack@eecs.umich.edu 2147110Sgblack@eecs.umich.edu /// Constructor 2157099Sgblack@eecs.umich.edu PredImmOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass) : 2167143Sgblack@eecs.umich.edu PredOp(mnem, _machInst, __opClass), 2177143Sgblack@eecs.umich.edu imm(machInst.imm), rotated_imm(0), rotated_carry(0), 2187110Sgblack@eecs.umich.edu rotate(machInst.rotate << 1) 2196306Sgblack@eecs.umich.edu { 2206306Sgblack@eecs.umich.edu rotated_imm = rotate_imm(imm, rotate); 2216306Sgblack@eecs.umich.edu if (rotate != 0) 2227110Sgblack@eecs.umich.edu rotated_carry = bits(rotated_imm, 31); 2236306Sgblack@eecs.umich.edu } 2246306Sgblack@eecs.umich.edu 2257143Sgblack@eecs.umich.edu std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; 2266253Sgblack@eecs.umich.edu}; 2276253Sgblack@eecs.umich.edu 2286253Sgblack@eecs.umich.edu/** 2296253Sgblack@eecs.umich.edu * Base class for predicated integer operations. 2306253Sgblack@eecs.umich.edu */ 2316253Sgblack@eecs.umich.educlass PredIntOp : public PredOp 2326253Sgblack@eecs.umich.edu{ 2336306Sgblack@eecs.umich.edu protected: 2346253Sgblack@eecs.umich.edu 2356306Sgblack@eecs.umich.edu uint32_t shift_size; 2366306Sgblack@eecs.umich.edu uint32_t shift; 2376253Sgblack@eecs.umich.edu 2386306Sgblack@eecs.umich.edu /// Constructor 2397099Sgblack@eecs.umich.edu PredIntOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass) : 2406306Sgblack@eecs.umich.edu PredOp(mnem, _machInst, __opClass), 2416306Sgblack@eecs.umich.edu shift_size(machInst.shiftSize), shift(machInst.shift) 2426306Sgblack@eecs.umich.edu { 2436306Sgblack@eecs.umich.edu } 2446306Sgblack@eecs.umich.edu 2456306Sgblack@eecs.umich.edu std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; 2466253Sgblack@eecs.umich.edu}; 2476253Sgblack@eecs.umich.edu 2487137Sgblack@eecs.umich.educlass DataImmOp : public PredOp 2497137Sgblack@eecs.umich.edu{ 2507137Sgblack@eecs.umich.edu protected: 2517137Sgblack@eecs.umich.edu IntRegIndex dest, op1; 2527137Sgblack@eecs.umich.edu uint32_t imm; 2537137Sgblack@eecs.umich.edu // Whether the carry flag should be modified if that's an option for 2547137Sgblack@eecs.umich.edu // this instruction. 2557137Sgblack@eecs.umich.edu bool rotC; 2567137Sgblack@eecs.umich.edu 2577137Sgblack@eecs.umich.edu DataImmOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, 2587137Sgblack@eecs.umich.edu IntRegIndex _dest, IntRegIndex _op1, uint32_t _imm, bool _rotC) : 2597137Sgblack@eecs.umich.edu PredOp(mnem, _machInst, __opClass), 2607137Sgblack@eecs.umich.edu dest(_dest), op1(_op1), imm(_imm), rotC(_rotC) 2617137Sgblack@eecs.umich.edu {} 2627142Sgblack@eecs.umich.edu 2637142Sgblack@eecs.umich.edu std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; 2647137Sgblack@eecs.umich.edu}; 2657137Sgblack@eecs.umich.edu 2667137Sgblack@eecs.umich.educlass DataRegOp : public PredOp 2677137Sgblack@eecs.umich.edu{ 2687137Sgblack@eecs.umich.edu protected: 2697137Sgblack@eecs.umich.edu IntRegIndex dest, op1, op2; 2707137Sgblack@eecs.umich.edu int32_t shiftAmt; 2717137Sgblack@eecs.umich.edu ArmShiftType shiftType; 2727137Sgblack@eecs.umich.edu 2737137Sgblack@eecs.umich.edu DataRegOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, 2747137Sgblack@eecs.umich.edu IntRegIndex _dest, IntRegIndex _op1, IntRegIndex _op2, 2757137Sgblack@eecs.umich.edu int32_t _shiftAmt, ArmShiftType _shiftType) : 2767137Sgblack@eecs.umich.edu PredOp(mnem, _machInst, __opClass), 2777137Sgblack@eecs.umich.edu dest(_dest), op1(_op1), op2(_op2), 2787137Sgblack@eecs.umich.edu shiftAmt(_shiftAmt), shiftType(_shiftType) 2797137Sgblack@eecs.umich.edu {} 2807142Sgblack@eecs.umich.edu 2817142Sgblack@eecs.umich.edu std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; 2827137Sgblack@eecs.umich.edu}; 2837137Sgblack@eecs.umich.edu 2847137Sgblack@eecs.umich.educlass DataRegRegOp : public PredOp 2857137Sgblack@eecs.umich.edu{ 2867137Sgblack@eecs.umich.edu protected: 2877137Sgblack@eecs.umich.edu IntRegIndex dest, op1, op2, shift; 2887137Sgblack@eecs.umich.edu ArmShiftType shiftType; 2897137Sgblack@eecs.umich.edu 2907137Sgblack@eecs.umich.edu DataRegRegOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, 2917137Sgblack@eecs.umich.edu IntRegIndex _dest, IntRegIndex _op1, IntRegIndex _op2, 2927137Sgblack@eecs.umich.edu IntRegIndex _shift, ArmShiftType _shiftType) : 2937137Sgblack@eecs.umich.edu PredOp(mnem, _machInst, __opClass), 2947137Sgblack@eecs.umich.edu dest(_dest), op1(_op1), op2(_op2), shift(_shift), 2957137Sgblack@eecs.umich.edu shiftType(_shiftType) 2967137Sgblack@eecs.umich.edu {} 2977142Sgblack@eecs.umich.edu 2987142Sgblack@eecs.umich.edu std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; 2997137Sgblack@eecs.umich.edu}; 3007137Sgblack@eecs.umich.edu 3016253Sgblack@eecs.umich.edu/** 3026253Sgblack@eecs.umich.edu * Base class for predicated macro-operations. 3036253Sgblack@eecs.umich.edu */ 3046253Sgblack@eecs.umich.educlass PredMacroOp : public PredOp 3056253Sgblack@eecs.umich.edu{ 3066306Sgblack@eecs.umich.edu protected: 3076253Sgblack@eecs.umich.edu 3086306Sgblack@eecs.umich.edu uint32_t numMicroops; 3096306Sgblack@eecs.umich.edu StaticInstPtr * microOps; 3106253Sgblack@eecs.umich.edu 3116306Sgblack@eecs.umich.edu /// Constructor 3127099Sgblack@eecs.umich.edu PredMacroOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass) : 3136306Sgblack@eecs.umich.edu PredOp(mnem, _machInst, __opClass), 3146306Sgblack@eecs.umich.edu numMicroops(0) 3156306Sgblack@eecs.umich.edu { 3166306Sgblack@eecs.umich.edu // We rely on the subclasses of this object to handle the 3176306Sgblack@eecs.umich.edu // initialization of the micro-operations, since they are 3186306Sgblack@eecs.umich.edu // all of variable length 3196306Sgblack@eecs.umich.edu flags[IsMacroop] = true; 3206306Sgblack@eecs.umich.edu } 3216253Sgblack@eecs.umich.edu 3226306Sgblack@eecs.umich.edu ~PredMacroOp() 3236306Sgblack@eecs.umich.edu { 3246306Sgblack@eecs.umich.edu if (numMicroops) 3256306Sgblack@eecs.umich.edu delete [] microOps; 3266306Sgblack@eecs.umich.edu } 3276253Sgblack@eecs.umich.edu 3286306Sgblack@eecs.umich.edu StaticInstPtr 3297720Sgblack@eecs.umich.edu fetchMicroop(MicroPC microPC) const 3306306Sgblack@eecs.umich.edu { 3316306Sgblack@eecs.umich.edu assert(microPC < numMicroops); 3326306Sgblack@eecs.umich.edu return microOps[microPC]; 3336306Sgblack@eecs.umich.edu } 3346253Sgblack@eecs.umich.edu 3356306Sgblack@eecs.umich.edu std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; 3366253Sgblack@eecs.umich.edu}; 3376253Sgblack@eecs.umich.edu 3386253Sgblack@eecs.umich.edu/** 3396253Sgblack@eecs.umich.edu * Base class for predicated micro-operations. 3406253Sgblack@eecs.umich.edu */ 3416253Sgblack@eecs.umich.educlass PredMicroop : public PredOp 3426253Sgblack@eecs.umich.edu{ 3436306Sgblack@eecs.umich.edu /// Constructor 3447099Sgblack@eecs.umich.edu PredMicroop(const char *mnem, ExtMachInst _machInst, OpClass __opClass) : 3456306Sgblack@eecs.umich.edu PredOp(mnem, _machInst, __opClass) 3466306Sgblack@eecs.umich.edu { 3476306Sgblack@eecs.umich.edu flags[IsMicroop] = true; 3486306Sgblack@eecs.umich.edu } 3497720Sgblack@eecs.umich.edu 3507720Sgblack@eecs.umich.edu void 3517720Sgblack@eecs.umich.edu advancePC(PCState &pcState) const 3527720Sgblack@eecs.umich.edu { 3537720Sgblack@eecs.umich.edu if (flags[IsLastMicroop]) 3547720Sgblack@eecs.umich.edu pcState.uEnd(); 3557720Sgblack@eecs.umich.edu else 3567720Sgblack@eecs.umich.edu pcState.uAdvance(); 3577720Sgblack@eecs.umich.edu } 3586253Sgblack@eecs.umich.edu}; 3596253Sgblack@eecs.umich.edu} 3606253Sgblack@eecs.umich.edu 3616253Sgblack@eecs.umich.edu#endif //__ARCH_ARM_INSTS_PREDINST_HH__ 362