faults.cc revision 2235
112598Snikos.nikoleris@arm.com/* 27090SN/A * Copyright (c) 2003-2005 The Regents of The University of Michigan 37090SN/A * All rights reserved. 47090SN/A * 57090SN/A * Redistribution and use in source and binary forms, with or without 67090SN/A * modification, are permitted provided that the following conditions are 77090SN/A * met: redistributions of source code must retain the above copyright 87090SN/A * notice, this list of conditions and the following disclaimer; 97090SN/A * redistributions in binary form must reproduce the above copyright 107090SN/A * notice, this list of conditions and the following disclaimer in the 117090SN/A * documentation and/or other materials provided with the distribution; 127090SN/A * neither the name of the copyright holders nor the names of its 134486SN/A * contributors may be used to endorse or promote products derived from 144486SN/A * this software without specific prior written permission. 154486SN/A * 164486SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 174486SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 184486SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 194486SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 204486SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 214486SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 224486SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 234486SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 244486SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 254486SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 264486SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 274486SN/A */ 284486SN/A 294486SN/A#include "arch/alpha/faults.hh" 304486SN/A#include "cpu/exec_context.hh" 314486SN/A#include "cpu/base.hh" 324486SN/A#include "base/trace.hh" 334486SN/A#include "kern/kernel_stats.hh" 344486SN/A 354486SN/Anamespace AlphaISA 364486SN/A{ 374486SN/A 384486SN/AFaultName MachineCheckFault::_name = "mchk"; 397584SAli.Saidi@arm.comFaultVect MachineCheckFault::_vect = 0x0401; 407584SAli.Saidi@arm.comFaultStat MachineCheckFault::_stat; 417754SWilliam.Wang@arm.com 4212472Sglenn.bergmans@arm.comFaultName AlignmentFault::_name = "unalign"; 434486SN/AFaultVect AlignmentFault::_vect = 0x0301; 4412472Sglenn.bergmans@arm.comFaultStat AlignmentFault::_stat; 453630SN/A 463630SN/AFaultName ResetFault::_name = "reset"; 4712472Sglenn.bergmans@arm.comFaultVect ResetFault::_vect = 0x0001; 4811011SAndreas.Sandberg@ARM.comFaultStat ResetFault::_stat; 4911011SAndreas.Sandberg@ARM.com 507587SAli.Saidi@arm.comFaultName ArithmeticFault::_name = "arith"; 5111244Sandreas.sandberg@arm.comFaultVect ArithmeticFault::_vect = 0x0501; 5210353SGeoffrey.Blake@arm.comFaultStat ArithmeticFault::_stat; 538212SAli.Saidi@ARM.com 545478SN/AFaultName InterruptFault::_name = "interrupt"; 555478SN/AFaultVect InterruptFault::_vect = 0x0101; 567584SAli.Saidi@arm.comFaultStat InterruptFault::_stat; 578931Sandreas.hansson@arm.com 589525SAndreas.Sandberg@ARM.comFaultName NDtbMissFault::_name = "dtb_miss_single"; 5910397Sstephan.diestelhorst@arm.comFaultVect NDtbMissFault::_vect = 0x0201; 6012467SCurtis.Dunham@arm.comFaultStat NDtbMissFault::_stat; 6111090Sandreas.sandberg@arm.com 6211236Sandreas.sandberg@arm.comFaultName PDtbMissFault::_name = "dtb_miss_double"; 6312232Sgiacomo.travaglini@arm.comFaultVect PDtbMissFault::_vect = 0x0281; 6412472Sglenn.bergmans@arm.comFaultStat PDtbMissFault::_stat; 653630SN/A 6611841Sandreas.sandberg@arm.comFaultName DtbPageFault::_name = "dfault"; 6711841Sandreas.sandberg@arm.comFaultVect DtbPageFault::_vect = 0x0381; 6811841Sandreas.sandberg@arm.comFaultStat DtbPageFault::_stat; 6911841Sandreas.sandberg@arm.com 7011841Sandreas.sandberg@arm.comFaultName DtbAcvFault::_name = "dfault"; 7111841Sandreas.sandberg@arm.comFaultVect DtbAcvFault::_vect = 0x0381; 7211841Sandreas.sandberg@arm.comFaultStat DtbAcvFault::_stat; 7311841Sandreas.sandberg@arm.com 7411841Sandreas.sandberg@arm.comFaultName ItbMissFault::_name = "itbmiss"; 7511841Sandreas.sandberg@arm.comFaultVect ItbMissFault::_vect = 0x0181; 7611841Sandreas.sandberg@arm.comFaultStat ItbMissFault::_stat; 7711841Sandreas.sandberg@arm.com 789806Sstever@gmail.comFaultName ItbPageFault::_name = "itbmiss"; 799806Sstever@gmail.comFaultVect ItbPageFault::_vect = 0x0181; 807584SAli.Saidi@arm.comFaultStat ItbPageFault::_stat; 819338SAndreas.Sandberg@arm.com 827584SAli.Saidi@arm.comFaultName ItbAcvFault::_name = "iaccvio"; 833898SN/AFaultVect ItbAcvFault::_vect = 0x0081; 849806Sstever@gmail.comFaultStat ItbAcvFault::_stat; 857950SAli.Saidi@ARM.com 867950SAli.Saidi@ARM.comFaultName UnimplementedOpcodeFault::_name = "opdec"; 879338SAndreas.Sandberg@arm.comFaultVect UnimplementedOpcodeFault::_vect = 0x0481; 889525SAndreas.Sandberg@ARM.comFaultStat UnimplementedOpcodeFault::_stat; 897950SAli.Saidi@ARM.com 907950SAli.Saidi@ARM.comFaultName FloatEnableFault::_name = "fen"; 917950SAli.Saidi@ARM.comFaultVect FloatEnableFault::_vect = 0x0581; 927950SAli.Saidi@ARM.comFaultStat FloatEnableFault::_stat; 937587SAli.Saidi@arm.com 947587SAli.Saidi@arm.comFaultName PalFault::_name = "pal"; 957587SAli.Saidi@arm.comFaultVect PalFault::_vect = 0x2001; 969338SAndreas.Sandberg@arm.comFaultStat PalFault::_stat; 977753SWilliam.Wang@arm.com 987753SWilliam.Wang@arm.comFaultName IntegerOverflowFault::_name = "intover"; 999525SAndreas.Sandberg@ARM.comFaultVect IntegerOverflowFault::_vect = 0x0501; 1007753SWilliam.Wang@arm.comFaultStat IntegerOverflowFault::_stat; 1017587SAli.Saidi@arm.com 1027587SAli.Saidi@arm.com#if FULL_SYSTEM 1038282SAli.Saidi@ARM.com 1048282SAli.Saidi@ARM.comvoid AlphaFault::invoke(ExecContext * xc) 1059338SAndreas.Sandberg@arm.com{ 1068282SAli.Saidi@ARM.com DPRINTF(Fault, "Fault %s at PC: %#x\n", name(), xc->readPC()); 10711296Sandreas.sandberg@arm.com xc->getCpuPtr()->recordEvent(csprintf("Fault %s", name())); 10811296Sandreas.sandberg@arm.com 10911296Sandreas.sandberg@arm.com assert(!xc->misspeculating()); 11011296Sandreas.sandberg@arm.com xc->getCpuPtr()->kernelStats->fault(this); 11111296Sandreas.sandberg@arm.com 11211296Sandreas.sandberg@arm.com // exception restart address 11311296Sandreas.sandberg@arm.com if (setRestartAddress() || !xc->inPalMode()) 11411296Sandreas.sandberg@arm.com xc->setMiscReg(AlphaISA::IPR_EXC_ADDR, xc->readPC()); 11511296Sandreas.sandberg@arm.com 11611296Sandreas.sandberg@arm.com if (skipFaultingInstruction()) { 11711296Sandreas.sandberg@arm.com // traps... skip faulting instruction. 11811296Sandreas.sandberg@arm.com xc->setMiscReg(AlphaISA::IPR_EXC_ADDR, 11911296Sandreas.sandberg@arm.com xc->readMiscReg(AlphaISA::IPR_EXC_ADDR) + 4); 12011296Sandreas.sandberg@arm.com } 12112474Sglenn.bergmans@arm.com 12212474Sglenn.bergmans@arm.com xc->setPC(xc->readMiscReg(AlphaISA::IPR_PAL_BASE) + vect()); 12312474Sglenn.bergmans@arm.com xc->setNextPC(xc->readPC() + sizeof(MachInst)); 12412474Sglenn.bergmans@arm.com} 12512474Sglenn.bergmans@arm.com 12612474Sglenn.bergmans@arm.comvoid ArithmeticFault::invoke(ExecContext * xc) 12712474Sglenn.bergmans@arm.com{ 12812474Sglenn.bergmans@arm.com DPRINTF(Fault, "Fault %s at PC: %#x\n", name(), xc->readPC()); 12912474Sglenn.bergmans@arm.com xc->getCpuPtr()->recordEvent(csprintf("Fault %s", name())); 13012474Sglenn.bergmans@arm.com 13112474Sglenn.bergmans@arm.com assert(!xc->misspeculating()); 13212474Sglenn.bergmans@arm.com xc->getCpuPtr()->kernelStats->fault(this); 13312474Sglenn.bergmans@arm.com 13412474Sglenn.bergmans@arm.com panic("Arithmetic traps are unimplemented!"); 13512474Sglenn.bergmans@arm.com} 13612474Sglenn.bergmans@arm.com 13712474Sglenn.bergmans@arm.com 13812474Sglenn.bergmans@arm.com/*void ArithmeticFault::invoke(ExecContext * xc) 13912474Sglenn.bergmans@arm.com{ 14012474Sglenn.bergmans@arm.com panic("Arithmetic traps are unimplemented!"); 14112474Sglenn.bergmans@arm.com}*/ 14212474Sglenn.bergmans@arm.com 14312474Sglenn.bergmans@arm.com#endif 14412474Sglenn.bergmans@arm.com 14512474Sglenn.bergmans@arm.com} // namespace AlphaISA 14612474Sglenn.bergmans@arm.com 14712474Sglenn.bergmans@arm.com/*Fault * ListOfFaults[] = { 14812474Sglenn.bergmans@arm.com (Fault *)&NoFault, 14912474Sglenn.bergmans@arm.com (Fault *)&ResetFault, 15012474Sglenn.bergmans@arm.com (Fault *)&MachineCheckFault, 15112474Sglenn.bergmans@arm.com (Fault *)&ArithmeticFault, 15212474Sglenn.bergmans@arm.com (Fault *)&InterruptFault, 15312474Sglenn.bergmans@arm.com (Fault *)&NDtbMissFault, 15412474Sglenn.bergmans@arm.com (Fault *)&PDtbMissFault, 15512474Sglenn.bergmans@arm.com (Fault *)&AlignmentFault, 15612474Sglenn.bergmans@arm.com (Fault *)&DtbPageFault, 15712474Sglenn.bergmans@arm.com (Fault *)&DtbAcvFault, 15812474Sglenn.bergmans@arm.com (Fault *)&ItbMissFault, 15912474Sglenn.bergmans@arm.com (Fault *)&ItbPageFault, 16012474Sglenn.bergmans@arm.com (Fault *)&ItbAcvFault, 16112474Sglenn.bergmans@arm.com (Fault *)&UnimplementedOpcodeFault, 16212474Sglenn.bergmans@arm.com (Fault *)&FloatEnableFault, 16312474Sglenn.bergmans@arm.com (Fault *)&PalFault, 16412474Sglenn.bergmans@arm.com (Fault *)&IntegerOverflowFault, 16512474Sglenn.bergmans@arm.com }; 16612474Sglenn.bergmans@arm.com 16712474Sglenn.bergmans@arm.comint NumFaults = sizeof(ListOfFaults) / sizeof(Fault *);*/ 16812474Sglenn.bergmans@arm.com