faults.cc revision 2235
12SN/A/* 21762SN/A * Copyright (c) 2003-2005 The Regents of The University of Michigan 32SN/A * All rights reserved. 42SN/A * 52SN/A * Redistribution and use in source and binary forms, with or without 62SN/A * modification, are permitted provided that the following conditions are 72SN/A * met: redistributions of source code must retain the above copyright 82SN/A * notice, this list of conditions and the following disclaimer; 92SN/A * redistributions in binary form must reproduce the above copyright 102SN/A * notice, this list of conditions and the following disclaimer in the 112SN/A * documentation and/or other materials provided with the distribution; 122SN/A * neither the name of the copyright holders nor the names of its 132SN/A * contributors may be used to endorse or promote products derived from 142SN/A * this software without specific prior written permission. 152SN/A * 162SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 172SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 182SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 192SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 202SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 212SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 222SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 232SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 242SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 252SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 262SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 272665Ssaidi@eecs.umich.edu */ 282665Ssaidi@eecs.umich.edu 292665Ssaidi@eecs.umich.edu#include "arch/alpha/faults.hh" 302665Ssaidi@eecs.umich.edu#include "cpu/exec_context.hh" 312665Ssaidi@eecs.umich.edu#include "cpu/base.hh" 322SN/A#include "base/trace.hh" 332SN/A#include "kern/kernel_stats.hh" 344265Sgblack@eecs.umich.edu 352SN/Anamespace AlphaISA 362SN/A{ 373506Ssaidi@eecs.umich.edu 383506Ssaidi@eecs.umich.eduFaultName MachineCheckFault::_name = "mchk"; 392SN/AFaultVect MachineCheckFault::_vect = 0x0401; 402973Sgblack@eecs.umich.eduFaultStat MachineCheckFault::_stat; 413584Ssaidi@eecs.umich.edu 4256SN/AFaultName AlignmentFault::_name = "unalign"; 434265Sgblack@eecs.umich.eduFaultVect AlignmentFault::_vect = 0x0301; 443614Sgblack@eecs.umich.eduFaultStat AlignmentFault::_stat; 451717SN/A 462518SN/AFaultName ResetFault::_name = "reset"; 4756SN/AFaultVect ResetFault::_vect = 0x0001; 482518SN/AFaultStat ResetFault::_stat; 492518SN/A 502SN/AFaultName ArithmeticFault::_name = "arith"; 513614Sgblack@eecs.umich.eduFaultVect ArithmeticFault::_vect = 0x0501; 523614Sgblack@eecs.umich.eduFaultStat ArithmeticFault::_stat; 533614Sgblack@eecs.umich.edu 543614Sgblack@eecs.umich.eduFaultName InterruptFault::_name = "interrupt"; 553065Sgblack@eecs.umich.eduFaultVect InterruptFault::_vect = 0x0101; 563065Sgblack@eecs.umich.eduFaultStat InterruptFault::_stat; 573506Ssaidi@eecs.umich.edu 583065Sgblack@eecs.umich.eduFaultName NDtbMissFault::_name = "dtb_miss_single"; 592SN/AFaultVect NDtbMissFault::_vect = 0x0201; 602973Sgblack@eecs.umich.eduFaultStat NDtbMissFault::_stat; 612SN/A 623840Shsul@eecs.umich.eduFaultName PDtbMissFault::_name = "dtb_miss_double"; 633825Ssaidi@eecs.umich.eduFaultVect PDtbMissFault::_vect = 0x0281; 643903Ssaidi@eecs.umich.eduFaultStat PDtbMissFault::_stat; 653840Shsul@eecs.umich.edu 663825Ssaidi@eecs.umich.eduFaultName DtbPageFault::_name = "dfault"; 673506Ssaidi@eecs.umich.eduFaultVect DtbPageFault::_vect = 0x0381; 683506Ssaidi@eecs.umich.eduFaultStat DtbPageFault::_stat; 694265Sgblack@eecs.umich.edu 704054Sbinkertn@umich.eduFaultName DtbAcvFault::_name = "dfault"; 714054Sbinkertn@umich.eduFaultVect DtbAcvFault::_vect = 0x0381; 724054Sbinkertn@umich.eduFaultStat DtbAcvFault::_stat; 734054Sbinkertn@umich.edu 744054Sbinkertn@umich.eduFaultName ItbMissFault::_name = "itbmiss"; 754054Sbinkertn@umich.eduFaultVect ItbMissFault::_vect = 0x0181; 764054Sbinkertn@umich.eduFaultStat ItbMissFault::_stat; 774054Sbinkertn@umich.edu 784054Sbinkertn@umich.eduFaultName ItbPageFault::_name = "itbmiss"; 794054Sbinkertn@umich.eduFaultVect ItbPageFault::_vect = 0x0181; 804054Sbinkertn@umich.eduFaultStat ItbPageFault::_stat; 814054Sbinkertn@umich.edu 824054Sbinkertn@umich.eduFaultName ItbAcvFault::_name = "iaccvio"; 834054Sbinkertn@umich.eduFaultVect ItbAcvFault::_vect = 0x0081; 844054Sbinkertn@umich.eduFaultStat ItbAcvFault::_stat; 854054Sbinkertn@umich.edu 864054Sbinkertn@umich.eduFaultName UnimplementedOpcodeFault::_name = "opdec"; 874054Sbinkertn@umich.eduFaultVect UnimplementedOpcodeFault::_vect = 0x0481; 884054Sbinkertn@umich.eduFaultStat UnimplementedOpcodeFault::_stat; 894054Sbinkertn@umich.edu 904054Sbinkertn@umich.eduFaultName FloatEnableFault::_name = "fen"; 913506Ssaidi@eecs.umich.eduFaultVect FloatEnableFault::_vect = 0x0581; 923506Ssaidi@eecs.umich.eduFaultStat FloatEnableFault::_stat; 932SN/A 942SN/AFaultName PalFault::_name = "pal"; 952SN/AFaultVect PalFault::_vect = 0x2001; 962SN/AFaultStat PalFault::_stat; 972SN/A 983748Sgblack@eecs.umich.eduFaultName IntegerOverflowFault::_name = "intover"; 993748Sgblack@eecs.umich.eduFaultVect IntegerOverflowFault::_vect = 0x0501; 1003748Sgblack@eecs.umich.eduFaultStat IntegerOverflowFault::_stat; 1013748Sgblack@eecs.umich.edu 1023748Sgblack@eecs.umich.edu#if FULL_SYSTEM 1033748Sgblack@eecs.umich.edu 1043748Sgblack@eecs.umich.eduvoid AlphaFault::invoke(ExecContext * xc) 1053748Sgblack@eecs.umich.edu{ 1063748Sgblack@eecs.umich.edu DPRINTF(Fault, "Fault %s at PC: %#x\n", name(), xc->readPC()); 1073748Sgblack@eecs.umich.edu xc->getCpuPtr()->recordEvent(csprintf("Fault %s", name())); 1083748Sgblack@eecs.umich.edu 1093748Sgblack@eecs.umich.edu assert(!xc->misspeculating()); 1103748Sgblack@eecs.umich.edu xc->getCpuPtr()->kernelStats->fault(this); 1113748Sgblack@eecs.umich.edu 1123748Sgblack@eecs.umich.edu // exception restart address 1133748Sgblack@eecs.umich.edu if (setRestartAddress() || !xc->inPalMode()) 1143748Sgblack@eecs.umich.edu xc->setMiscReg(AlphaISA::IPR_EXC_ADDR, xc->readPC()); 1153748Sgblack@eecs.umich.edu 1163748Sgblack@eecs.umich.edu if (skipFaultingInstruction()) { 1173748Sgblack@eecs.umich.edu // traps... skip faulting instruction. 1183748Sgblack@eecs.umich.edu xc->setMiscReg(AlphaISA::IPR_EXC_ADDR, 1193748Sgblack@eecs.umich.edu xc->readMiscReg(AlphaISA::IPR_EXC_ADDR) + 4); 1203748Sgblack@eecs.umich.edu } 1213748Sgblack@eecs.umich.edu 1223748Sgblack@eecs.umich.edu xc->setPC(xc->readMiscReg(AlphaISA::IPR_PAL_BASE) + vect()); 1233748Sgblack@eecs.umich.edu xc->setNextPC(xc->readPC() + sizeof(MachInst)); 1243748Sgblack@eecs.umich.edu} 1253748Sgblack@eecs.umich.edu 1263748Sgblack@eecs.umich.eduvoid ArithmeticFault::invoke(ExecContext * xc) 1273748Sgblack@eecs.umich.edu{ 1283748Sgblack@eecs.umich.edu DPRINTF(Fault, "Fault %s at PC: %#x\n", name(), xc->readPC()); 1293748Sgblack@eecs.umich.edu xc->getCpuPtr()->recordEvent(csprintf("Fault %s", name())); 1303748Sgblack@eecs.umich.edu 1313748Sgblack@eecs.umich.edu assert(!xc->misspeculating()); 1323748Sgblack@eecs.umich.edu xc->getCpuPtr()->kernelStats->fault(this); 1333748Sgblack@eecs.umich.edu 1343748Sgblack@eecs.umich.edu panic("Arithmetic traps are unimplemented!"); 1353748Sgblack@eecs.umich.edu} 1363748Sgblack@eecs.umich.edu 1373748Sgblack@eecs.umich.edu 1383748Sgblack@eecs.umich.edu/*void ArithmeticFault::invoke(ExecContext * xc) 1393748Sgblack@eecs.umich.edu{ 1403748Sgblack@eecs.umich.edu panic("Arithmetic traps are unimplemented!"); 1413748Sgblack@eecs.umich.edu}*/ 1423748Sgblack@eecs.umich.edu 1433748Sgblack@eecs.umich.edu#endif 1443748Sgblack@eecs.umich.edu 1453748Sgblack@eecs.umich.edu} // namespace AlphaISA 1463748Sgblack@eecs.umich.edu 1473748Sgblack@eecs.umich.edu/*Fault * ListOfFaults[] = { 1482SN/A (Fault *)&NoFault, 1492SN/A (Fault *)&ResetFault, 1504046Sbinkertn@umich.edu (Fault *)&MachineCheckFault, 1512SN/A (Fault *)&ArithmeticFault, 1524046Sbinkertn@umich.edu (Fault *)&InterruptFault, 1534046Sbinkertn@umich.edu (Fault *)&NDtbMissFault, 1543903Ssaidi@eecs.umich.edu (Fault *)&PDtbMissFault, 1554265Sgblack@eecs.umich.edu (Fault *)&AlignmentFault, 1564054Sbinkertn@umich.edu (Fault *)&DtbPageFault, 1572973Sgblack@eecs.umich.edu (Fault *)&DtbAcvFault, 1584265Sgblack@eecs.umich.edu (Fault *)&ItbMissFault, 1594265Sgblack@eecs.umich.edu (Fault *)&ItbPageFault, 1603065Sgblack@eecs.umich.edu (Fault *)&ItbAcvFault, 1614265Sgblack@eecs.umich.edu (Fault *)&UnimplementedOpcodeFault, 1624265Sgblack@eecs.umich.edu (Fault *)&FloatEnableFault, 1634265Sgblack@eecs.umich.edu (Fault *)&PalFault, 1644265Sgblack@eecs.umich.edu (Fault *)&IntegerOverflowFault, 1654265Sgblack@eecs.umich.edu }; 1664265Sgblack@eecs.umich.edu 1674265Sgblack@eecs.umich.eduint NumFaults = sizeof(ListOfFaults) / sizeof(Fault *);*/ 1684265Sgblack@eecs.umich.edu