SConscript revision 9020
112837Sgabeblack@google.com# -*- mode:python -*-
212837Sgabeblack@google.com
312837Sgabeblack@google.com# Copyright (c) 2006 The Regents of The University of Michigan
412837Sgabeblack@google.com# All rights reserved.
512837Sgabeblack@google.com#
612837Sgabeblack@google.com# Redistribution and use in source and binary forms, with or without
712837Sgabeblack@google.com# modification, are permitted provided that the following conditions are
812837Sgabeblack@google.com# met: redistributions of source code must retain the above copyright
912837Sgabeblack@google.com# notice, this list of conditions and the following disclaimer;
1012837Sgabeblack@google.com# redistributions in binary form must reproduce the above copyright
1112837Sgabeblack@google.com# notice, this list of conditions and the following disclaimer in the
1212837Sgabeblack@google.com# documentation and/or other materials provided with the distribution;
1312837Sgabeblack@google.com# neither the name of the copyright holders nor the names of its
1412837Sgabeblack@google.com# contributors may be used to endorse or promote products derived from
1512837Sgabeblack@google.com# this software without specific prior written permission.
1612837Sgabeblack@google.com#
1712837Sgabeblack@google.com# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
1812837Sgabeblack@google.com# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
1912837Sgabeblack@google.com# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
2012837Sgabeblack@google.com# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
2112837Sgabeblack@google.com# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
2212837Sgabeblack@google.com# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
2312837Sgabeblack@google.com# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
2412837Sgabeblack@google.com# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
2512837Sgabeblack@google.com# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
2612837Sgabeblack@google.com# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
2712837Sgabeblack@google.com# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
2812837Sgabeblack@google.com#
2912837Sgabeblack@google.com# Authors: Steve Reinhardt
3012837Sgabeblack@google.com
3112837Sgabeblack@google.comimport sys
3212837Sgabeblack@google.comimport os
3312954Sgabeblack@google.com
3412955Sgabeblack@google.comImport('*')
3512837Sgabeblack@google.com
3612863Sgabeblack@google.com#################################################################
3712950Sgabeblack@google.com#
3812952Sgabeblack@google.com# ISA "switch header" generation.
3912953Sgabeblack@google.com#
4013038Sgabeblack@google.com# Auto-generate arch headers that include the right ISA-specific
4112953Sgabeblack@google.com# header based on the setting of THE_ISA preprocessor variable.
4212837Sgabeblack@google.com#
4312837Sgabeblack@google.com#################################################################
4412837Sgabeblack@google.com
4512837Sgabeblack@google.com# List of headers to generate
4612837Sgabeblack@google.comisa_switch_hdrs = Split('''
4712943Sgabeblack@google.com        decoder.hh
4812837Sgabeblack@google.com        interrupts.hh
4912837Sgabeblack@google.com        isa.hh
5012837Sgabeblack@google.com        isa_traits.hh
5112837Sgabeblack@google.com        kernel_stats.hh
5212837Sgabeblack@google.com        locked_mem.hh
5312838Sgabeblack@google.com        microcode_rom.hh
5412837Sgabeblack@google.com        mmapped_ipr.hh
5512837Sgabeblack@google.com        mt.hh
5612940Sgabeblack@google.com        process.hh
5712839Sgabeblack@google.com        predecoder.hh
5812837Sgabeblack@google.com        registers.hh
59        remote_gdb.hh
60        stacktrace.hh
61        tlb.hh
62        types.hh
63        utility.hh
64        vtophys.hh
65        ''')
66
67# Set up this directory to support switching headers
68make_switching_dir('arch', isa_switch_hdrs, env)
69
70#################################################################
71#
72# Include architecture-specific files.
73#
74#################################################################
75
76#
77# Build a SCons scanner for ISA files
78#
79import SCons.Scanner
80
81isa_scanner = SCons.Scanner.Classic("ISAScan",
82                                    [".isa", ".ISA"],
83                                    "SRCDIR",
84                                    r'^\s*##include\s+"([\w/.-]*)"')
85
86env.Append(SCANNERS = isa_scanner)
87
88#
89# Now create a Builder object that uses isa_parser.py to generate C++
90# output from the ISA description (*.isa) files.
91#
92
93isa_parser = File('isa_parser.py')
94
95# The emitter patches up the sources & targets to include the
96# autogenerated files as targets and isa parser itself as a source.
97def isa_desc_emitter(target, source, env):
98    cpu_models = list(env['CPU_MODELS'])
99    cpu_models.append('CheckerCPU')
100
101    # Several files are generated from the ISA description.
102    # We always get the basic decoder and header file.
103    target = [ 'decoder.cc', 'decoder.hh', 'max_inst_regs.hh' ]
104    # We also get an execute file for each selected CPU model.
105    target += [CpuModel.dict[cpu].filename for cpu in cpu_models]
106
107    # List the isa parser as a source.
108    source += [ isa_parser ]
109    # Add in the CPU models.
110    source += [ Value(m) for m in cpu_models ]
111
112    return [os.path.join("generated", t) for t in target], source
113
114ARCH_DIR = Dir('.')
115
116# import ply here because SCons screws with sys.path when performing actions.
117import ply
118
119def isa_desc_action_func(target, source, env):
120    # Add the current directory to the system path so we can import files
121    sys.path[0:0] = [ ARCH_DIR.srcnode().abspath ]
122    import isa_parser
123
124    # Skip over the ISA description itself and the parser to the CPU models.
125    models = [ s.get_contents() for s in source[2:] ]
126    cpu_models = [CpuModel.dict[cpu] for cpu in models]
127    parser = isa_parser.ISAParser(target[0].dir.abspath, cpu_models)
128    parser.parse_isa_desc(source[0].abspath)
129isa_desc_action = MakeAction(isa_desc_action_func, Transform("ISA DESC", 1))
130
131# Also include the CheckerCPU as one of the models if it is being
132# enabled via command line.
133isa_desc_builder = Builder(action=isa_desc_action, emitter=isa_desc_emitter)
134
135env.Append(BUILDERS = { 'ISADesc' : isa_desc_builder })
136
137DebugFlag('IntRegs')
138DebugFlag('FloatRegs')
139DebugFlag('MiscRegs')
140CompoundFlag('Registers', [ 'IntRegs', 'FloatRegs', 'MiscRegs' ])
141