SConscript revision 6993:a24d88e850e2
111986Sandreas.sandberg@arm.com# -*- mode:python -*- 211986Sandreas.sandberg@arm.com 311986Sandreas.sandberg@arm.com# Copyright (c) 2006 The Regents of The University of Michigan 411986Sandreas.sandberg@arm.com# All rights reserved. 511986Sandreas.sandberg@arm.com# 611986Sandreas.sandberg@arm.com# Redistribution and use in source and binary forms, with or without 711986Sandreas.sandberg@arm.com# modification, are permitted provided that the following conditions are 811986Sandreas.sandberg@arm.com# met: redistributions of source code must retain the above copyright 911986Sandreas.sandberg@arm.com# notice, this list of conditions and the following disclaimer; 1011986Sandreas.sandberg@arm.com# redistributions in binary form must reproduce the above copyright 1111986Sandreas.sandberg@arm.com# notice, this list of conditions and the following disclaimer in the 1211986Sandreas.sandberg@arm.com# documentation and/or other materials provided with the distribution; 1311986Sandreas.sandberg@arm.com# neither the name of the copyright holders nor the names of its 1411986Sandreas.sandberg@arm.com# contributors may be used to endorse or promote products derived from 1511986Sandreas.sandberg@arm.com# this software without specific prior written permission. 1611986Sandreas.sandberg@arm.com# 1711986Sandreas.sandberg@arm.com# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 1811986Sandreas.sandberg@arm.com# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 1914299Sbbruce@ucdavis.edu# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 2011986Sandreas.sandberg@arm.com# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 2111986Sandreas.sandberg@arm.com# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 2211986Sandreas.sandberg@arm.com# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 2311986Sandreas.sandberg@arm.com# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 2411986Sandreas.sandberg@arm.com# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 2511986Sandreas.sandberg@arm.com# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 2611986Sandreas.sandberg@arm.com# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 2711986Sandreas.sandberg@arm.com# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 2811986Sandreas.sandberg@arm.com# 2911986Sandreas.sandberg@arm.com# Authors: Steve Reinhardt 3011986Sandreas.sandberg@arm.com 3111986Sandreas.sandberg@arm.comimport sys 3211986Sandreas.sandberg@arm.com 3311986Sandreas.sandberg@arm.comImport('*') 3414299Sbbruce@ucdavis.edu 3514299Sbbruce@ucdavis.edu################################################################# 3611986Sandreas.sandberg@arm.com# 3712391Sjason@lowepower.com# ISA "switch header" generation. 3811986Sandreas.sandberg@arm.com# 3912391Sjason@lowepower.com# Auto-generate arch headers that include the right ISA-specific 4012391Sjason@lowepower.com# header based on the setting of THE_ISA preprocessor variable. 4112391Sjason@lowepower.com# 4212391Sjason@lowepower.com################################################################# 4312391Sjason@lowepower.com 4412391Sjason@lowepower.com# List of headers to generate 4512391Sjason@lowepower.comisa_switch_hdrs = Split(''' 4612391Sjason@lowepower.com arguments.hh 4712391Sjason@lowepower.com faults.hh 4812391Sjason@lowepower.com interrupts.hh 4911986Sandreas.sandberg@arm.com isa.hh 5011986Sandreas.sandberg@arm.com isa_traits.hh 5112391Sjason@lowepower.com kernel_stats.hh 5211986Sandreas.sandberg@arm.com locked_mem.hh 5311986Sandreas.sandberg@arm.com microcode_rom.hh 5412391Sjason@lowepower.com mmaped_ipr.hh 5512391Sjason@lowepower.com mt.hh 5612391Sjason@lowepower.com process.hh 5712391Sjason@lowepower.com predecoder.hh 5812391Sjason@lowepower.com registers.hh 5912391Sjason@lowepower.com remote_gdb.hh 6012391Sjason@lowepower.com stacktrace.hh 6112391Sjason@lowepower.com tlb.hh 6212391Sjason@lowepower.com types.hh 6312391Sjason@lowepower.com utility.hh 6412391Sjason@lowepower.com vtophys.hh 6512391Sjason@lowepower.com ''') 6612391Sjason@lowepower.com 6711986Sandreas.sandberg@arm.com# Set up this directory to support switching headers 6811986Sandreas.sandberg@arm.commake_switching_dir('arch', isa_switch_hdrs, env) 6911986Sandreas.sandberg@arm.com 7011986Sandreas.sandberg@arm.com################################################################# 7111986Sandreas.sandberg@arm.com# 7211986Sandreas.sandberg@arm.com# Include architecture-specific files. 7311986Sandreas.sandberg@arm.com# 7411986Sandreas.sandberg@arm.com################################################################# 7511986Sandreas.sandberg@arm.com 7611986Sandreas.sandberg@arm.com# 7712391Sjason@lowepower.com# Build a SCons scanner for ISA files 7811986Sandreas.sandberg@arm.com# 7911986Sandreas.sandberg@arm.comimport SCons.Scanner 8012391Sjason@lowepower.com 8111986Sandreas.sandberg@arm.comisa_scanner = SCons.Scanner.Classic("ISAScan", 8211986Sandreas.sandberg@arm.com [".isa", ".ISA"], 8311986Sandreas.sandberg@arm.com "SRCDIR", 8411986Sandreas.sandberg@arm.com r'^\s*##include\s+"([\w/.-]*)"') 8512391Sjason@lowepower.com 8612391Sjason@lowepower.comenv.Append(SCANNERS = isa_scanner) 8714299Sbbruce@ucdavis.edu 8814299Sbbruce@ucdavis.edu# 8911986Sandreas.sandberg@arm.com# Now create a Builder object that uses isa_parser.py to generate C++ 9012391Sjason@lowepower.com# output from the ISA description (*.isa) files. 9112391Sjason@lowepower.com# 9211986Sandreas.sandberg@arm.com 9311986Sandreas.sandberg@arm.com# 9411986Sandreas.sandberg@arm.com# Grab the CPU Model information 9511986Sandreas.sandberg@arm.com# 9611986Sandreas.sandberg@arm.com 9711986Sandreas.sandberg@arm.com# Convert to File node to fix path 9814299Sbbruce@ucdavis.educpu_models_file = File('../cpu/cpu_models.py') 9911986Sandreas.sandberg@arm.com 10011986Sandreas.sandberg@arm.com# This sucks in the defintions of the CpuModel objects. 10111986Sandreas.sandberg@arm.comexecfile(cpu_models_file.srcnode().abspath) 10211986Sandreas.sandberg@arm.com 10311986Sandreas.sandberg@arm.com# The emitter patches up the sources & targets to include the 10411986Sandreas.sandberg@arm.com# autogenerated files as targets and isa parser itself as a source. 10511986Sandreas.sandberg@arm.comdef isa_desc_emitter(target, source, env): 10611986Sandreas.sandberg@arm.com cpu_models = list(env['CPU_MODELS']) 10711986Sandreas.sandberg@arm.com if env['USE_CHECKER']: 10811986Sandreas.sandberg@arm.com cpu_models.append('CheckerCPU') 10911986Sandreas.sandberg@arm.com 11011986Sandreas.sandberg@arm.com # Several files are generated from the ISA description. 11112391Sjason@lowepower.com # We always get the basic decoder and header file. 11212391Sjason@lowepower.com target = [ 'decoder.cc', 'decoder.hh', 'max_inst_regs.hh' ] 11311986Sandreas.sandberg@arm.com # We also get an execute file for each selected CPU model. 11411986Sandreas.sandberg@arm.com target += [CpuModel.dict[cpu].filename for cpu in cpu_models] 11511986Sandreas.sandberg@arm.com 11612391Sjason@lowepower.com return target, source + [ Value(m) for m in cpu_models ] 11711986Sandreas.sandberg@arm.com 11811986Sandreas.sandberg@arm.comARCH_DIR = Dir('.') 11911986Sandreas.sandberg@arm.com 12011986Sandreas.sandberg@arm.comdef isa_desc_action(target, source, env): 12112391Sjason@lowepower.com # Add the current directory to the system path so we can import files 12212391Sjason@lowepower.com sys.path[0:0] = [ ARCH_DIR.srcnode().abspath ] 12311986Sandreas.sandberg@arm.com import isa_parser 12414299Sbbruce@ucdavis.edu 12514299Sbbruce@ucdavis.edu models = [ s.get_contents() for s in source[1:] ] 12614299Sbbruce@ucdavis.edu cpu_models = [CpuModel.dict[cpu] for cpu in models] 12714299Sbbruce@ucdavis.edu parser = isa_parser.ISAParser(target[0].dir.abspath, cpu_models) 12814299Sbbruce@ucdavis.edu parser.parse_isa_desc(source[0].abspath) 12914299Sbbruce@ucdavis.edu 13012391Sjason@lowepower.com# Also include the CheckerCPU as one of the models if it is being 13114299Sbbruce@ucdavis.edu# enabled via command line. 13214299Sbbruce@ucdavis.eduisa_desc_builder = Builder(action=isa_desc_action, emitter=isa_desc_emitter) 13311986Sandreas.sandberg@arm.com 13411986Sandreas.sandberg@arm.comenv.Append(BUILDERS = { 'ISADesc' : isa_desc_builder }) 13511986Sandreas.sandberg@arm.com 13611986Sandreas.sandberg@arm.comTraceFlag('IntRegs') 13711986Sandreas.sandberg@arm.comTraceFlag('FloatRegs') 13811986Sandreas.sandberg@arm.comTraceFlag('MiscRegs') 13911986Sandreas.sandberg@arm.comCompoundFlag('Registers', [ 'IntRegs', 'FloatRegs', 'MiscRegs' ]) 14014299Sbbruce@ucdavis.edu