SConscript revision 10196 
1# -*- mode:python -*-
2
3# Copyright (c) 2006 The Regents of The University of Michigan
4# All rights reserved.
5#
6# Redistribution and use in source and binary forms, with or without
7# modification, are permitted provided that the following conditions are
8# met: redistributions of source code must retain the above copyright
9# notice, this list of conditions and the following disclaimer;
10# redistributions in binary form must reproduce the above copyright
11# notice, this list of conditions and the following disclaimer in the
12# documentation and/or other materials provided with the distribution;
13# neither the name of the copyright holders nor the names of its
14# contributors may be used to endorse or promote products derived from
15# this software without specific prior written permission.
16#
17# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
18# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
19# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
20# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
21# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
22# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
23# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
27# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28#
29# Authors: Steve Reinhardt
30
31import sys
32import os
33import re
34
35Import('*')
36
37#################################################################
38#
39# ISA "switch header" generation.
40#
41# Auto-generate arch headers that include the right ISA-specific
42# header based on the setting of THE_ISA preprocessor variable.
43#
44#################################################################
45
46# List of headers to generate
47isa_switch_hdrs = Split('''
48        decoder.hh
49        interrupts.hh
50        isa.hh
51        isa_traits.hh
52        kernel_stats.hh
53        locked_mem.hh
54        microcode_rom.hh
55        mmapped_ipr.hh
56        mt.hh
57        process.hh
58        registers.hh
59        remote_gdb.hh
60        stacktrace.hh
61        tlb.hh
62        types.hh
63        utility.hh
64        vtophys.hh
65        ''')
66
67# Set up this directory to support switching headers
68make_switching_dir('arch', isa_switch_hdrs, env)
69
70#################################################################
71#
72# Include architecture-specific files.
73#
74#################################################################
75
76#
77# Build a SCons scanner for ISA files
78#
79import SCons.Scanner
80
81isa_scanner = SCons.Scanner.Classic("ISAScan",
82                                    [".isa", ".ISA"],
83                                    "SRCDIR",
84                                    r'^\s*##include\s+"([\w/.-]*)"')
85
86env.Append(SCANNERS = isa_scanner)
87
88#
89# Now create a Builder object that uses isa_parser.py to generate C++
90# output from the ISA description (*.isa) files.
91#
92
93isa_parser = File('isa_parser.py')
94
95# The emitter patches up the sources & targets to include the
96# autogenerated files as targets and isa parser itself as a source.
97def isa_desc_emitter(target, source, env):
98    cpu_models = list(env['CPU_MODELS'])
99    cpu_models.append('CheckerCPU')
100
101    # List the isa parser as a source.
102    source += [ isa_parser ]
103    # Add in the CPU models.
104    source += [ Value(m) for m in cpu_models ]
105
106    # Specify different targets depending on if we're running the ISA
107    # parser for its dependency information, or for the generated files.
108    # (As an optimization, the ISA parser detects the useless second run
109    # and skips doing any work, if the first run was performed, since it
110    # always generates all its files). The way we track this in SCons is the
111    # <arch>_isa_outputs value in the environment (env). If it's unset, we
112    # don't know what the dependencies are so we ask for generated/inc.d to
113    # be generated so they can be acquired. If we know what they are, then
114    # it's because we've already processed inc.d and then claim that our
115    # outputs (targets) will be thus.
116    isa = env['TARGET_ISA']
117    key = '%s_isa_outputs' % isa
118    if key in env:
119        targets = [ os.path.join('generated', f) for f in env[key] ]
120    else:
121        targets = [ os.path.join('generated','inc.d') ]
122
123    def prefix(s):
124        return os.path.join(target[0].dir.up().abspath, s)
125
126    return [ prefix(t) for t in targets ], source
127
128ARCH_DIR = Dir('.')
129
130# import ply here because SCons screws with sys.path when performing actions.
131import ply
132
133def isa_desc_action_func(target, source, env):
134    # Add the current directory to the system path so we can import files
135    sys.path[0:0] = [ ARCH_DIR.srcnode().abspath ]
136    import isa_parser
137
138    # Skip over the ISA description itself and the parser to the CPU models.
139    models = [ s.get_contents() for s in source[2:] ]
140    cpu_models = [CpuModel.dict[cpu] for cpu in models]
141    parser = isa_parser.ISAParser(target[0].dir.abspath, cpu_models)
142    parser.parse_isa_desc(source[0].abspath)
143isa_desc_action = MakeAction(isa_desc_action_func, Transform("ISA DESC", 1))
144
145# Also include the CheckerCPU as one of the models if it is being
146# enabled via command line.
147isa_desc_builder = Builder(action=isa_desc_action, emitter=isa_desc_emitter)
148
149env.Append(BUILDERS = { 'ISADesc' : isa_desc_builder })
150
151# The ISA is generated twice: the first time to find out what it generates,
152# and the second time to make scons happy by telling the ISADesc builder
153# what it will make before it builds it.
154def scan_isa_deps(target, source, env):
155    # Process dependency file generated by the ISA parser --
156    # add the listed files to the dependency tree of the build.
157    source = source[0]
158    archbase = source.dir.up().path
159
160    try:
161        depfile = open(source.abspath, 'r')
162    except:
163        print "scan_isa_deps: Can't open ISA deps file '%s' in %s" % \
164              (source.path,os.getcwd())
165        raise
166
167    # Scan through the lines
168    targets = {}
169    for line in depfile:
170        # Read the dependency line with the format
171        # <target file>: [ <dependent file>* ]
172        m = re.match(r'^\s*([^:]+\.([^\.:]+))\s*:\s*(.*)', line)
173        assert(m)
174        targ, extn = m.group(1,2)
175        deps = m.group(3).split()
176
177        files = [ targ ] + deps
178        for f in files:
179            targets[f] = True
180            # Eliminate unnecessary re-generation if we already generated it
181            env.Precious(os.path.join(archbase, 'generated', f))
182
183        files = [ os.path.join(archbase, 'generated', f) for f in files ]
184
185        if extn == 'cc':
186            Source(os.path.join(archbase,'generated', targ))
187    depfile.close()
188    env[env['TARGET_ISA'] + '_isa_outputs'] = targets.keys()
189
190    isa = env.ISADesc(os.path.join(archbase,'isa','main.isa'))
191    for t in targets:
192        env.Depends('#all-isas', isa)
193
194env.Append(BUILDERS = {'ScanISA' :
195                        Builder(action=MakeAction(scan_isa_deps,
196                                                  Transform("NEW DEPS", 1)))})
197
198DebugFlag('IntRegs')
199DebugFlag('FloatRegs')
200DebugFlag('CCRegs')
201DebugFlag('MiscRegs')
202CompoundFlag('Registers', [ 'IntRegs', 'FloatRegs', 'CCRegs', 'MiscRegs' ])
203