SConscript revision 7396 
16157Snate@binkert.org# -*- mode:python -*-
26157Snate@binkert.org
36157Snate@binkert.org# Copyright (c) 2006 The Regents of The University of Michigan
46157Snate@binkert.org# All rights reserved.
56157Snate@binkert.org#
66157Snate@binkert.org# Redistribution and use in source and binary forms, with or without
76157Snate@binkert.org# modification, are permitted provided that the following conditions are
86157Snate@binkert.org# met: redistributions of source code must retain the above copyright
96157Snate@binkert.org# notice, this list of conditions and the following disclaimer;
106157Snate@binkert.org# redistributions in binary form must reproduce the above copyright
116157Snate@binkert.org# notice, this list of conditions and the following disclaimer in the
126157Snate@binkert.org# documentation and/or other materials provided with the distribution;
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146157Snate@binkert.org# contributors may be used to endorse or promote products derived from
156157Snate@binkert.org# this software without specific prior written permission.
166157Snate@binkert.org#
176157Snate@binkert.org# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
186157Snate@binkert.org# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
196157Snate@binkert.org# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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216157Snate@binkert.org# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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266157Snate@binkert.org# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
276157Snate@binkert.org# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
286157Snate@binkert.org#
296157Snate@binkert.org# Authors: Steve Reinhardt
306157Snate@binkert.org
316157Snate@binkert.orgimport sys
326157Snate@binkert.org
336168Snate@binkert.orgImport('*')
346168Snate@binkert.org
356168Snate@binkert.org#################################################################
366876Ssteve.reinhardt@amd.com#
376876Ssteve.reinhardt@amd.com# ISA "switch header" generation.
386157Snate@binkert.org#
396157Snate@binkert.org# Auto-generate arch headers that include the right ISA-specific
406157Snate@binkert.org# header based on the setting of THE_ISA preprocessor variable.
416897SBrad.Beckmann@amd.com#
426157Snate@binkert.org#################################################################
436157Snate@binkert.org
44# List of headers to generate
45isa_switch_hdrs = Split('''
46        arguments.hh
47        faults.hh
48        interrupts.hh
49	isa.hh
50        isa_traits.hh
51        kernel_stats.hh
52        locked_mem.hh
53        microcode_rom.hh
54        mmaped_ipr.hh
55        mt.hh
56        process.hh
57        predecoder.hh
58        registers.hh
59        remote_gdb.hh
60        stacktrace.hh
61        tlb.hh
62        types.hh
63        utility.hh
64        vtophys.hh
65        ''')
66
67# Set up this directory to support switching headers
68make_switching_dir('arch', isa_switch_hdrs, env)
69
70#################################################################
71#
72# Include architecture-specific files.
73#
74#################################################################
75
76#
77# Build a SCons scanner for ISA files
78#
79import SCons.Scanner
80
81isa_scanner = SCons.Scanner.Classic("ISAScan",
82                                    [".isa", ".ISA"],
83                                    "SRCDIR",
84                                    r'^\s*##include\s+"([\w/.-]*)"')
85
86env.Append(SCANNERS = isa_scanner)
87
88#
89# Now create a Builder object that uses isa_parser.py to generate C++
90# output from the ISA description (*.isa) files.
91#
92
93# The emitter patches up the sources & targets to include the
94# autogenerated files as targets and isa parser itself as a source.
95def isa_desc_emitter(target, source, env):
96    cpu_models = list(env['CPU_MODELS'])
97    if env['USE_CHECKER']:
98        cpu_models.append('CheckerCPU')
99
100    # Several files are generated from the ISA description.
101    # We always get the basic decoder and header file.
102    target = [ 'decoder.cc', 'decoder.hh', 'max_inst_regs.hh' ]
103    # We also get an execute file for each selected CPU model.
104    target += [CpuModel.dict[cpu].filename for cpu in cpu_models]
105
106    return target, source + [ Value(m) for m in cpu_models ]
107
108ARCH_DIR = Dir('.')
109
110# import ply here because SCons screws with sys.path when performing actions.
111import ply
112
113def isa_desc_action(target, source, env):
114    # Add the current directory to the system path so we can import files
115    sys.path[0:0] = [ ARCH_DIR.srcnode().abspath ]
116    import isa_parser
117
118    models = [ s.get_contents() for s in source[1:] ]
119    cpu_models = [CpuModel.dict[cpu] for cpu in models]
120    parser = isa_parser.ISAParser(target[0].dir.abspath, cpu_models)
121    parser.parse_isa_desc(source[0].abspath)
122
123# Also include the CheckerCPU as one of the models if it is being
124# enabled via command line.
125isa_desc_builder = Builder(action=isa_desc_action, emitter=isa_desc_emitter)
126
127env.Append(BUILDERS = { 'ISADesc' : isa_desc_builder })
128
129TraceFlag('IntRegs')
130TraceFlag('FloatRegs')
131TraceFlag('MiscRegs')
132CompoundFlag('Registers', [ 'IntRegs', 'FloatRegs', 'MiscRegs' ])
133