SConscript revision 2788
16757SAli.Saidi@ARM.com# -*- mode:python -*-
26757SAli.Saidi@ARM.com
36757SAli.Saidi@ARM.com# Copyright (c) 2006 The Regents of The University of Michigan
46757SAli.Saidi@ARM.com# All rights reserved.
56757SAli.Saidi@ARM.com#
67090SAli.Saidi@ARM.com# Redistribution and use in source and binary forms, with or without
77090SAli.Saidi@ARM.com# modification, are permitted provided that the following conditions are
87090SAli.Saidi@ARM.com# met: redistributions of source code must retain the above copyright
97090SAli.Saidi@ARM.com# notice, this list of conditions and the following disclaimer;
107090SAli.Saidi@ARM.com# redistributions in binary form must reproduce the above copyright
117090SAli.Saidi@ARM.com# notice, this list of conditions and the following disclaimer in the
127090SAli.Saidi@ARM.com# documentation and/or other materials provided with the distribution;
137090SAli.Saidi@ARM.com# neither the name of the copyright holders nor the names of its
147090SAli.Saidi@ARM.com# contributors may be used to endorse or promote products derived from
156757SAli.Saidi@ARM.com# this software without specific prior written permission.
166757SAli.Saidi@ARM.com#
176757SAli.Saidi@ARM.com# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
186757SAli.Saidi@ARM.com# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
196757SAli.Saidi@ARM.com# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
206757SAli.Saidi@ARM.com# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
216757SAli.Saidi@ARM.com# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
226757SAli.Saidi@ARM.com# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
236757SAli.Saidi@ARM.com# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
246757SAli.Saidi@ARM.com# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
256757SAli.Saidi@ARM.com# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
266757SAli.Saidi@ARM.com# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
276757SAli.Saidi@ARM.com# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
286757SAli.Saidi@ARM.com#
296757SAli.Saidi@ARM.com# Authors: Steve Reinhardt
306757SAli.Saidi@ARM.com
316757SAli.Saidi@ARM.comimport os.path, sys
326757SAli.Saidi@ARM.com
336757SAli.Saidi@ARM.com# Import build environment variable from SConstruct.
346757SAli.Saidi@ARM.comImport('env')
356757SAli.Saidi@ARM.com
366757SAli.Saidi@ARM.com# Right now there are no source files immediately in this directory
376757SAli.Saidi@ARM.comsources = []
386757SAli.Saidi@ARM.com
396757SAli.Saidi@ARM.com#################################################################
406757SAli.Saidi@ARM.com#
416757SAli.Saidi@ARM.com# ISA "switch header" generation.
426757SAli.Saidi@ARM.com#
436757SAli.Saidi@ARM.com# Auto-generate arch headers that include the right ISA-specific
446757SAli.Saidi@ARM.com# header based on the setting of THE_ISA preprocessor variable.
456757SAli.Saidi@ARM.com#
46#################################################################
47
48# List of headers to generate
49isa_switch_hdrs = Split('''
50	arguments.hh
51	constants.hh
52	faults.hh
53	isa_traits.hh
54	process.hh
55	regfile.hh
56	stacktrace.hh
57	tlb.hh
58	types.hh
59	utility.hh
60	vtophys.hh
61        ''')
62
63# Generate the header.  target[0] is the full path of the output
64# header to generate.  'source' is a dummy variable, since we get the
65# list of ISAs from env['ALL_ISA_LIST'].
66def gen_switch_hdr(target, source, env):
67    fname = str(target[0])
68    basename = os.path.basename(fname)
69    f = open(fname, 'w')
70    f.write('#include "arch/isa_specific.hh"\n')
71    cond = '#if'
72    for isa in env['ALL_ISA_LIST']:
73        f.write('%s THE_ISA == %s_ISA\n#include "arch/%s/%s"\n'
74                % (cond, isa.upper(), isa, basename))
75        cond = '#elif'
76    f.write('#else\n#error "THE_ISA not set"\n#endif\n')
77    f.close()
78    return 0
79
80# String to print when generating header
81def gen_switch_hdr_string(target, source, env):
82    return "Generating ISA switch header " + str(target[0])
83
84# Build SCons Action object. 'varlist' specifies env vars that this
85# action depends on; when env['ALL_ISA_LIST'] changes these actions
86# should get re-executed.
87switch_hdr_action = Action(gen_switch_hdr, gen_switch_hdr_string,
88                           varlist=['ALL_ISA_LIST'])
89
90# Instantiate actions for each header
91for hdr in isa_switch_hdrs:
92    env.Command(hdr, [], switch_hdr_action)
93
94#################################################################
95#
96# Include architecture-specific files.
97#
98#################################################################
99
100#
101# Build a SCons scanner for ISA files
102#
103import SCons.Scanner
104
105isa_scanner = SCons.Scanner.Classic("ISAScan",
106                                    [".isa", ".ISA"],
107                                    "SRCDIR",
108                                    r'^\s*##include\s+"([\w/.-]*)"')
109
110env.Append(SCANNERS = isa_scanner)
111
112#
113# Now create a Builder object that uses isa_parser.py to generate C++
114# output from the ISA description (*.isa) files.
115#
116
117# Convert to File node to fix path
118isa_parser = File('isa_parser.py')
119cpu_models_file = File('../cpu/cpu_models.py')
120
121# This sucks in the defintions of the CpuModel objects.
122execfile(cpu_models_file.srcnode().abspath)
123
124# Several files are generated from the ISA description.
125# We always get the basic decoder and header file.
126isa_desc_gen_files = Split('decoder.cc decoder.hh')
127# We also get an execute file for each selected CPU model.
128isa_desc_gen_files += [CpuModel.dict[cpu].filename
129                       for cpu in env['CPU_MODELS']]
130
131# Also include the CheckerCPU as one of the models if it is being
132# enabled via command line.
133if env['USE_CHECKER']:
134    isa_desc_gen_files += [CpuModel.dict['CheckerCPU'].filename]
135
136# The emitter patches up the sources & targets to include the
137# autogenerated files as targets and isa parser itself as a source.
138def isa_desc_emitter(target, source, env):
139    return (isa_desc_gen_files, [isa_parser, cpu_models_file] + source)
140
141# Pieces are in place, so create the builder.
142python = sys.executable  # use same Python binary used to run scons
143isa_desc_builder = Builder(action=python + ' $SOURCES $TARGET.dir $CPU_MODELS',
144                           emitter = isa_desc_emitter)
145
146env.Append(BUILDERS = { 'ISADesc' : isa_desc_builder })
147
148#
149# Now include other ISA-specific sources from the ISA subdirectories.
150#
151
152isa = env['TARGET_ISA'] # someday this may be a list of ISAs
153
154# Let the target architecture define what additional sources it needs
155sources += SConscript(os.path.join(isa, 'SConscript'), exports = 'env')
156
157Return('sources')
158