1<?xml version="1.0" ?>
2<component id="root" name="root">
3	<component id="system" name="system" type="System">
4		<param name="core_tech_node" value="40"/>
5		<param name="target_core_clockrate" value="1000"/>
6		<param name="temperature" value="360"/>
7		<param name="interconnect_projection_type" value="0"/>
8		<param name="device_type" value="0"/>
9		<param name="machine_bits" value="64"/>
10		<param name="virtual_address_width" value="64"/>
11		<param name="physical_address_width" value="52"/>
12		<param name="virtual_memory_page_size" value="4096"/>
13		<param name="wire_is_mat_type" value="2"/>
14		<param name="wire_os_mat_type" value="2"/>
15		<param name="delay_wt" value="100"/>
16		<param name="area_wt" value="0"/>
17		<param name="dynamic_power_wt" value="100"/>
18		<param name="leakage_power_wt" value="0"/>
19		<param name="cycle_time_wt" value="0"/>
20		<param name="delay_dev" value="10000"/>
21		<param name="area_dev" value="10000"/>
22		<param name="dynamic_power_dev" value="10000"/>
23		<param name="leakage_power_dev" value="10000"/>
24		<param name="cycle_time_dev" value="10000"/>
25		<param name="ed" value="2"/>
26		<param name="burst_len" value="1"/>
27		<param name="int_prefetch_w" value="1"/>
28		<param name="page_sz_bits" value="0"/>
29		<param name="rpters_in_htree" value="1"/>
30		<param name="ver_htree_wires_over_array" value="0"/>
31		<param name="nuca" value="0"/>
32		<param name="nuca_bank_count" value="0"/>
33		<param name="force_cache_config" value="0"/>
34		<param name="wt" value="0"/>
35		<param name="force_wiretype" value="0"/>
36		<param name="print_detail" value="1"/>
37		<param name="add_ecc_b_" value="1"/>
38		<stat name="total_cycles" value="1856694"/>
39		<component id="system.mc" name="mc" type="MemoryController">
40			<param name="mc_clock" value="800"/>
41			<param name="tech_type" value="0"/>
42			<param name="mc_type" value="0"/>
43			<param name="num_mcs" value="1"/>
44			<param name="type" value="0"/>
45			<param name="LVDS" value="1"/>
46			<param name="withPHY" value="0"/>
47			<param name="llc_line_length" value="64"/>
48			<param name="memory_channels_per_mc" value="2"/>
49			<param name="req_window_size_per_channel" value="128"/>
50			<param name="IO_buffer_size_per_channel" value="128"/>
51			<param name="databus_width" value="128"/>
52			<param name="addressbus_width" value="51"/>
53			<param name="opcode_width" value="16"/>
54			<param name="peak_transfer_rate" value="6400"/>
55			<param name="number_ranks" value="2"/>
56			<param name="reorder_buffer_assoc" value="0"/>
57			<param name="reorder_buffer_nbanks" value="1"/>
58			<param name="read_buffer_assoc" value="1"/>
59			<param name="read_buffer_nbanks" value="1"/>
60			<param name="read_buffer_tag_width" value="0"/>
61			<param name="write_buffer_assoc" value="1"/>
62			<param name="write_buffer_nbanks" value="1"/>
63			<param name="write_buffer_tag_width" value="0"/>
64			<param name="wire_mat_type" value="2"/>
65			<param name="wire_type" value="0"/>
66			<stat name="memory_reads" value="5454"/>
67			<stat name="memory_writes" value="2424"/>
68			<stat name="duty_cycle" value="0.5"/>
69		</component>
70	</component>
71</component>
72