1/* Copyright (c) 2012 Massachusetts Institute of Technology
2 *
3 * Permission is hereby granted, free of charge, to any person obtaining a copy
4 * of this software and associated documentation files (the "Software"), to deal
5 * in the Software without restriction, including without limitation the rights
6 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
7 * copies of the Software, and to permit persons to whom the Software is
8 * furnished to do so, subject to the following conditions:
9 *
10 * The above copyright notice and this permission notice shall be included in
11 * all copies or substantial portions of the Software.
12 *
13 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
14 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
15 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
16 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
17 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
18 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
19 * THE SOFTWARE.
20 */
21
22#include "model/electrical/OR.h"
23
24#include <cmath>
25
26#include "model/PortInfo.h"
27#include "model/TransitionInfo.h"
28#include "model/EventInfo.h"
29#include "model/std_cells/StdCellLib.h"
30#include "model/std_cells/StdCell.h"
31#include "model/timing_graph/ElectricalNet.h"
32
33namespace DSENT
34{
35    using std::ceil;
36    using std::floor;
37
38    OR::OR(const String& instance_name_, const TechModel* tech_model_)
39        : ElectricalModel(instance_name_, tech_model_)
40    {
41        initParameters();
42        initProperties();
43    }
44
45    OR::~OR()
46    {}
47
48    void OR::initParameters()
49    {
50        addParameterName("NumberInputs");
51        addParameterName("NumberBits");
52        addParameterName("BitDuplicate", "TRUE");
53        return;
54    }
55
56    void OR::initProperties()
57    {
58        return;
59    }
60
61    OR* OR::clone() const
62    {
63        // TODO
64        return NULL;
65    }
66
67    void OR::constructModel()
68    {
69        // Get parameter
70        unsigned int number_inputs = getParameter("NumberInputs").toUInt();
71        unsigned int number_bits = getParameter("NumberBits").toUInt();
72        bool bit_duplicate = getParameter("BitDuplicate").toBool();
73
74        ASSERT(number_inputs > 0, "[Error] " + getInstanceName() +
75                " -> Number of inputs must be > 0!");
76        ASSERT(number_bits > 0, "[Error] " + getInstanceName() +
77                " -> Number of bits must be > 0!");
78
79
80        // Init ports
81        for(unsigned int i = 0; i < number_inputs; ++i)
82        {
83            createInputPort("In" + (String)i, makeNetIndex(0, number_bits-1));
84        }
85        createOutputPort("Out", makeNetIndex(0, number_bits-1));
86
87        // Number of inputs on the 0 side
88        unsigned int or0_number_inputs = (unsigned int)ceil((double)number_inputs / 2.0);
89        // Number of inputs on the 1 side
90        unsigned int or1_number_inputs = (unsigned int)floor((double)number_inputs / 2.0);
91
92        // Create area, power, and event results
93        createElectricalResults();
94        createElectricalEventResult("OR");
95
96        getEventInfo("Idle")->setStaticTransitionInfos();
97
98        //Depending on whether we want to create a 1-bit instance and have it multiplied
99        //up by number of bits or actually instantiate number_bits of 1-bit instances.
100        //Recursively instantiates smaller ors
101        if(bit_duplicate || number_bits == 1)
102        {
103            // If it is just a 1-input or, just connect output to input
104            if(number_inputs == 1)
105            {
106                assign("Out", "In0");
107            }
108            else
109            {
110                // If it is more than 1 input, instantiate two sub ors (OR_way0 and OR_way1)
111                // and create a final OR2 to OR them
112                const String& or0_name = "OR_way0";
113                const String& or1_name = "OR_way1";
114                const String& orf_name = "OR2_i" + (String)number_inputs;
115
116                OR* or0 = new OR(or0_name, getTechModel());
117                or0->setParameter("NumberInputs", or0_number_inputs);
118                or0->setParameter("NumberBits", 1);
119                or0->setParameter("BitDuplicate", "TRUE");
120                or0->construct();
121
122                OR* or1 = new OR(or1_name, getTechModel());
123                or1->setParameter("NumberInputs", or1_number_inputs);
124                or1->setParameter("NumberBits", 1);
125                or1->setParameter("BitDuplicate", "TRUE");
126                or1->construct();
127
128                StdCell* orf = getTechModel()->getStdCellLib()->createStdCell("OR2", orf_name);
129                orf->construct();
130
131                // Create outputs of way0 and way1 ors with final or
132                createNet("way0_Out");
133                createNet("way1_Out");
134                portConnect(or0, "Out", "way0_Out");
135                portConnect(or1, "Out", "way1_Out");
136                portConnect(orf, "A", "way0_Out");
137                portConnect(orf, "B", "way1_Out");
138
139                // Connect inputs to the sub ors.
140                for(unsigned int i = 0; i < or0_number_inputs; ++i)
141                {
142                    createNet("way0_In" + (String)i);
143                    portConnect(or0, "In" + (String)i, "way0_In" + (String)i);
144                    assignVirtualFanin("way0_In" + (String)i, "In" + (String)i);
145                }
146                for(unsigned int i = 0; i < or1_number_inputs; ++i)
147                {
148                    createNet("way1_In" + (String)i);
149                    portConnect(or1, "In" + (String)i, "way1_In" + (String)i);
150                    assignVirtualFanin("way1_In" + (String)i, "In" + (String)(i + or0_number_inputs));
151                }
152
153                // Connect outputs
154                createNet("OR2_Out");
155                portConnect(orf, "Y", "OR2_Out");
156                assignVirtualFanout("Out", "OR2_Out");
157
158                addSubInstances(or0, number_bits);
159                addElectricalSubResults(or0, number_bits);
160                addSubInstances(or1, number_bits);
161                addElectricalSubResults(or1, number_bits);
162                addSubInstances(orf, number_bits);
163                addElectricalSubResults(orf, number_bits);
164
165                Result* or_event = getEventResult("OR");
166                or_event->addSubResult(or0->getEventResult("OR"), or0_name, number_bits);
167                or_event->addSubResult(or1->getEventResult("OR"), or1_name, number_bits);
168                or_event->addSubResult(orf->getEventResult("OR2"), orf_name, number_bits);
169
170            }
171        }
172        else
173        {
174            // Init a bunch of 1-bit ors
175            Result* or_event = getEventResult("OR");
176            for(unsigned int n = 0; n < number_bits; ++n)
177            {
178                const String& or_name = "OR_bit" + (String)n;
179
180                OR* ors = new OR(or_name, getTechModel());
181                ors->setParameter("NumberInputs", number_inputs);
182                ors->setParameter("NumberBits", 1);
183                ors->setParameter("BitDuplicate", "TRUE");
184                ors->construct();
185
186                for(unsigned int i = 0; i < number_inputs; ++i)
187                {
188                    portConnect(ors, "In" + (String)i, "In" + (String)i, makeNetIndex(n));
189                }
190                portConnect(ors, "Out", "Out", makeNetIndex(n));
191
192                addSubInstances(ors, 1.0);
193                addElectricalSubResults(ors, 1.0);
194                or_event->addSubResult(ors->getEventResult("OR"), or_name, 1.0);
195            }
196        }
197        return;
198    }
199
200    void OR::propagateTransitionInfo()
201    {
202        // Get parameters
203        unsigned int number_inputs = getParameter("NumberInputs").toUInt();
204        unsigned int number_bits = getParameter("NumberBits").toUInt();
205        bool bit_duplicate = getParameter("BitDuplicate").toBool();
206
207        // Number of inputs on 0 side
208        unsigned int or0_number_inputs = (unsigned int)ceil((double)number_inputs / 2.0);
209        unsigned int or1_number_inputs = (unsigned int)floor((double)number_inputs / 2.0);
210
211        if(bit_duplicate || number_bits == 1)
212        {
213            if(number_inputs == 1)
214            {
215                propagatePortTransitionInfo("Out", "In0");
216            }
217            else
218            {
219                ElectricalModel* or0 = (ElectricalModel*)getSubInstance("OR_way0");
220                for(unsigned int i = 0; i < or0_number_inputs; ++i)
221                {
222                    propagatePortTransitionInfo(or0, "In" + (String)i, "In" + (String)i);
223                }
224                or0->use();
225
226                ElectricalModel* or1 = (ElectricalModel*)getSubInstance("OR_way1");
227                for(unsigned int i = 0; i < or1_number_inputs; ++i)
228                {
229                    propagatePortTransitionInfo(or1, "In" + (String)i, "In" + (String)i);
230                }
231                or1->use();
232
233                ElectricalModel* orf = (ElectricalModel*)getSubInstance("OR2_i" + (String)number_inputs);
234                propagatePortTransitionInfo(orf, "A", or0, "Out");
235                propagatePortTransitionInfo(orf, "B", or1, "Out");
236                orf->use();
237
238                // Set output probability
239                propagatePortTransitionInfo("Out", orf, "Y");
240            }
241        }
242        else
243        {
244            for(unsigned int n = 0; n < number_bits; ++n)
245            {
246                ElectricalModel* or_bit = (ElectricalModel*)getSubInstance("OR_bit" + (String)n);
247                for(unsigned int i = 0; i < number_inputs; ++i)
248                {
249                    propagatePortTransitionInfo(or_bit, "In" + (String)i, "In" + (String)i);
250                }
251                or_bit->use();
252            }
253
254            ElectricalModel* or_bit = (ElectricalModel*)getSubInstance("OR_bit0");
255            propagatePortTransitionInfo("Out", or_bit, "Out");
256        }
257        return;
258    }
259} // namespace DSENT
260
261