1/*
2 * Copyright (c) 2012-2014, TU Delft
3 * Copyright (c) 2012-2014, TU Eindhoven
4 * Copyright (c) 2012-2014, TU Kaiserslautern
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions are
9 * met:
10 *
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 *
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 *
18 * 3. Neither the name of the copyright holder nor the names of its
19 * contributors may be used to endorse or promote products derived from
20 * this software without specific prior written permission.
21 *
22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
23 * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
24 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
25 * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
26 * HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
27 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
28 * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
29 * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
30 * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
31 * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 *
34 * Authors: Karthik Chandrasekar
35 *
36 */
37
38#ifndef TOOLS_MEMORY_SPECIFICATION_H
39#define TOOLS_MEMORY_SPECIFICATION_H
40
41#include <cassert>
42#include <string>
43
44#include "MemArchitectureSpec.h"
45#include "MemTimingSpec.h"
46#include "MemPowerSpec.h"
47#include "Parametrisable.h"
48
49
50namespace Data {
51// Supported memory types
52class MemoryType {
53 public:
54  enum MemoryType_t {
55    DDR2 = 0,
56    DDR3,
57    DDR4,
58    LPDDR,
59    LPDDR2,
60    LPDDR3,
61    WIDEIO_SDR,
62    MEMORY_TYPE_INVALID
63  };
64
65  MemoryType(MemoryType_t _val) :
66    val(_val)
67  {
68  }
69
70  MemoryType() :
71    val(MEMORY_TYPE_INVALID)
72  {
73  }
74
75  MemoryType(const std::string& _val) :
76    val(MEMORY_TYPE_INVALID)
77  {
78    if (_val == "DDR2") {
79      val = DDR2;
80    } else if (_val == "DDR3") {
81      val = DDR3;
82    } else if (_val == "DDR4") {
83      val = DDR4;
84    } else if (_val == "LPDDR") {
85      val = LPDDR;
86    } else if (_val == "LPDDR2") {
87      val = LPDDR2;
88    } else if (_val == "LPDDR3") {
89      val = LPDDR3;
90    } else if (_val == "WIDEIO_SDR") {
91      val = WIDEIO_SDR;
92    }
93    assert("Unknown memory type." && val != MEMORY_TYPE_INVALID);
94  }
95
96  bool isLPDDRFamily() const
97  {
98    return val == LPDDR ||
99           val == LPDDR2 ||
100           val == LPDDR3 ||
101           val == WIDEIO_SDR;
102  }
103
104  bool hasTwoVoltageDomains() const
105  {
106    return val == LPDDR ||
107           val == LPDDR2 ||
108           val == LPDDR3 ||
109           val == WIDEIO_SDR ||
110           val == DDR4;
111  }
112
113  bool isDDRFamily() const
114  {
115    return val == DDR2 ||
116           val == DDR3 ||
117           val == DDR4;
118  }
119
120  bool hasDll() const
121  {
122    return val == DDR2 ||
123           val == DDR3 ||
124           val == DDR4;
125  }
126
127  bool hasTermination() const
128  {
129    return val == DDR2 ||
130           val == DDR3 ||
131           val == DDR4;
132  }
133
134  double getCapacitance() const
135  {
136    // LPDDR1/2 memories only have IO Power (no ODT)
137    // LPDDR3 has optional ODT, but it is typically not used (reflections are elimitated by other means (layout))
138    // The capacitance values are conservative and based on Micron Mobile LPDDR2 Power Calculator
139
140    // LPDDR/2/3 IO Capacitance in mF
141    if (val == LPDDR) {
142        return 0.0000000045;
143    } else if (val == LPDDR2) {
144        return 0.0000000025;
145    } else if (val == LPDDR3) {
146        return 0.0000000018;
147    } else {
148        return 0.0;
149    }
150  }
151
152  double getIoPower() const
153  {
154    if (val == DDR2) {
155        // Conservative estimates based on Micron DDR2 Power Calculator
156        return 1.5;    // in mW
157    } else if (val == DDR3) {
158        // Conservative estimates based on Micron DDR3 Power Calculator
159        return 4.6;    // in mW
160    } else if (val == DDR4) {
161        // Conservative estimates based on Micron DDR3 Power Calculator
162        // using available termination resistance values from Micron DDR4 Datasheets
163        return 3.7;    // in mW
164    } else {
165        return 0.0;
166    }
167  }
168
169  double getWrOdtPower() const
170  {
171    if (val == DDR2) {
172        // Conservative estimates based on Micron DDR2 Power Calculator
173        return 8.2;    // in mW
174    } else if (val == DDR3) {
175        // Conservative estimates based on Micron DDR3 Power Calculator
176        return 21.2;    // in mW
177    } else if (val == DDR4) {
178        // Conservative estimates based on Micron DDR3 Power Calculator
179        // using available termination resistance values from Micron DDR4 Datasheets
180        return 17.0;    // in mW
181    } else {
182        return 0.0;
183    }
184  }
185
186  double getTermRdPower() const
187  {
188    if (val == DDR2) {
189        // Conservative estimates based on Micron DDR2 Power Calculator
190        return 13.1;    // in mW
191    } else if (val == DDR3) {
192        // Conservative estimates based on Micron DDR3 Power Calculator
193        return 15.5;    // in mW
194    } else if (val == DDR4) {
195        // Conservative estimates based on Micron DDR3 Power Calculator
196        // using available termination resistance values from Micron DDR4 Datasheets
197        return 12.4;    // in mW
198    } else {
199        return 0.0;
200    }
201  }
202
203  double getTermWrPower() const
204  {
205    if (val == DDR2) {
206        // Conservative estimates based on Micron DDR2 Power Calculator
207        return 14.6;    // in mW
208    } else if (val == DDR3) {
209        // Conservative estimates based on Micron DDR3 Power Calculator
210        return 15.4;    // in mW
211    } else if (val == DDR4) {
212        // Conservative estimates based on Micron DDR3 Power Calculator
213        // using available termination resistance values from Micron DDR4 Datasheets
214        return 12.3;    // in mW
215    } else {
216        return 0.0;
217    }
218  }
219
220  operator MemoryType_t() const {
221    return val;
222  }
223
224 private:
225  MemoryType_t val;
226};
227
228class MemorySpecification : public virtual Parametrisable {
229 public:
230  std::string id;
231  MemoryType  memoryType;
232
233  MemArchitectureSpec memArchSpec;
234  MemTimingSpec memTimingSpec;
235  MemPowerSpec  memPowerSpec;
236
237  void processParameters();
238
239  static MemorySpecification getMemSpecFromXML(const std::string& id);
240};
241}  // namespace Data
242#endif // ifndef TOOLS_MEMORY_SPECIFICATION_H
243