MOESI_CMP_token.py revision 12065:e3e51756dfef 
1# Copyright (c) 2006-2007 The Regents of The University of Michigan
2# Copyright (c) 2009 Advanced Micro Devices, Inc.
3# All rights reserved.
4#
5# Redistribution and use in source and binary forms, with or without
6# modification, are permitted provided that the following conditions are
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9# redistributions in binary form must reproduce the above copyright
10# notice, this list of conditions and the following disclaimer in the
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12# neither the name of the copyright holders nor the names of its
13# contributors may be used to endorse or promote products derived from
14# this software without specific prior written permission.
15#
16# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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25# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27#
28# Authors: Brad Beckmann
29
30import math
31import m5
32from m5.objects import *
33from m5.defines import buildEnv
34from Ruby import create_topology, create_directories
35from Ruby import send_evicts
36
37#
38# Declare caches used by the protocol
39#
40class L1Cache(RubyCache): pass
41class L2Cache(RubyCache): pass
42
43def define_options(parser):
44    parser.add_option("--l1-retries", type="int", default=1,
45                      help="Token_CMP: # of l1 retries before going persistent")
46    parser.add_option("--timeout-latency", type="int", default=300,
47                      help="Token_CMP: cycles until issuing again");
48    parser.add_option("--disable-dyn-timeouts", action="store_true",
49          help="Token_CMP: disable dyanimc timeouts, use fixed latency instead")
50    parser.add_option("--allow-atomic-migration", action="store_true",
51          help="allow migratory sharing for atomic only accessed blocks")
52
53def create_system(options, full_system, system, dma_ports, ruby_system):
54
55    if buildEnv['PROTOCOL'] != 'MOESI_CMP_token':
56        panic("This script requires the MOESI_CMP_token protocol to be built.")
57
58    #
59    # number of tokens that the owner passes to requests so that shared blocks can
60    # respond to read requests
61    #
62    n_tokens = options.num_cpus + 1
63
64    cpu_sequencers = []
65
66    #
67    # The ruby network creation expects the list of nodes in the system to be
68    # consistent with the NetDest list.  Therefore the l1 controller nodes must be
69    # listed before the directory nodes and directory nodes before dma nodes, etc.
70    #
71    l1_cntrl_nodes = []
72    l2_cntrl_nodes = []
73    dma_cntrl_nodes = []
74
75    #
76    # Must create the individual controllers before the network to ensure the
77    # controller constructors are called before the network constructor
78    #
79    l2_bits = int(math.log(options.num_l2caches, 2))
80    block_size_bits = int(math.log(options.cacheline_size, 2))
81
82    for i in xrange(options.num_cpus):
83        #
84        # First create the Ruby objects associated with this cpu
85        #
86        l1i_cache = L1Cache(size = options.l1i_size,
87                            assoc = options.l1i_assoc,
88                            start_index_bit = block_size_bits)
89        l1d_cache = L1Cache(size = options.l1d_size,
90                            assoc = options.l1d_assoc,
91                            start_index_bit = block_size_bits)
92
93        # the ruby random tester reuses num_cpus to specify the
94        # number of cpu ports connected to the tester object, which
95        # is stored in system.cpu. because there is only ever one
96        # tester object, num_cpus is not necessarily equal to the
97        # size of system.cpu; therefore if len(system.cpu) == 1
98        # we use system.cpu[0] to set the clk_domain, thereby ensuring
99        # we don't index off the end of the cpu list.
100        if len(system.cpu) == 1:
101            clk_domain = system.cpu[0].clk_domain
102        else:
103            clk_domain = system.cpu[i].clk_domain
104
105        l1_cntrl = L1Cache_Controller(version=i, L1Icache=l1i_cache,
106                                      L1Dcache=l1d_cache,
107                                      l2_select_num_bits=l2_bits,
108                                      N_tokens=n_tokens,
109                                      retry_threshold=options.l1_retries,
110                                      fixed_timeout_latency=\
111                                      options.timeout_latency,
112                                      dynamic_timeout_enabled=\
113                                      not options.disable_dyn_timeouts,
114                                      no_mig_atomic=not \
115                                      options.allow_atomic_migration,
116                                      send_evictions=send_evicts(options),
117                                      transitions_per_cycle=options.ports,
118                                      clk_domain=clk_domain,
119                                      ruby_system=ruby_system)
120
121        cpu_seq = RubySequencer(version=i, icache=l1i_cache,
122                                dcache=l1d_cache, clk_domain=clk_domain,
123                                ruby_system=ruby_system)
124
125        l1_cntrl.sequencer = cpu_seq
126        exec("ruby_system.l1_cntrl%d = l1_cntrl" % i)
127
128        # Add controllers and sequencers to the appropriate lists
129        cpu_sequencers.append(cpu_seq)
130        l1_cntrl_nodes.append(l1_cntrl)
131
132        # Connect the L1 controllers and the network
133        l1_cntrl.requestFromL1Cache = MessageBuffer()
134        l1_cntrl.requestFromL1Cache.master = ruby_system.network.slave
135        l1_cntrl.responseFromL1Cache = MessageBuffer()
136        l1_cntrl.responseFromL1Cache.master = ruby_system.network.slave
137        l1_cntrl.persistentFromL1Cache = MessageBuffer(ordered = True)
138        l1_cntrl.persistentFromL1Cache.master = ruby_system.network.slave
139
140        l1_cntrl.mandatoryQueue = MessageBuffer()
141        l1_cntrl.requestToL1Cache = MessageBuffer()
142        l1_cntrl.requestToL1Cache.slave = ruby_system.network.master
143        l1_cntrl.responseToL1Cache = MessageBuffer()
144        l1_cntrl.responseToL1Cache.slave = ruby_system.network.master
145        l1_cntrl.persistentToL1Cache = MessageBuffer(ordered = True)
146        l1_cntrl.persistentToL1Cache.slave = ruby_system.network.master
147
148
149    l2_index_start = block_size_bits + l2_bits
150
151    for i in xrange(options.num_l2caches):
152        #
153        # First create the Ruby objects associated with this cpu
154        #
155        l2_cache = L2Cache(size = options.l2_size,
156                           assoc = options.l2_assoc,
157                           start_index_bit = l2_index_start)
158
159        l2_cntrl = L2Cache_Controller(version = i,
160                                      L2cache = l2_cache,
161                                      N_tokens = n_tokens,
162                                      transitions_per_cycle = options.ports,
163                                      ruby_system = ruby_system)
164
165        exec("ruby_system.l2_cntrl%d = l2_cntrl" % i)
166        l2_cntrl_nodes.append(l2_cntrl)
167
168        # Connect the L2 controllers and the network
169        l2_cntrl.GlobalRequestFromL2Cache = MessageBuffer()
170        l2_cntrl.GlobalRequestFromL2Cache.master = ruby_system.network.slave
171        l2_cntrl.L1RequestFromL2Cache = MessageBuffer()
172        l2_cntrl.L1RequestFromL2Cache.master = ruby_system.network.slave
173        l2_cntrl.responseFromL2Cache = MessageBuffer()
174        l2_cntrl.responseFromL2Cache.master = ruby_system.network.slave
175
176        l2_cntrl.GlobalRequestToL2Cache = MessageBuffer()
177        l2_cntrl.GlobalRequestToL2Cache.slave = ruby_system.network.master
178        l2_cntrl.L1RequestToL2Cache = MessageBuffer()
179        l2_cntrl.L1RequestToL2Cache.slave = ruby_system.network.master
180        l2_cntrl.responseToL2Cache = MessageBuffer()
181        l2_cntrl.responseToL2Cache.slave = ruby_system.network.master
182        l2_cntrl.persistentToL2Cache = MessageBuffer(ordered = True)
183        l2_cntrl.persistentToL2Cache.slave = ruby_system.network.master
184
185
186    # Run each of the ruby memory controllers at a ratio of the frequency of
187    # the ruby system
188    # clk_divider value is a fix to pass regression.
189    ruby_system.memctrl_clk_domain = DerivedClockDomain(
190                                          clk_domain=ruby_system.clk_domain,
191                                          clk_divider=3)
192
193    dir_cntrl_nodes = create_directories(options, system.mem_ranges,
194                                         ruby_system)
195    for dir_cntrl in dir_cntrl_nodes:
196        dir_cntrl.l2_select_num_bits = l2_bits
197        # Connect the directory controllers and the network
198        dir_cntrl.requestToDir = MessageBuffer()
199        dir_cntrl.requestToDir.slave = ruby_system.network.master
200        dir_cntrl.responseToDir = MessageBuffer()
201        dir_cntrl.responseToDir.slave = ruby_system.network.master
202        dir_cntrl.persistentToDir = MessageBuffer(ordered = True)
203        dir_cntrl.persistentToDir.slave = ruby_system.network.master
204        dir_cntrl.dmaRequestToDir = MessageBuffer(ordered = True)
205        dir_cntrl.dmaRequestToDir.slave = ruby_system.network.master
206
207        dir_cntrl.requestFromDir = MessageBuffer()
208        dir_cntrl.requestFromDir.master = ruby_system.network.slave
209        dir_cntrl.responseFromDir = MessageBuffer()
210        dir_cntrl.responseFromDir.master = ruby_system.network.slave
211        dir_cntrl.persistentFromDir = MessageBuffer(ordered = True)
212        dir_cntrl.persistentFromDir.master = ruby_system.network.slave
213        dir_cntrl.dmaResponseFromDir = MessageBuffer(ordered = True)
214        dir_cntrl.dmaResponseFromDir.master = ruby_system.network.slave
215        dir_cntrl.responseFromMemory = MessageBuffer()
216
217
218    for i, dma_port in enumerate(dma_ports):
219        #
220        # Create the Ruby objects associated with the dma controller
221        #
222        dma_seq = DMASequencer(version = i,
223                               ruby_system = ruby_system,
224                               slave = dma_port)
225
226        dma_cntrl = DMA_Controller(version = i,
227                                   dma_sequencer = dma_seq,
228                                   transitions_per_cycle = options.ports,
229                                   ruby_system = ruby_system)
230
231        exec("ruby_system.dma_cntrl%d = dma_cntrl" % i)
232        dma_cntrl_nodes.append(dma_cntrl)
233
234        # Connect the dma controller to the network
235        dma_cntrl.mandatoryQueue = MessageBuffer()
236        dma_cntrl.responseFromDir = MessageBuffer(ordered = True)
237        dma_cntrl.responseFromDir.slave = ruby_system.network.master
238        dma_cntrl.reqToDirectory = MessageBuffer()
239        dma_cntrl.reqToDirectory.master = ruby_system.network.slave
240
241    all_cntrls = l1_cntrl_nodes + \
242                 l2_cntrl_nodes + \
243                 dir_cntrl_nodes + \
244                 dma_cntrl_nodes
245
246    # Create the io controller and the sequencer
247    if full_system:
248        io_seq = DMASequencer(version=len(dma_ports), ruby_system=ruby_system)
249        ruby_system._io_port = io_seq
250        io_controller = DMA_Controller(version = len(dma_ports),
251                                       dma_sequencer = io_seq,
252                                       ruby_system = ruby_system)
253        ruby_system.io_controller = io_controller
254
255        # Connect the dma controller to the network
256        io_controller.mandatoryQueue = MessageBuffer()
257        io_controller.responseFromDir = MessageBuffer(ordered = True)
258        io_controller.responseFromDir.slave = ruby_system.network.master
259        io_controller.reqToDirectory = MessageBuffer()
260        io_controller.reqToDirectory.master = ruby_system.network.slave
261
262        all_cntrls = all_cntrls + [io_controller]
263
264
265    ruby_system.network.number_of_virtual_networks = 6
266    topology = create_topology(all_cntrls, options)
267    return (cpu_sequencers, dir_cntrl_nodes, topology)
268