ruby_mem_test.py revision 8845:a230379caf65
1# Copyright (c) 2006-2007 The Regents of The University of Michigan
2# Copyright (c) 2009 Advanced Micro Devices, Inc.
3# All rights reserved.
4#
5# Redistribution and use in source and binary forms, with or without
6# modification, are permitted provided that the following conditions are
7# met: redistributions of source code must retain the above copyright
8# notice, this list of conditions and the following disclaimer;
9# redistributions in binary form must reproduce the above copyright
10# notice, this list of conditions and the following disclaimer in the
11# documentation and/or other materials provided with the distribution;
12# neither the name of the copyright holders nor the names of its
13# contributors may be used to endorse or promote products derived from
14# this software without specific prior written permission.
15#
16# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27#
28# Authors: Ron Dreslinski
29#          Brad Beckmann
30
31import m5
32from m5.objects import *
33from m5.defines import buildEnv
34from m5.util import addToPath
35import os, optparse, sys
36addToPath('../common')
37addToPath('../ruby')
38
39import Ruby
40
41# Get paths we might need.  It's expected this file is in m5/configs/example.
42config_path = os.path.dirname(os.path.abspath(__file__))
43config_root = os.path.dirname(config_path)
44m5_root = os.path.dirname(config_root)
45
46parser = optparse.OptionParser()
47
48parser.add_option("-l", "--maxloads", metavar="N", default=0,
49                  help="Stop after N loads")
50parser.add_option("--progress", type="int", default=1000,
51                  metavar="NLOADS",
52                  help="Progress message interval "
53                  "[default: %default]")
54parser.add_option("--num-dmas", type="int", default=0, help="# of dma testers")
55parser.add_option("--functional", type="int", default=0,
56                  help="percentage of accesses that should be functional")
57parser.add_option("--suppress-func-warnings", action="store_true",
58                  help="suppress warnings when functional accesses fail")
59
60#
61# Add the ruby specific and protocol specific options
62#
63Ruby.define_options(parser)
64
65execfile(os.path.join(config_root, "common", "Options.py"))
66
67(options, args) = parser.parse_args()
68
69#
70# Set the default cache size and associativity to be very small to encourage
71# races between requests and writebacks.
72#
73options.l1d_size="256B"
74options.l1i_size="256B"
75options.l2_size="512B"
76options.l3_size="1kB"
77options.l1d_assoc=2
78options.l1i_assoc=2
79options.l2_assoc=2
80options.l3_assoc=2
81
82if args:
83     print "Error: script doesn't take any positional arguments"
84     sys.exit(1)
85
86block_size = 64
87
88if options.num_cpus > block_size:
89     print "Error: Number of testers %d limited to %d because of false sharing" \
90           % (options.num_cpus, block_size)
91     sys.exit(1)
92
93#
94# Currently ruby does not support atomic or uncacheable accesses
95#
96cpus = [ MemTest(atomic = False,
97                 max_loads = options.maxloads,
98                 issue_dmas = False,
99                 percent_functional = options.functional,
100                 percent_uncacheable = 0,
101                 progress_interval = options.progress,
102                 suppress_func_warnings = options.suppress_func_warnings) \
103         for i in xrange(options.num_cpus) ]
104
105system = System(cpu = cpus,
106                funcmem = PhysicalMemory(),
107                physmem = PhysicalMemory())
108
109if options.num_dmas > 0:
110    dmas = [ MemTest(atomic = False,
111                     max_loads = options.maxloads,
112                     issue_dmas = True,
113                     percent_functional = 0,
114                     percent_uncacheable = 0,
115                     progress_interval = options.progress,
116                     warn_on_failure = options.warn_on_failure) \
117             for i in xrange(options.num_dmas) ]
118    system.dma_devices = dmas
119else:
120    dmas = []
121
122Ruby.create_system(options, system, dma_devices = dmas)
123
124#
125# The tester is most effective when randomization is turned on and
126# artifical delay is randomly inserted on messages
127#
128system.ruby.randomization = True
129
130assert(len(cpus) == len(system.ruby._cpu_ruby_ports))
131
132for (i, cpu) in enumerate(cpus):
133    #
134    # Tie the cpu memtester ports to the correct system ports
135    #
136    cpu.test = system.ruby._cpu_ruby_ports[i].slave
137    cpu.functional = system.funcmem.port
138
139    #
140    # Since the memtester is incredibly bursty, increase the deadlock
141    # threshold to 5 million cycles
142    #
143    system.ruby._cpu_ruby_ports[i].deadlock_threshold = 5000000
144
145    #
146    # Ruby doesn't need the backing image of memory when running with
147    # the tester.
148    #
149    system.ruby._cpu_ruby_ports[i].access_phys_mem = False
150
151for (i, dma) in enumerate(dmas):
152    #
153    # Tie the dma memtester ports to the correct functional port
154    # Note that the test port has already been connected to the dma_sequencer
155    #
156    dma.functional = system.funcmem.port
157
158# -----------------------
159# run simulation
160# -----------------------
161
162root = Root( full_system = False, system = system )
163root.system.mem_mode = 'timing'
164
165# Not much point in this being higher than the L1 latency
166m5.ticks.setGlobalFrequency('1ns')
167
168# instantiate configuration
169m5.instantiate()
170
171# simulate until program terminates
172exit_event = m5.simulate(options.maxtick)
173
174print 'Exiting @ tick', m5.curTick(), 'because', exit_event.getCause()
175