ruby_direct_test.py revision 8928
16899SN/A# Copyright (c) 2006-2007 The Regents of The University of Michigan
26899SN/A# Copyright (c) 2009 Advanced Micro Devices, Inc.
36899SN/A# All rights reserved.
46899SN/A#
56899SN/A# Redistribution and use in source and binary forms, with or without
66899SN/A# modification, are permitted provided that the following conditions are
76899SN/A# met: redistributions of source code must retain the above copyright
86899SN/A# notice, this list of conditions and the following disclaimer;
96899SN/A# redistributions in binary form must reproduce the above copyright
106899SN/A# notice, this list of conditions and the following disclaimer in the
116899SN/A# documentation and/or other materials provided with the distribution;
126899SN/A# neither the name of the copyright holders nor the names of its
136899SN/A# contributors may be used to endorse or promote products derived from
146899SN/A# this software without specific prior written permission.
156899SN/A#
166899SN/A# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
176899SN/A# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
186899SN/A# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
196899SN/A# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
206899SN/A# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
216899SN/A# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
226899SN/A# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
236899SN/A# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
246899SN/A# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
256899SN/A# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
266899SN/A# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
276899SN/A#
286899SN/A# Authors: Ron Dreslinski
296899SN/A#          Brad Beckmann
306899SN/A
316899SN/Aimport m5
326899SN/Afrom m5.objects import *
336899SN/Afrom m5.defines import buildEnv
346899SN/Afrom m5.util import addToPath
356899SN/Aimport os, optparse, sys
366899SN/AaddToPath('../common')
376899SN/AaddToPath('../ruby')
386899SN/A
398928Sandreas.hansson@arm.comimport Options
406899SN/Aimport Ruby
416899SN/A
426899SN/A# Get paths we might need.  It's expected this file is in m5/configs/example.
436899SN/Aconfig_path = os.path.dirname(os.path.abspath(__file__))
446899SN/Aconfig_root = os.path.dirname(config_path)
456899SN/Am5_root = os.path.dirname(config_root)
466899SN/A
476899SN/Aparser = optparse.OptionParser()
488928Sandreas.hansson@arm.comOptions.addCommonOptions(parser)
496899SN/A
507553SN/Aparser.add_option("-l", "--requests", metavar="N", default=100,
517553SN/A                  help="Stop after N requests")
526899SN/Aparser.add_option("-f", "--wakeup_freq", metavar="N", default=10,
536899SN/A                  help="Wakeup every N cycles")
547553SN/Aparser.add_option("--test-type", type="string", default="SeriesGetx",
557553SN/A                  help="SeriesGetx|SeriesGets|Invalidate")
566899SN/A
576899SN/A#
587538SN/A# Add the ruby specific and protocol specific options
596899SN/A#
607538SN/ARuby.define_options(parser)
616899SN/A
626899SN/Aexecfile(os.path.join(config_root, "common", "Options.py"))
636899SN/A
646899SN/A(options, args) = parser.parse_args()
656899SN/A
666899SN/Aif args:
676899SN/A     print "Error: script doesn't take any positional arguments"
686899SN/A     sys.exit(1)
696899SN/A
706899SN/A#
717632SBrad.Beckmann@amd.com# Select the direct test generator
726899SN/A#
737553SN/Aif options.test_type == "SeriesGetx":
747553SN/A    generator = SeriesRequestGenerator(num_cpus = options.num_cpus,
757553SN/A                                             issue_writes = True)
767553SN/Aelif options.test_type == "SeriesGets":
777553SN/A    generator = SeriesRequestGenerator(num_cpus = options.num_cpus,
787553SN/A                                             issue_writes = False)
797553SN/Aelif options.test_type == "Invalidate":
807553SN/A    generator = InvalidateGenerator(num_cpus = options.num_cpus)
817553SN/Aelse:
827632SBrad.Beckmann@amd.com    print "Error: unknown direct test generator"
837553SN/A    sys.exit(1)
846899SN/A
856899SN/A#
866899SN/A# Create the M5 system.  Note that the PhysicalMemory Object isn't
876899SN/A# actually used by the rubytester, but is included to support the
886899SN/A# M5 memory size == Ruby memory size checks
896899SN/A#
906899SN/Asystem = System(physmem = PhysicalMemory())
916899SN/A
927553SN/A#
937553SN/A# Create the ruby random tester
947553SN/A#
957553SN/Asystem.tester = RubyDirectedTester(requests_to_complete = \
967553SN/A                                   options.requests,
977632SBrad.Beckmann@amd.com                                   generator = generator)
987553SN/A
998436SBrad.Beckmann@amd.comRuby.create_system(options, system)
1006899SN/A
1018322Ssteve.reinhardt@amd.comassert(options.num_cpus == len(system.ruby._cpu_ruby_ports))
1026899SN/A
1038322Ssteve.reinhardt@amd.comfor ruby_port in system.ruby._cpu_ruby_ports:
1046899SN/A    #
1056899SN/A    # Tie the ruby tester ports to the ruby cpu ports
1066899SN/A    #
1078845Sandreas.hansson@arm.com    system.tester.cpuPort = ruby_port.slave
1086899SN/A
1096899SN/A# -----------------------
1106899SN/A# run simulation
1116899SN/A# -----------------------
1126899SN/A
1138801Sgblack@eecs.umich.eduroot = Root( full_system = False, system = system )
1146899SN/Aroot.system.mem_mode = 'timing'
1156899SN/A
1166899SN/A# Not much point in this being higher than the L1 latency
1176899SN/Am5.ticks.setGlobalFrequency('1ns')
1186899SN/A
1196899SN/A# instantiate configuration
1207525SN/Am5.instantiate()
1216899SN/A
1226899SN/A# simulate until program terminates
1236899SN/Aexit_event = m5.simulate(options.maxtick)
1246899SN/A
1256899SN/Aprint 'Exiting @ tick', m5.curTick(), 'because', exit_event.getCause()
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