ruby_direct_test.py revision 8801
11758SN/A# Copyright (c) 2006-2007 The Regents of The University of Michigan 21762SN/A# Copyright (c) 2009 Advanced Micro Devices, Inc. 31758SN/A# All rights reserved. 41758SN/A# 51758SN/A# Redistribution and use in source and binary forms, with or without 61758SN/A# modification, are permitted provided that the following conditions are 71758SN/A# met: redistributions of source code must retain the above copyright 81758SN/A# notice, this list of conditions and the following disclaimer; 91758SN/A# redistributions in binary form must reproduce the above copyright 101758SN/A# notice, this list of conditions and the following disclaimer in the 111758SN/A# documentation and/or other materials provided with the distribution; 121758SN/A# neither the name of the copyright holders nor the names of its 131758SN/A# contributors may be used to endorse or promote products derived from 141758SN/A# this software without specific prior written permission. 151758SN/A# 161758SN/A# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 171758SN/A# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 181758SN/A# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 191758SN/A# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 201758SN/A# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 211758SN/A# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 221758SN/A# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 231758SN/A# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 241758SN/A# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 251758SN/A# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 261758SN/A# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 272665Ssaidi@eecs.umich.edu# 282665Ssaidi@eecs.umich.edu# Authors: Ron Dreslinski 292665Ssaidi@eecs.umich.edu# Brad Beckmann 301758SN/A 312SN/Aimport m5 322984Sgblack@eecs.umich.edufrom m5.objects import * 33732SN/Afrom m5.defines import buildEnv 343565Sgblack@eecs.umich.edufrom m5.util import addToPath 35732SN/Aimport os, optparse, sys 362984Sgblack@eecs.umich.eduaddToPath('../common') 373536Sgblack@eecs.umich.eduaddToPath('../ruby') 38732SN/A 39732SN/Aimport Ruby 401858SN/A 411717SN/Aif buildEnv['FULL_SYSTEM']: 422683Sktlim@umich.edu panic("This script requires system-emulation mode (*_SE).") 432680Sktlim@umich.edu 44676SN/A# Get paths we might need. It's expected this file is in m5/configs/example. 452710Sstever@eecs.umich.educonfig_path = os.path.dirname(os.path.abspath(__file__)) 462SN/Aconfig_root = os.path.dirname(config_path) 471858SN/Am5_root = os.path.dirname(config_root) 482SN/A 491147SN/Aparser = optparse.OptionParser() 501147SN/A 512SN/Aparser.add_option("-l", "--requests", metavar="N", default=100, 522SN/A help="Stop after N requests") 532SN/Aparser.add_option("-f", "--wakeup_freq", metavar="N", default=10, 542SN/A help="Wakeup every N cycles") 552SN/Aparser.add_option("--test-type", type="string", default="SeriesGetx", 562680Sktlim@umich.edu help="SeriesGetx|SeriesGets|Invalidate") 572SN/A 582680Sktlim@umich.edu# 59190SN/A# Add the ruby specific and protocol specific options 602680Sktlim@umich.edu# 612680Sktlim@umich.eduRuby.define_options(parser) 622114SN/A 633468Sgblack@eecs.umich.eduexecfile(os.path.join(config_root, "common", "Options.py")) 642700Sktlim@umich.edu 654172Ssaidi@eecs.umich.edu(options, args) = parser.parse_args() 662680Sktlim@umich.edu 672700Sktlim@umich.eduif args: 682700Sktlim@umich.edu print "Error: script doesn't take any positional arguments" 692SN/A sys.exit(1) 702SN/A 712SN/A# 721133SN/A# Select the direct test generator 73716SN/A# 741133SN/Aif options.test_type == "SeriesGetx": 75716SN/A generator = SeriesRequestGenerator(num_cpus = options.num_cpus, 76716SN/A issue_writes = True) 77716SN/Aelif options.test_type == "SeriesGets": 78716SN/A generator = SeriesRequestGenerator(num_cpus = options.num_cpus, 79716SN/A issue_writes = False) 80716SN/Aelif options.test_type == "Invalidate": 814172Ssaidi@eecs.umich.edu generator = InvalidateGenerator(num_cpus = options.num_cpus) 82716SN/Aelse: 83716SN/A print "Error: unknown direct test generator" 844172Ssaidi@eecs.umich.edu sys.exit(1) 85716SN/A 86716SN/A# 874172Ssaidi@eecs.umich.edu# Create the M5 system. Note that the PhysicalMemory Object isn't 88716SN/A# actually used by the rubytester, but is included to support the 89716SN/A# M5 memory size == Ruby memory size checks 90716SN/A# 91716SN/Asystem = System(physmem = PhysicalMemory()) 92716SN/A 93716SN/A# 94716SN/A# Create the ruby random tester 951133SN/A# 96716SN/Asystem.tester = RubyDirectedTester(requests_to_complete = \ 97716SN/A options.requests, 98716SN/A generator = generator) 99716SN/A 100716SN/ARuby.create_system(options, system) 101716SN/A 102716SN/Aassert(options.num_cpus == len(system.ruby._cpu_ruby_ports)) 103716SN/A 104716SN/Afor ruby_port in system.ruby._cpu_ruby_ports: 105716SN/A # 106716SN/A # Tie the ruby tester ports to the ruby cpu ports 107716SN/A # 1084172Ssaidi@eecs.umich.edu system.tester.cpuPort = ruby_port.port 1094172Ssaidi@eecs.umich.edu 1104172Ssaidi@eecs.umich.edu# ----------------------- 1112147SN/A# run simulation 112716SN/A# ----------------------- 1134172Ssaidi@eecs.umich.edu 114716SN/Aroot = Root( full_system = False, system = system ) 115716SN/Aroot.system.mem_mode = 'timing' 116716SN/A 117716SN/A# Not much point in this being higher than the L1 latency 1181133SN/Am5.ticks.setGlobalFrequency('1ns') 119716SN/A 1201133SN/A# instantiate configuration 121716SN/Am5.instantiate() 122716SN/A 123739SN/A# simulate until program terminates 124739SN/Aexit_event = m5.simulate(options.maxtick) 1252683Sktlim@umich.edu 1262683Sktlim@umich.eduprint 'Exiting @ tick', m5.curTick(), 'because', exit_event.getCause() 127716SN/A