1# Copyright (c) 2017, University of Kaiserslautern 2# All rights reserved. 3# 4# Redistribution and use in source and binary forms, with or without 5# modification, are permitted provided that the following conditions are 6# met: 7# 8# 1. Redistributions of source code must retain the above copyright notice, 9# this list of conditions and the following disclaimer. 10# 11# 2. Redistributions in binary form must reproduce the above copyright 12# notice, this list of conditions and the following disclaimer in the 13# documentation and/or other materials provided with the distribution. 14# 15# 3. Neither the name of the copyright holder nor the names of its 16# contributors may be used to endorse or promote products derived from 17# this software without specific prior written permission. 18# 19# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 20# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21# TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER 23# OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, 24# EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 25# PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR 26# PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF 27# LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING 28# NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 29# SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30# 31# Author: Éder F. Zulian 32 33from __future__ import print_function 34from __future__ import absolute_import 35 36import sys 37import argparse 38 39import m5 40from m5.objects import * 41from m5.util import * 42addToPath('../') 43from common import MemConfig 44from common import HMC 45 46 47pd = "Simple 'hello world' example using HMC as main memory" 48parser = argparse.ArgumentParser(description=pd) 49HMC.add_options(parser) 50options = parser.parse_args() 51# create the system we are going to simulate 52system = System() 53# use timing mode for the interaction between master-slave ports 54system.mem_mode = 'timing' 55# set the clock fequency of the system 56clk = '1GHz' 57vd = VoltageDomain(voltage='1V') 58system.clk_domain = SrcClockDomain(clock=clk, voltage_domain=vd) 59# create a simple CPU 60system.cpu = TimingSimpleCPU() 61# config memory system 62MemConfig.config_mem(options, system) 63# hook the CPU ports up to the membus 64system.cpu.icache_port = system.membus.slave 65system.cpu.dcache_port = system.membus.slave 66# create the interrupt controller for the CPU and connect to the membus 67system.cpu.createInterruptController() 68# connect special port in the system to the membus. This port is a 69# functional-only port to allow the system to read and write memory. 70system.system_port = system.membus.slave 71# get ISA for the binary to run. 72isa = str(m5.defines.buildEnv['TARGET_ISA']).lower() 73# run 'hello' and use the compiled ISA to find the binary 74binary = 'tests/test-progs/hello/bin/' + isa + '/linux/hello' 75# create a process for a simple "Hello World" application 76process = Process() 77# cmd is a list which begins with the executable (like argv) 78process.cmd = [binary] 79# set the cpu workload 80system.cpu.workload = process 81# create thread contexts 82system.cpu.createThreads() 83# set up the root SimObject 84root = Root(full_system=False, system=system) 85m5.instantiate() 86m5.simulate() 87