FSConfig.py revision 4965
1# Copyright (c) 2006-2007 The Regents of The University of Michigan
2# All rights reserved.
3#
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5# modification, are permitted provided that the following conditions are
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7# notice, this list of conditions and the following disclaimer;
8# redistributions in binary form must reproduce the above copyright
9# notice, this list of conditions and the following disclaimer in the
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11# neither the name of the copyright holders nor the names of its
12# contributors may be used to endorse or promote products derived from
13# this software without specific prior written permission.
14#
15# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
16# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
17# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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21# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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25# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26#
27# Authors: Kevin Lim
28
29import m5
30from m5 import makeList
31from m5.objects import *
32from Benchmarks import *
33
34class CowIdeDisk(IdeDisk):
35    image = CowDiskImage(child=RawDiskImage(read_only=True),
36                         read_only=False)
37
38    def childImage(self, ci):
39        self.image.child.image_file = ci
40
41def makeLinuxAlphaSystem(mem_mode, mdesc = None):
42    class BaseTsunami(Tsunami):
43        ethernet = NSGigE(configdata=NSGigEPciData(),
44                          pci_bus=0, pci_dev=1, pci_func=0)
45        etherint = NSGigEInt(device=Parent.ethernet)
46        ide = IdeController(disks=[Parent.disk0, Parent.disk2],
47                            pci_func=0, pci_dev=0, pci_bus=0)
48
49    self = LinuxAlphaSystem()
50    if not mdesc:
51        # generic system
52        mdesc = SysConfig()
53    self.readfile = mdesc.script()
54    self.iobus = Bus(bus_id=0)
55    self.membus = Bus(bus_id=1)
56    self.bridge = Bridge(delay='50ns', nack_delay='4ns')
57    self.physmem = PhysicalMemory(range = AddrRange(mdesc.mem()))
58    self.bridge.side_a = self.iobus.port
59    self.bridge.side_b = self.membus.port
60    self.physmem.port = self.membus.port
61    self.disk0 = CowIdeDisk(driveID='master')
62    self.disk2 = CowIdeDisk(driveID='master')
63    self.disk0.childImage(mdesc.disk())
64    self.disk2.childImage(disk('linux-bigswap2.img'))
65    self.tsunami = BaseTsunami()
66    self.tsunami.attachIO(self.iobus)
67    self.tsunami.ide.pio = self.iobus.port
68    self.tsunami.ethernet.pio = self.iobus.port
69    self.simple_disk = SimpleDisk(disk=RawDiskImage(image_file = mdesc.disk(),
70                                               read_only = True))
71    self.intrctrl = IntrControl()
72    self.mem_mode = mem_mode
73    self.sim_console = SimConsole()
74    self.kernel = binary('vmlinux')
75    self.pal = binary('ts_osfpal')
76    self.console = binary('console')
77    self.boot_osflags = 'root=/dev/hda1 console=ttyS0'
78
79    return self
80
81def makeSparcSystem(mem_mode, mdesc = None):
82    class CowMmDisk(MmDisk):
83        image = CowDiskImage(child=RawDiskImage(read_only=True),
84                             read_only=False)
85
86        def childImage(self, ci):
87            self.image.child.image_file = ci
88
89    self = SparcSystem()
90    if not mdesc:
91        # generic system
92        mdesc = SysConfig()
93    self.readfile = mdesc.script()
94    self.iobus = Bus(bus_id=0)
95    self.membus = Bus(bus_id=1)
96    self.bridge = Bridge(fix_partial_write_b=True, delay='50ns', nack_delay='4ns')
97    self.t1000 = T1000()
98    self.t1000.attachOnChipIO(self.membus)
99    self.t1000.attachIO(self.iobus)
100    self.physmem = PhysicalMemory(range = AddrRange(Addr('1MB'), size = '64MB'), zero = True)
101    self.physmem2 = PhysicalMemory(range = AddrRange(Addr('2GB'), size ='256MB'), zero = True)
102    self.bridge.side_a = self.iobus.port
103    self.bridge.side_b = self.membus.port
104    self.physmem.port = self.membus.port
105    self.physmem2.port = self.membus.port
106    self.rom.port = self.membus.port
107    self.nvram.port = self.membus.port
108    self.hypervisor_desc.port = self.membus.port
109    self.partition_desc.port = self.membus.port
110    self.intrctrl = IntrControl()
111    self.disk0 = CowMmDisk()
112    self.disk0.childImage(disk('disk.s10hw2'))
113    self.disk0.pio = self.iobus.port
114    self.reset_bin = binary('reset_new.bin')
115    self.hypervisor_bin = binary('q_new.bin')
116    self.openboot_bin = binary('openboot_new.bin')
117    self.nvram_bin = binary('nvram1')
118    self.hypervisor_desc_bin = binary('1up-hv.bin')
119    self.partition_desc_bin = binary('1up-md.bin')
120
121    return self
122
123
124def makeDualRoot(testSystem, driveSystem, dumpfile):
125    self = Root()
126    self.testsys = testSystem
127    self.drivesys = driveSystem
128    self.etherlink = EtherLink(int1 = Parent.testsys.tsunami.etherint[0],
129                               int2 = Parent.drivesys.tsunami.etherint[0])
130    if dumpfile:
131        self.etherdump = EtherDump(file=dumpfile)
132        self.etherlink.dump = Parent.etherdump
133
134    return self
135