atomic_stat_config.ini revision 10016:dffa80408656
1# Copyright (c) 2012 ARM Limited
2# All rights reserved
3#
4# The license below extends only to copyright in the software and shall
5# not be construed as granting a license to any other intellectual
6# property including but not limited to intellectual property relating
7# to a hardware implementation of the functionality of the software
8# licensed hereunder.  You may use the software subject to the license
9# terms below provided that you ensure that this notice is replicated
10# unmodified and in its entirety in all distributions of the software,
11# modified or unmodified, in source code or in binary form.
12#
13# Redistribution and use in source and binary forms, with or without
14# modification, are permitted provided that the following conditions are
15# met: redistributions of source code must retain the above copyright
16# notice, this list of conditions and the following disclaimer;
17# redistributions in binary form must reproduce the above copyright
18# notice, this list of conditions and the following disclaimer in the
19# documentation and/or other materials provided with the distribution;
20# neither the name of the copyright holders nor the names of its
21# contributors may be used to endorse or promote products derived from
22# this software without specific prior written permission.
23#
24# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
25# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
26# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
27# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
28# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
29# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
30# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
31# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
32# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
33# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
34# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
35#
36# Author: Dam Sunwoo
37#
38# Sample stats config file (AtomicSimpleCPU) for m5stats2streamline.py
39#
40# Stats grouped together will show as grouped in Streamline.
41# E.g.,
42#
43# icache =
44#    icache.overall_hits::total
45#    icache.overall_misses::total
46#
47# will display the icache as a stacked line chart.
48# Charts will still be configurable in Streamline.
49
50[PER_CPU_STATS]
51# "system.cpu#." will automatically prepended for per-CPU stats
52
53cycles =
54    num_busy_cycles
55    num_idle_cycles
56
57register_access =
58    num_int_register_reads
59    num_int_register_writes
60
61mem_refs =
62    num_mem_refs
63
64inst_breakdown =
65    num_conditional_control_insts
66    num_int_insts
67    num_fp_insts
68    num_load_insts
69    num_store_insts
70
71icache =
72    icache.overall_hits::total
73    icache.overall_misses::total
74
75dcache =
76    dcache.overall_hits::total
77    dcache.overall_misses::total
78
79[PER_SWITCHCPU_STATS]
80# If starting from checkpoints, gem5 keeps CPU stats in system.switch_cpus# structures.
81# List per-switchcpu stats here if any
82# "system.switch_cpus#" will automatically prepended for per-CPU stats
83
84[PER_L2_STATS]
85
86l2_cache =
87    overall_hits::total
88    overall_misses::total
89
90[OTHER_STATS]
91
92physmem =
93    system.physmem.bw_total::total
94