m5op_alpha.S revision 275
12227SN/A#include <machine/asm.h> 22227SN/A#include <regdef.h> 32227SN/A 42227SN/A#define m5_op 0x01 52227SN/A#define arm_func 0x00 62227SN/A#define quiesce_func 0x01 72227SN/A#define ivlb_func 0x10 82227SN/A#define ivle_func 0x11 92227SN/A#define m5exit_func 0x20 102227SN/A#define initparam_func 0x30 112227SN/A#define resetstats_func 0x40 122227SN/A 132227SN/A#define INST(op, ra, rb, func) \ 142227SN/A .long (((op) << 26) | ((ra) << 21) | ((rb) << 16) | (func)) 152227SN/A 162227SN/A#define ARM(reg) INST(m5_op, reg, 0, arm_func) 172227SN/A#define QUIESCE() INST(m5_op, 0, 0, quiesce_func) 182227SN/A#define IVLB(reg) INST(m5_op, reg, 0, ivlb_func) 192227SN/A#define IVLE(reg) INST(m5_op, reg, 0, ivle_func) 202227SN/A#define M5_EXIT() INST(m5_op, 0, 0, m5exit_func) 212227SN/A#define INITPARAM(reg) INST(m5_op, reg, 0, initparam_func) 222227SN/A#define RESETSTATS() INST(m5_op, 0, 0, resetstats_func) 232227SN/A 242227SN/A .set noreorder 252227SN/A 262227SN/A .align 4 272227SN/ALEAF(arm) 282665Ssaidi@eecs.umich.edu ARM(16) 292665Ssaidi@eecs.umich.edu RET 302227SN/AEND(arm) 312649Ssaidi@eecs.umich.edu 322649Ssaidi@eecs.umich.edu .align 4 332649Ssaidi@eecs.umich.eduLEAF(quiesce) 342649Ssaidi@eecs.umich.edu QUIESCE() 352649Ssaidi@eecs.umich.edu RET 362227SN/AEND(quiesce) 372227SN/A 382227SN/A .align 4 392227SN/ALEAF(ivlb) 402227SN/A IVLB(16) 412227SN/A RET 422227SN/AEND(ivlb) 432227SN/A 442227SN/A .align 4 452227SN/ALEAF(ivle) 462227SN/A IVLE(16) 472227SN/A RET 482227SN/AEND(ivle) 492227SN/A 502227SN/A .align 4 5112616Sgabeblack@google.comLEAF(m5exit) 522227SN/A M5_EXIT() 5312616Sgabeblack@google.com RET 5412616Sgabeblack@google.comEND(m5exit) 552227SN/A 562227SN/A .align 4 572227SN/ALEAF(initparam) 582227SN/A INITPARAM(0) 592227SN/A RET 602227SN/AEND(initparam) 612227SN/A 622227SN/A .align 4 632227SN/ALEAF(resetstats) 642227SN/A RESETSTATS() 652227SN/A RET 662227SN/AEND(resetstats)