m5op_alpha.S revision 2665
1/* 2 * Copyright (c) 2003-2006 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; 9 * redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution; 12 * neither the name of the copyright holders nor the names of its 13 * contributors may be used to endorse or promote products derived from 14 * this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * Authors: Nathan Binkert 29 * Ali Saidi 30 */ 31 32#define m5_op 0x01 33 34#define arm_func 0x00 35#define quiesce_func 0x01 36#define quiescens_func 0x02 37#define quiescecycle_func 0x03 38#define quiescetime_func 0x04 39#define ivlb_func 0x10 40#define ivle_func 0x11 41#define exit_old_func 0x20 // deprectated! 42#define exit_func 0x21 43#define initparam_func 0x30 44#define resetstats_func 0x40 45#define dumpstats_func 0x41 46#define dumprststats_func 0x42 47#define ckpt_func 0x43 48#define readfile_func 0x50 49#define debugbreak_func 0x51 50#define switchcpu_func 0x52 51#define addsymbol_func 0x53 52#define panic_func 0x54 53 54#define INST(op, ra, rb, func) \ 55 .long (((op) << 26) | ((ra) << 21) | ((rb) << 16) | (func)) 56 57#define LEAF(func) \ 58 .align 3; \ 59 .globl func; \ 60 .ent func; \ 61func: 62 63#define RET \ 64 ret ($26) 65 66#define END(func) \ 67 .end func 68 69#define ARM(reg) INST(m5_op, reg, 0, arm_func) 70#define QUIESCE INST(m5_op, 0, 0, quiesce_func) 71#define QUIESCENS(r1) INST(m5_op, r1, 0, quiescens_func) 72#define QUIESCECYC(r1) INST(m5_op, r1, 0, quiescecycle_func) 73#define QUIESCETIME INST(m5_op, 0, 0, quiescetime_func) 74#define IVLB(reg) INST(m5_op, reg, 0, ivlb_func) 75#define IVLE(reg) INST(m5_op, reg, 0, ivle_func) 76#define M5EXIT(reg) INST(m5_op, reg, 0, exit_func) 77#define INITPARAM(reg) INST(m5_op, reg, 0, initparam_func) 78#define RESET_STATS(r1, r2) INST(m5_op, r1, r2, resetstats_func) 79#define DUMP_STATS(r1, r2) INST(m5_op, r1, r2, dumpstats_func) 80#define DUMPRST_STATS(r1, r2) INST(m5_op, r1, r2, dumprststats_func) 81#define CHECKPOINT(r1, r2) INST(m5_op, r1, r2, ckpt_func) 82#define READFILE INST(m5_op, 0, 0, readfile_func) 83#define DEBUGBREAK INST(m5_op, 0, 0, debugbreak_func) 84#define SWITCHCPU INST(m5_op, 0, 0, switchcpu_func) 85#define ADDSYMBOL(r1,r2) INST(m5_op, r1, r2, addsymbol_func) 86#define PANIC INST(m5_op, 0, 0, panic_func) 87 88 .set noreorder 89 90 .align 4 91LEAF(arm) 92 ARM(16) 93 RET 94END(arm) 95 96 .align 4 97LEAF(quiesce) 98 QUIESCE 99 RET 100END(quiesce) 101 102 .align 4 103LEAF(quiesceNs) 104 QUIESCENS(16) 105 RET 106END(quiesceNs) 107 108 .align 4 109LEAF(quiesceCycle) 110 QUIESCECYC(16) 111 RET 112END(quiesceCycle) 113 114 .align 4 115LEAF(quiesceTime) 116 QUIESCETIME 117 RET 118END(quiesceTime) 119 120 121 .align 4 122LEAF(m5_ivlb) 123 IVLB(16) 124 RET 125END(m5_ivlb) 126 127 .align 4 128LEAF(m5_ivle) 129 IVLE(16) 130 RET 131END(m5_ivle) 132 133 .align 4 134LEAF(m5_exit) 135 M5EXIT(16) 136 RET 137END(m5_exit) 138 139 .align 4 140LEAF(m5_initparam) 141 INITPARAM(0) 142 RET 143END(m5_initparam) 144 145 .align 4 146LEAF(m5_reset_stats) 147 RESET_STATS(16, 17) 148 RET 149END(m5_reset_stats) 150 151 .align 4 152LEAF(m5_dump_stats) 153 DUMP_STATS(16, 17) 154 RET 155END(m5_dump_stats) 156 157 .align 4 158LEAF(m5_dumpreset_stats) 159 DUMPRST_STATS(16, 17) 160 RET 161END(m5_dumpreset_stats) 162 163 .align 4 164LEAF(m5_checkpoint) 165 CHECKPOINT(16, 17) 166 RET 167END(m5_checkpoint) 168 169 .align 4 170LEAF(m5_readfile) 171 READFILE 172 RET 173END(m5_readfile) 174 175 .align 4 176LEAF(m5_debugbreak) 177 DEBUGBREAK 178 RET 179END(m5_debugbreak) 180 181 .align 4 182LEAF(m5_switchcpu) 183 SWITCHCPU 184 RET 185END(m5_switchcpu) 186 187 .align 4 188LEAF(m5_addsymbol) 189 ADDSYMBOL(16, 17) 190 RET 191END(m5_addsymbol) 192 193 .align 4 194LEAF(m5_panic) 195 PANIC 196 RET 197END(m5_panic) 198 199 200