1/*
2 * Copyright (c) 2016 The University of Virginia
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Alec Roelke
29 */
30
31#pragma once
32
33#include <cstdint>
34#include <limits>
35
36#include "insttest.h"
37
38namespace D
39{
40
41constexpr inline uint64_t
42bits(double d)
43{
44    return reinterpret_cast<uint64_t&>(d);
45}
46
47constexpr inline double
48number(uint64_t b)
49{
50    return reinterpret_cast<double&>(b);
51}
52
53inline bool
54isquietnan(double f)
55{
56    return std::isnan(f) && (bits(f)&0x0008000000000000ULL) != 0;
57}
58
59inline bool
60issignalingnan(double f)
61{
62    return std::isnan(f) && (bits(f)&0x0008000000000000ULL) == 0;
63}
64
65inline double
66load(double mem)
67{
68    double fd = std::numeric_limits<double>::signaling_NaN();
69    asm volatile("fld %0,%1"
70        : "=f" (fd)
71        : "m" (mem));
72    return fd;
73}
74
75inline double
76store(double fs)
77{
78    double mem = std::numeric_limits<double>::signaling_NaN();
79    asm volatile("fsd %1,%0" : "=m" (mem) : "f" (fs));
80    return mem;
81}
82
83inline double
84fmadd_d(double fs1, double fs2, double fs3)
85{
86    double fd = std::numeric_limits<double>::signaling_NaN();
87    FR4OP("fmadd.d", fd, fs1, fs2, fs3);
88    return fd;
89}
90
91inline double
92fmsub_d(double fs1, double fs2, double fs3)
93{
94    double fd = std::numeric_limits<double>::signaling_NaN();
95    FR4OP("fmsub.d", fd, fs1, fs2, fs3);
96    return fd;
97}
98
99inline double
100fnmsub_d(double fs1, double fs2, double fs3)
101{
102    double fd = std::numeric_limits<double>::signaling_NaN();
103    FR4OP("fnmsub.d", fd, fs1, fs2, fs3);
104    return fd;
105}
106
107inline double
108fnmadd_d(double fs1, double fs2, double fs3)
109{
110    double fd = std::numeric_limits<double>::signaling_NaN();
111    FR4OP("fnmadd.d", fd, fs1, fs2, fs3);
112    return fd;
113}
114
115inline double
116fadd_d(double fs1, double fs2)
117{
118    double fd = std::numeric_limits<double>::signaling_NaN();
119    FROP("fadd.d", fd, fs1, fs2);
120    return fd;
121}
122
123inline double
124fsub_d(double fs1, double fs2)
125{
126    double fd = std::numeric_limits<double>::signaling_NaN();
127    FROP("fsub.d", fd, fs1, fs2);
128    return fd;
129}
130
131inline double
132fmul_d(double fs1, double fs2)
133{
134    double fd = std::numeric_limits<double>::signaling_NaN();
135    FROP("fmul.d", fd, fs1, fs2);
136    return fd;
137}
138
139inline double
140fdiv_d(double fs1, double fs2)
141{
142    double fd = std::numeric_limits<double>::signaling_NaN();
143    FROP("fdiv.d", fd, fs1, fs2);
144    return fd;
145}
146
147inline double
148fsqrt_d(double fs1)
149{
150    double fd = std::numeric_limits<double>::signaling_NaN();
151    asm volatile("fsqrt.d %0,%1" : "=f" (fd) : "f" (fs1));
152    return fd;
153}
154
155inline double
156fsgnj_d(double fs1, double fs2)
157{
158    double fd = std::numeric_limits<double>::signaling_NaN();
159    FROP("fsgnj.d", fd, fs1, fs2);
160    return fd;
161}
162
163inline double
164fsgnjn_d(double fs1, double fs2)
165{
166    double fd = std::numeric_limits<double>::signaling_NaN();
167    FROP("fsgnjn.d", fd, fs1, fs2);
168    return fd;
169}
170
171inline double
172fsgnjx_d(double fs1, double fs2)
173{
174    double fd = std::numeric_limits<double>::signaling_NaN();
175    FROP("fsgnjx.d", fd, fs1, fs2);
176    return fd;
177}
178
179inline double
180fmin_d(double fs1, double fs2)
181{
182    double fd = std::numeric_limits<double>::signaling_NaN();
183    FROP("fmin.d", fd, fs1, fs2);
184    return fd;
185}
186
187inline double
188fmax_d(double fs1, double fs2)
189{
190    double fd = std::numeric_limits<double>::signaling_NaN();
191    FROP("fmax.d", fd, fs1, fs2);
192    return fd;
193}
194
195inline float
196fcvt_s_d(double fs1)
197{
198    float fd = std::numeric_limits<float>::signaling_NaN();
199    asm volatile("fcvt.s.d %0,%1" : "=f" (fd) : "f" (fs1));
200    return fd;
201}
202
203inline double
204fcvt_d_s(float fs1)
205{
206    double fd = std::numeric_limits<double>::signaling_NaN();
207    asm volatile("fcvt.d.s %0,%1" : "=f" (fd) : "f" (fs1));
208    return fd;
209}
210
211inline bool
212feq_d(double fs1, double fs2)
213{
214    bool rd = false;
215    asm volatile("feq.d %0,%1,%2" : "=r" (rd) : "f" (fs1), "f" (fs2));
216    return rd;
217}
218
219inline bool
220flt_d(double fs1, double fs2)
221{
222    bool rd = false;
223    asm volatile("flt.d %0,%1,%2" : "=r" (rd) : "f" (fs1), "f" (fs2));
224    return rd;
225}
226
227inline bool
228fle_d(double fs1, double fs2)
229{
230    bool rd = false;
231    asm volatile("fle.d %0,%1,%2" : "=r" (rd) : "f" (fs1), "f" (fs2));
232    return rd;
233}
234
235inline uint64_t
236fclass_d(double fs1)
237{
238    uint64_t rd = -1;
239    asm volatile("fclass.d %0,%1" : "=r" (rd) : "f" (fs1));
240    return rd;
241}
242
243inline int64_t
244fcvt_w_d(double fs1)
245{
246    int64_t rd = 0;
247    asm volatile("fcvt.w.d %0,%1" : "=r" (rd) : "f" (fs1));
248    return rd;
249}
250
251inline uint64_t
252fcvt_wu_d(double fs1)
253{
254    uint64_t rd = 0;
255    asm volatile("fcvt.wu.d %0,%1" : "=r" (rd) : "f" (fs1));
256    return rd;
257}
258
259inline float
260fcvt_d_w(int64_t rs1)
261{
262    double fd = std::numeric_limits<double>::signaling_NaN();
263    asm volatile("fcvt.d.w %0,%1" : "=f" (fd) : "r" (rs1));
264    return fd;
265}
266
267inline double
268fcvt_d_wu(uint64_t rs1)
269{
270    double fd = std::numeric_limits<double>::signaling_NaN();
271    asm volatile("fcvt.d.wu %0,%1" : "=f" (fd) : "r" (rs1));
272    return fd;
273}
274
275inline int64_t
276fcvt_l_d(double fs1)
277{
278    int64_t rd = 0;
279    asm volatile("fcvt.l.d %0,%1" : "=r" (rd) : "f" (fs1));
280    return rd;
281}
282
283inline uint64_t
284fcvt_lu_d(double fs1)
285{
286    uint64_t rd = 0;
287    asm volatile("fcvt.lu.d %0,%1" : "=r" (rd) : "f" (fs1));
288    return rd;
289}
290
291inline uint64_t
292fmv_x_d(double fs1)
293{
294    uint64_t rd = 0;
295    asm volatile("fmv.x.d %0,%1" : "=r" (rd) : "f" (fs1));
296    return rd;
297}
298
299inline double
300fcvt_d_l(int64_t rs1)
301{
302    double fd = std::numeric_limits<double>::signaling_NaN();
303    asm volatile("fcvt.d.l %0,%1" : "=f" (fd) : "r" (rs1));
304    return fd;
305}
306
307inline double
308fcvt_d_lu(uint64_t rs1)
309{
310    double fd = std::numeric_limits<double>::signaling_NaN();
311    asm volatile("fcvt.d.lu %0,%1" : "=f" (fd) : "r" (rs1));
312    return fd;
313}
314
315inline double
316fmv_d_x(uint64_t rs1)
317{
318    double fd = std::numeric_limits<double>::signaling_NaN();
319    asm volatile("fmv.d.x %0,%1" : "=f" (fd) : "r" (rs1));
320    return fd;
321}
322
323} // namespace D
324