1# See LICENSE for license details.
2
3#*****************************************************************************
4# addiw.S
5#-----------------------------------------------------------------------------
6#
7# Test addiw instruction.
8#
9
10#include "riscv_test.h"
11#include "test_macros.h"
12
13RVTEST_RV64U
14RVTEST_CODE_BEGIN
15
16  #-------------------------------------------------------------
17  # Arithmetic tests
18  #-------------------------------------------------------------
19
20  TEST_IMM_OP( 2,  addiw, 0x00000000, 0x00000000, 0x000 );
21  TEST_IMM_OP( 3,  addiw, 0x00000002, 0x00000001, 0x001 );
22  TEST_IMM_OP( 4,  addiw, 0x0000000a, 0x00000003, 0x007 );
23
24  TEST_IMM_OP( 5,  addiw, 0xfffffffffffff800, 0x0000000000000000, 0x800 );
25  TEST_IMM_OP( 6,  addiw, 0xffffffff80000000, 0xffffffff80000000, 0x000 );
26  TEST_IMM_OP( 7,  addiw, 0x000000007ffff800, 0xffffffff80000000, 0x800 );
27
28  TEST_IMM_OP( 8,  addiw, 0x00000000000007ff, 0x00000000, 0x7ff );
29  TEST_IMM_OP( 9,  addiw, 0x000000007fffffff, 0x7fffffff, 0x000 );
30  TEST_IMM_OP( 10, addiw, 0xffffffff800007fe, 0x7fffffff, 0x7ff );
31
32  TEST_IMM_OP( 11, addiw, 0xffffffff800007ff, 0xffffffff80000000, 0x7ff );
33  TEST_IMM_OP( 12, addiw, 0x000000007ffff7ff, 0x000000007fffffff, 0x800 );
34
35  TEST_IMM_OP( 13, addiw, 0xffffffffffffffff, 0x0000000000000000, 0xfff );
36  TEST_IMM_OP( 14, addiw, 0x0000000000000000, 0xffffffffffffffff, 0x001 );
37  TEST_IMM_OP( 15, addiw, 0xfffffffffffffffe, 0xffffffffffffffff, 0xfff );
38
39  TEST_IMM_OP( 16, addiw, 0xffffffff80000000, 0x7fffffff, 0x001 );
40
41  #-------------------------------------------------------------
42  # Source/Destination tests
43  #-------------------------------------------------------------
44
45  TEST_IMM_SRC1_EQ_DEST( 17, addiw, 24, 13, 11 );
46
47  #-------------------------------------------------------------
48  # Bypassing tests
49  #-------------------------------------------------------------
50
51  TEST_IMM_DEST_BYPASS( 18, 0, addiw, 24, 13, 11 );
52  TEST_IMM_DEST_BYPASS( 19, 1, addiw, 23, 13, 10 );
53  TEST_IMM_DEST_BYPASS( 20, 2, addiw, 22, 13,  9 );
54
55  TEST_IMM_SRC1_BYPASS( 21, 0, addiw, 24, 13, 11 );
56  TEST_IMM_SRC1_BYPASS( 22, 1, addiw, 23, 13, 10 );
57  TEST_IMM_SRC1_BYPASS( 23, 2, addiw, 22, 13,  9 );
58
59  TEST_IMM_ZEROSRC1( 24, addiw, 32, 32 );
60  TEST_IMM_ZERODEST( 25, addiw, 33, 50 );
61
62  TEST_PASSFAIL
63
64RVTEST_CODE_END
65
66  .data
67RVTEST_DATA_BEGIN
68
69  TEST_DATA
70
71RVTEST_DATA_END
72