1 2---------- Begin Simulation Statistics ---------- 3sim_seconds 0.230201 4sim_ticks 230201146500 5final_tick 230201146500 6sim_freq 1000000000000 7host_inst_rate 699032 8host_op_rate 736956 9host_tick_rate 936426495 10host_mem_usage 284812 11host_seconds 245.83 12sim_insts 171842484 13sim_ops 181165371 14system.voltage_domain.voltage 1 15system.clk_domain.clock 1000 16system.physmem.pwrStateResidencyTicks::UNDEFINED 230201146500 17system.physmem.bytes_read::cpu.inst 110656 18system.physmem.bytes_read::cpu.data 110336 19system.physmem.bytes_read::total 220992 20system.physmem.bytes_inst_read::cpu.inst 110656 21system.physmem.bytes_inst_read::total 110656 22system.physmem.num_reads::cpu.inst 1729 23system.physmem.num_reads::cpu.data 1724 24system.physmem.num_reads::total 3453 25system.physmem.bw_read::cpu.inst 480693 26system.physmem.bw_read::cpu.data 479303 27system.physmem.bw_read::total 959995 28system.physmem.bw_inst_read::cpu.inst 480693 29system.physmem.bw_inst_read::total 480693 30system.physmem.bw_total::cpu.inst 480693 31system.physmem.bw_total::cpu.data 479303 32system.physmem.bw_total::total 959995 33system.pwrStateResidencyTicks::UNDEFINED 230201146500 34system.cpu_clk_domain.clock 500 35system.cpu.dstage2_mmu.stage2_tlb.walker.pwrStateResidencyTicks::UNDEFINED 230201146500 36system.cpu.dstage2_mmu.stage2_tlb.walker.walks 0 37system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::Data 0 38system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::Inst 0 39system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::total 0 40system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Completed::Data 0 41system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Completed::Inst 0 42system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Completed::total 0 43system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin::total 0 44system.cpu.dstage2_mmu.stage2_tlb.inst_hits 0 45system.cpu.dstage2_mmu.stage2_tlb.inst_misses 0 46system.cpu.dstage2_mmu.stage2_tlb.read_hits 0 47system.cpu.dstage2_mmu.stage2_tlb.read_misses 0 48system.cpu.dstage2_mmu.stage2_tlb.write_hits 0 49system.cpu.dstage2_mmu.stage2_tlb.write_misses 0 50system.cpu.dstage2_mmu.stage2_tlb.flush_tlb 0 51system.cpu.dstage2_mmu.stage2_tlb.flush_tlb_mva 0 52system.cpu.dstage2_mmu.stage2_tlb.flush_tlb_mva_asid 0 53system.cpu.dstage2_mmu.stage2_tlb.flush_tlb_asid 0 54system.cpu.dstage2_mmu.stage2_tlb.flush_entries 0 55system.cpu.dstage2_mmu.stage2_tlb.align_faults 0 56system.cpu.dstage2_mmu.stage2_tlb.prefetch_faults 0 57system.cpu.dstage2_mmu.stage2_tlb.domain_faults 0 58system.cpu.dstage2_mmu.stage2_tlb.perms_faults 0 59system.cpu.dstage2_mmu.stage2_tlb.read_accesses 0 60system.cpu.dstage2_mmu.stage2_tlb.write_accesses 0 61system.cpu.dstage2_mmu.stage2_tlb.inst_accesses 0 62system.cpu.dstage2_mmu.stage2_tlb.hits 0 63system.cpu.dstage2_mmu.stage2_tlb.misses 0 64system.cpu.dstage2_mmu.stage2_tlb.accesses 0 65system.cpu.dtb.walker.pwrStateResidencyTicks::UNDEFINED 230201146500 66system.cpu.dtb.walker.walks 0 67system.cpu.dtb.walker.walkRequestOrigin_Requested::Data 0 68system.cpu.dtb.walker.walkRequestOrigin_Requested::Inst 0 69system.cpu.dtb.walker.walkRequestOrigin_Requested::total 0 70system.cpu.dtb.walker.walkRequestOrigin_Completed::Data 0 71system.cpu.dtb.walker.walkRequestOrigin_Completed::Inst 0 72system.cpu.dtb.walker.walkRequestOrigin_Completed::total 0 73system.cpu.dtb.walker.walkRequestOrigin::total 0 74system.cpu.dtb.inst_hits 0 75system.cpu.dtb.inst_misses 0 76system.cpu.dtb.read_hits 0 77system.cpu.dtb.read_misses 0 78system.cpu.dtb.write_hits 0 79system.cpu.dtb.write_misses 0 80system.cpu.dtb.flush_tlb 0 81system.cpu.dtb.flush_tlb_mva 0 82system.cpu.dtb.flush_tlb_mva_asid 0 83system.cpu.dtb.flush_tlb_asid 0 84system.cpu.dtb.flush_entries 0 85system.cpu.dtb.align_faults 0 86system.cpu.dtb.prefetch_faults 0 87system.cpu.dtb.domain_faults 0 88system.cpu.dtb.perms_faults 0 89system.cpu.dtb.read_accesses 0 90system.cpu.dtb.write_accesses 0 91system.cpu.dtb.inst_accesses 0 92system.cpu.dtb.hits 0 93system.cpu.dtb.misses 0 94system.cpu.dtb.accesses 0 95system.cpu.istage2_mmu.stage2_tlb.walker.pwrStateResidencyTicks::UNDEFINED 230201146500 96system.cpu.istage2_mmu.stage2_tlb.walker.walks 0 97system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::Data 0 98system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::Inst 0 99system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::total 0 100system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Completed::Data 0 101system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Completed::Inst 0 102system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Completed::total 0 103system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin::total 0 104system.cpu.istage2_mmu.stage2_tlb.inst_hits 0 105system.cpu.istage2_mmu.stage2_tlb.inst_misses 0 106system.cpu.istage2_mmu.stage2_tlb.read_hits 0 107system.cpu.istage2_mmu.stage2_tlb.read_misses 0 108system.cpu.istage2_mmu.stage2_tlb.write_hits 0 109system.cpu.istage2_mmu.stage2_tlb.write_misses 0 110system.cpu.istage2_mmu.stage2_tlb.flush_tlb 0 111system.cpu.istage2_mmu.stage2_tlb.flush_tlb_mva 0 112system.cpu.istage2_mmu.stage2_tlb.flush_tlb_mva_asid 0 113system.cpu.istage2_mmu.stage2_tlb.flush_tlb_asid 0 114system.cpu.istage2_mmu.stage2_tlb.flush_entries 0 115system.cpu.istage2_mmu.stage2_tlb.align_faults 0 116system.cpu.istage2_mmu.stage2_tlb.prefetch_faults 0 117system.cpu.istage2_mmu.stage2_tlb.domain_faults 0 118system.cpu.istage2_mmu.stage2_tlb.perms_faults 0 119system.cpu.istage2_mmu.stage2_tlb.read_accesses 0 120system.cpu.istage2_mmu.stage2_tlb.write_accesses 0 121system.cpu.istage2_mmu.stage2_tlb.inst_accesses 0 122system.cpu.istage2_mmu.stage2_tlb.hits 0 123system.cpu.istage2_mmu.stage2_tlb.misses 0 124system.cpu.istage2_mmu.stage2_tlb.accesses 0 125system.cpu.itb.walker.pwrStateResidencyTicks::UNDEFINED 230201146500 126system.cpu.itb.walker.walks 0 127system.cpu.itb.walker.walkRequestOrigin_Requested::Data 0 128system.cpu.itb.walker.walkRequestOrigin_Requested::Inst 0 129system.cpu.itb.walker.walkRequestOrigin_Requested::total 0 130system.cpu.itb.walker.walkRequestOrigin_Completed::Data 0 131system.cpu.itb.walker.walkRequestOrigin_Completed::Inst 0 132system.cpu.itb.walker.walkRequestOrigin_Completed::total 0 133system.cpu.itb.walker.walkRequestOrigin::total 0 134system.cpu.itb.inst_hits 0 135system.cpu.itb.inst_misses 0 136system.cpu.itb.read_hits 0 137system.cpu.itb.read_misses 0 138system.cpu.itb.write_hits 0 139system.cpu.itb.write_misses 0 140system.cpu.itb.flush_tlb 0 141system.cpu.itb.flush_tlb_mva 0 142system.cpu.itb.flush_tlb_mva_asid 0 143system.cpu.itb.flush_tlb_asid 0 144system.cpu.itb.flush_entries 0 145system.cpu.itb.align_faults 0 146system.cpu.itb.prefetch_faults 0 147system.cpu.itb.domain_faults 0 148system.cpu.itb.perms_faults 0 149system.cpu.itb.read_accesses 0 150system.cpu.itb.write_accesses 0 151system.cpu.itb.inst_accesses 0 152system.cpu.itb.hits 0 153system.cpu.itb.misses 0 154system.cpu.itb.accesses 0 155system.cpu.workload.numSyscalls 400 156system.cpu.pwrStateResidencyTicks::ON 230201146500 157system.cpu.numCycles 460402293 158system.cpu.numWorkItemsStarted 0 159system.cpu.numWorkItemsCompleted 0 160system.cpu.committedInsts 171842484 161system.cpu.committedOps 181165371 162system.cpu.num_int_alu_accesses 143085668 163system.cpu.num_fp_alu_accesses 1752310 164system.cpu.num_func_calls 3545028 165system.cpu.num_conditional_control_insts 32201008 166system.cpu.num_int_insts 143085668 167system.cpu.num_fp_insts 1752310 168system.cpu.num_int_register_reads 238631773 169system.cpu.num_int_register_writes 98192342 170system.cpu.num_fp_register_reads 2822225 171system.cpu.num_fp_register_writes 2378039 172system.cpu.num_cc_register_reads 626384530 173system.cpu.num_cc_register_writes 190815535 174system.cpu.num_mem_refs 40540779 175system.cpu.num_load_insts 27896144 176system.cpu.num_store_insts 12644635 177system.cpu.num_idle_cycles 0 178system.cpu.num_busy_cycles 460402293 179system.cpu.not_idle_fraction 1 180system.cpu.idle_fraction 0 181system.cpu.Branches 40300312 182system.cpu.op_class::No_OpClass 0 0.00% 0.00% 183system.cpu.op_class::IntAlu 138988213 76.51% 76.51% 184system.cpu.op_class::IntMult 908940 0.50% 77.01% 185system.cpu.op_class::IntDiv 0 0.00% 77.01% 186system.cpu.op_class::FloatAdd 0 0.00% 77.01% 187system.cpu.op_class::FloatCmp 0 0.00% 77.01% 188system.cpu.op_class::FloatCvt 0 0.00% 77.01% 189system.cpu.op_class::FloatMult 0 0.00% 77.01% 190system.cpu.op_class::FloatMultAcc 0 0.00% 77.01% 191system.cpu.op_class::FloatDiv 0 0.00% 77.01% 192system.cpu.op_class::FloatMisc 0 0.00% 77.01% 193system.cpu.op_class::FloatSqrt 0 0.00% 77.01% 194system.cpu.op_class::SimdAdd 0 0.00% 77.01% 195system.cpu.op_class::SimdAddAcc 0 0.00% 77.01% 196system.cpu.op_class::SimdAlu 0 0.00% 77.01% 197system.cpu.op_class::SimdCmp 0 0.00% 77.01% 198system.cpu.op_class::SimdCvt 0 0.00% 77.01% 199system.cpu.op_class::SimdMisc 0 0.00% 77.01% 200system.cpu.op_class::SimdMult 0 0.00% 77.01% 201system.cpu.op_class::SimdMultAcc 0 0.00% 77.01% 202system.cpu.op_class::SimdShift 0 0.00% 77.01% 203system.cpu.op_class::SimdShiftAcc 0 0.00% 77.01% 204system.cpu.op_class::SimdSqrt 0 0.00% 77.01% 205system.cpu.op_class::SimdFloatAdd 32754 0.02% 77.03% 206system.cpu.op_class::SimdFloatAlu 0 0.00% 77.03% 207system.cpu.op_class::SimdFloatCmp 154829 0.09% 77.12% 208system.cpu.op_class::SimdFloatCvt 238880 0.13% 77.25% 209system.cpu.op_class::SimdFloatDiv 76016 0.04% 77.29% 210system.cpu.op_class::SimdFloatMisc 437591 0.24% 77.53% 211system.cpu.op_class::SimdFloatMult 200806 0.11% 77.64% 212system.cpu.op_class::SimdFloatMultAcc 71617 0.04% 77.68% 213system.cpu.op_class::SimdFloatSqrt 318 0.00% 77.68% 214system.cpu.op_class::MemRead 27348059 15.06% 92.74% 215system.cpu.op_class::MemWrite 12498389 6.88% 99.62% 216system.cpu.op_class::FloatMemRead 548085 0.30% 99.92% 217system.cpu.op_class::FloatMemWrite 146246 0.08% 100.00% 218system.cpu.op_class::IprAccess 0 0.00% 100.00% 219system.cpu.op_class::InstPrefetch 0 0.00% 100.00% 220system.cpu.op_class::total 181650743 221system.cpu.dcache.tags.pwrStateResidencyTicks::UNDEFINED 230201146500 222system.cpu.dcache.tags.replacements 40 223system.cpu.dcache.tags.tagsinuse 1363.564425 224system.cpu.dcache.tags.total_refs 40162626 225system.cpu.dcache.tags.sampled_refs 1789 226system.cpu.dcache.tags.avg_refs 22449.762996 227system.cpu.dcache.tags.warmup_cycle 0 228system.cpu.dcache.tags.occ_blocks::cpu.data 1363.564425 229system.cpu.dcache.tags.occ_percent::cpu.data 0.332901 230system.cpu.dcache.tags.occ_percent::total 0.332901 231system.cpu.dcache.tags.occ_task_id_blocks::1024 1749 232system.cpu.dcache.tags.age_task_id_blocks_1024::0 14 233system.cpu.dcache.tags.age_task_id_blocks_1024::1 21 234system.cpu.dcache.tags.age_task_id_blocks_1024::2 67 235system.cpu.dcache.tags.age_task_id_blocks_1024::3 302 236system.cpu.dcache.tags.age_task_id_blocks_1024::4 1345 237system.cpu.dcache.tags.occ_task_id_percent::1024 0.427002 238system.cpu.dcache.tags.tag_accesses 80330619 239system.cpu.dcache.tags.data_accesses 80330619 240system.cpu.dcache.pwrStateResidencyTicks::UNDEFINED 230201146500 241system.cpu.dcache.ReadReq_hits::cpu.data 27754163 242system.cpu.dcache.ReadReq_hits::total 27754163 243system.cpu.dcache.WriteReq_hits::cpu.data 12363187 244system.cpu.dcache.WriteReq_hits::total 12363187 245system.cpu.dcache.SoftPFReq_hits::cpu.data 462 246system.cpu.dcache.SoftPFReq_hits::total 462 247system.cpu.dcache.LoadLockedReq_hits::cpu.data 22407 248system.cpu.dcache.LoadLockedReq_hits::total 22407 249system.cpu.dcache.StoreCondReq_hits::cpu.data 22407 250system.cpu.dcache.StoreCondReq_hits::total 22407 251system.cpu.dcache.demand_hits::cpu.data 40117350 252system.cpu.dcache.demand_hits::total 40117350 253system.cpu.dcache.overall_hits::cpu.data 40117812 254system.cpu.dcache.overall_hits::total 40117812 255system.cpu.dcache.ReadReq_misses::cpu.data 688 256system.cpu.dcache.ReadReq_misses::total 688 257system.cpu.dcache.WriteReq_misses::cpu.data 1100 258system.cpu.dcache.WriteReq_misses::total 1100 259system.cpu.dcache.SoftPFReq_misses::cpu.data 1 260system.cpu.dcache.SoftPFReq_misses::total 1 261system.cpu.dcache.demand_misses::cpu.data 1788 262system.cpu.dcache.demand_misses::total 1788 263system.cpu.dcache.overall_misses::cpu.data 1789 264system.cpu.dcache.overall_misses::total 1789 265system.cpu.dcache.ReadReq_miss_latency::cpu.data 40571000 266system.cpu.dcache.ReadReq_miss_latency::total 40571000 267system.cpu.dcache.WriteReq_miss_latency::cpu.data 68930500 268system.cpu.dcache.WriteReq_miss_latency::total 68930500 269system.cpu.dcache.demand_miss_latency::cpu.data 109501500 270system.cpu.dcache.demand_miss_latency::total 109501500 271system.cpu.dcache.overall_miss_latency::cpu.data 109501500 272system.cpu.dcache.overall_miss_latency::total 109501500 273system.cpu.dcache.ReadReq_accesses::cpu.data 27754851 274system.cpu.dcache.ReadReq_accesses::total 27754851 275system.cpu.dcache.WriteReq_accesses::cpu.data 12364287 276system.cpu.dcache.WriteReq_accesses::total 12364287 277system.cpu.dcache.SoftPFReq_accesses::cpu.data 463 278system.cpu.dcache.SoftPFReq_accesses::total 463 279system.cpu.dcache.LoadLockedReq_accesses::cpu.data 22407 280system.cpu.dcache.LoadLockedReq_accesses::total 22407 281system.cpu.dcache.StoreCondReq_accesses::cpu.data 22407 282system.cpu.dcache.StoreCondReq_accesses::total 22407 283system.cpu.dcache.demand_accesses::cpu.data 40119138 284system.cpu.dcache.demand_accesses::total 40119138 285system.cpu.dcache.overall_accesses::cpu.data 40119601 286system.cpu.dcache.overall_accesses::total 40119601 287system.cpu.dcache.ReadReq_miss_rate::cpu.data 0.000025 288system.cpu.dcache.ReadReq_miss_rate::total 0.000025 289system.cpu.dcache.WriteReq_miss_rate::cpu.data 0.000089 290system.cpu.dcache.WriteReq_miss_rate::total 0.000089 291system.cpu.dcache.SoftPFReq_miss_rate::cpu.data 0.002160 292system.cpu.dcache.SoftPFReq_miss_rate::total 0.002160 293system.cpu.dcache.demand_miss_rate::cpu.data 0.000045 294system.cpu.dcache.demand_miss_rate::total 0.000045 295system.cpu.dcache.overall_miss_rate::cpu.data 0.000045 296system.cpu.dcache.overall_miss_rate::total 0.000045 297system.cpu.dcache.ReadReq_avg_miss_latency::cpu.data 58969.476744 298system.cpu.dcache.ReadReq_avg_miss_latency::total 58969.476744 299system.cpu.dcache.WriteReq_avg_miss_latency::cpu.data 62664.090909 300system.cpu.dcache.WriteReq_avg_miss_latency::total 62664.090909 301system.cpu.dcache.demand_avg_miss_latency::cpu.data 61242.449664 302system.cpu.dcache.demand_avg_miss_latency::total 61242.449664 303system.cpu.dcache.overall_avg_miss_latency::cpu.data 61208.216881 304system.cpu.dcache.overall_avg_miss_latency::total 61208.216881 305system.cpu.dcache.blocked_cycles::no_mshrs 0 306system.cpu.dcache.blocked_cycles::no_targets 0 307system.cpu.dcache.blocked::no_mshrs 0 308system.cpu.dcache.blocked::no_targets 0 309system.cpu.dcache.avg_blocked_cycles::no_mshrs nan 310system.cpu.dcache.avg_blocked_cycles::no_targets nan 311system.cpu.dcache.writebacks::writebacks 16 312system.cpu.dcache.writebacks::total 16 313system.cpu.dcache.ReadReq_mshr_misses::cpu.data 688 314system.cpu.dcache.ReadReq_mshr_misses::total 688 315system.cpu.dcache.WriteReq_mshr_misses::cpu.data 1100 316system.cpu.dcache.WriteReq_mshr_misses::total 1100 317system.cpu.dcache.SoftPFReq_mshr_misses::cpu.data 1 318system.cpu.dcache.SoftPFReq_mshr_misses::total 1 319system.cpu.dcache.demand_mshr_misses::cpu.data 1788 320system.cpu.dcache.demand_mshr_misses::total 1788 321system.cpu.dcache.overall_mshr_misses::cpu.data 1789 322system.cpu.dcache.overall_mshr_misses::total 1789 323system.cpu.dcache.ReadReq_mshr_miss_latency::cpu.data 39883000 324system.cpu.dcache.ReadReq_mshr_miss_latency::total 39883000 325system.cpu.dcache.WriteReq_mshr_miss_latency::cpu.data 67830500 326system.cpu.dcache.WriteReq_mshr_miss_latency::total 67830500 327system.cpu.dcache.SoftPFReq_mshr_miss_latency::cpu.data 62000 328system.cpu.dcache.SoftPFReq_mshr_miss_latency::total 62000 329system.cpu.dcache.demand_mshr_miss_latency::cpu.data 107713500 330system.cpu.dcache.demand_mshr_miss_latency::total 107713500 331system.cpu.dcache.overall_mshr_miss_latency::cpu.data 107775500 332system.cpu.dcache.overall_mshr_miss_latency::total 107775500 333system.cpu.dcache.ReadReq_mshr_miss_rate::cpu.data 0.000025 334system.cpu.dcache.ReadReq_mshr_miss_rate::total 0.000025 335system.cpu.dcache.WriteReq_mshr_miss_rate::cpu.data 0.000089 336system.cpu.dcache.WriteReq_mshr_miss_rate::total 0.000089 337system.cpu.dcache.SoftPFReq_mshr_miss_rate::cpu.data 0.002160 338system.cpu.dcache.SoftPFReq_mshr_miss_rate::total 0.002160 339system.cpu.dcache.demand_mshr_miss_rate::cpu.data 0.000045 340system.cpu.dcache.demand_mshr_miss_rate::total 0.000045 341system.cpu.dcache.overall_mshr_miss_rate::cpu.data 0.000045 342system.cpu.dcache.overall_mshr_miss_rate::total 0.000045 343system.cpu.dcache.ReadReq_avg_mshr_miss_latency::cpu.data 57969.476744 344system.cpu.dcache.ReadReq_avg_mshr_miss_latency::total 57969.476744 345system.cpu.dcache.WriteReq_avg_mshr_miss_latency::cpu.data 61664.090909 346system.cpu.dcache.WriteReq_avg_mshr_miss_latency::total 61664.090909 347system.cpu.dcache.SoftPFReq_avg_mshr_miss_latency::cpu.data 62000 348system.cpu.dcache.SoftPFReq_avg_mshr_miss_latency::total 62000 349system.cpu.dcache.demand_avg_mshr_miss_latency::cpu.data 60242.449664 350system.cpu.dcache.demand_avg_mshr_miss_latency::total 60242.449664 351system.cpu.dcache.overall_avg_mshr_miss_latency::cpu.data 60243.432085 352system.cpu.dcache.overall_avg_mshr_miss_latency::total 60243.432085 353system.cpu.icache.tags.pwrStateResidencyTicks::UNDEFINED 230201146500 354system.cpu.icache.tags.replacements 1506 355system.cpu.icache.tags.tagsinuse 1147.953271 356system.cpu.icache.tags.total_refs 189857002 357system.cpu.icache.tags.sampled_refs 3051 358system.cpu.icache.tags.avg_refs 62227.794821 359system.cpu.icache.tags.warmup_cycle 0 360system.cpu.icache.tags.occ_blocks::cpu.inst 1147.953271 361system.cpu.icache.tags.occ_percent::cpu.inst 0.560524 362system.cpu.icache.tags.occ_percent::total 0.560524 363system.cpu.icache.tags.occ_task_id_blocks::1024 1545 364system.cpu.icache.tags.age_task_id_blocks_1024::0 24 365system.cpu.icache.tags.age_task_id_blocks_1024::1 21 366system.cpu.icache.tags.age_task_id_blocks_1024::2 288 367system.cpu.icache.tags.age_task_id_blocks_1024::3 270 368system.cpu.icache.tags.age_task_id_blocks_1024::4 942 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600system.cpu.toL2Bus.snoop_filter.tot_snoops 0 601system.cpu.toL2Bus.snoop_filter.hit_single_snoops 0 602system.cpu.toL2Bus.snoop_filter.hit_multi_snoops 0 603system.cpu.toL2Bus.pwrStateResidencyTicks::UNDEFINED 230201146500 604system.cpu.toL2Bus.trans_dist::ReadResp 3740 605system.cpu.toL2Bus.trans_dist::WritebackDirty 16 606system.cpu.toL2Bus.trans_dist::WritebackClean 1506 607system.cpu.toL2Bus.trans_dist::CleanEvict 24 608system.cpu.toL2Bus.trans_dist::ReadExReq 1100 609system.cpu.toL2Bus.trans_dist::ReadExResp 1100 610system.cpu.toL2Bus.trans_dist::ReadCleanReq 3051 611system.cpu.toL2Bus.trans_dist::ReadSharedReq 689 612system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 7608 613system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 3618 614system.cpu.toL2Bus.pkt_count::total 11226 615system.cpu.toL2Bus.pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 291648 616system.cpu.toL2Bus.pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 115520 617system.cpu.toL2Bus.pkt_size::total 407168 618system.cpu.toL2Bus.snoops 0 619system.cpu.toL2Bus.snoopTraffic 0 620system.cpu.toL2Bus.snoop_fanout::samples 4840 621system.cpu.toL2Bus.snoop_fanout::mean 0.033471 622system.cpu.toL2Bus.snoop_fanout::stdev 0.179882 623system.cpu.toL2Bus.snoop_fanout::underflows 0 0.00% 0.00% 624system.cpu.toL2Bus.snoop_fanout::0 4678 96.65% 96.65% 625system.cpu.toL2Bus.snoop_fanout::1 162 3.35% 100.00% 626system.cpu.toL2Bus.snoop_fanout::2 0 0.00% 100.00% 627system.cpu.toL2Bus.snoop_fanout::overflows 0 0.00% 100.00% 628system.cpu.toL2Bus.snoop_fanout::min_value 0 629system.cpu.toL2Bus.snoop_fanout::max_value 1 630system.cpu.toL2Bus.snoop_fanout::total 4840 631system.cpu.toL2Bus.reqLayer0.occupancy 4715000 632system.cpu.toL2Bus.reqLayer0.utilization 0.0 633system.cpu.toL2Bus.respLayer0.occupancy 4576500 634system.cpu.toL2Bus.respLayer0.utilization 0.0 635system.cpu.toL2Bus.respLayer1.occupancy 2683500 636system.cpu.toL2Bus.respLayer1.utilization 0.0 637system.membus.snoop_filter.tot_requests 3453 638system.membus.snoop_filter.hit_single_requests 0 639system.membus.snoop_filter.hit_multi_requests 0 640system.membus.snoop_filter.tot_snoops 0 641system.membus.snoop_filter.hit_single_snoops 0 642system.membus.snoop_filter.hit_multi_snoops 0 643system.membus.pwrStateResidencyTicks::UNDEFINED 230201146500 644system.membus.trans_dist::ReadResp 2361 645system.membus.trans_dist::ReadExReq 1092 646system.membus.trans_dist::ReadExResp 1092 647system.membus.trans_dist::ReadSharedReq 2361 648system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port 6906 649system.membus.pkt_count::total 6906 650system.membus.pkt_size_system.cpu.l2cache.mem_side::system.physmem.port 220992 651system.membus.pkt_size::total 220992 652system.membus.snoops 0 653system.membus.snoopTraffic 0 654system.membus.snoop_fanout::samples 3453 655system.membus.snoop_fanout::mean 0 656system.membus.snoop_fanout::stdev 0 657system.membus.snoop_fanout::underflows 0 0.00% 0.00% 658system.membus.snoop_fanout::0 3453 100.00% 100.00% 659system.membus.snoop_fanout::1 0 0.00% 100.00% 660system.membus.snoop_fanout::overflows 0 0.00% 100.00% 661system.membus.snoop_fanout::min_value 0 662system.membus.snoop_fanout::max_value 0 663system.membus.snoop_fanout::total 3453 664system.membus.reqLayer0.occupancy 3601500 665system.membus.reqLayer0.utilization 0.0 666system.membus.respLayer1.occupancy 17265000 667system.membus.respLayer1.utilization 0.0 668 669---------- End Simulation Statistics ---------- 670