1Redirecting stdout to build/NULL/tests/opt/quick/se/70.tgen/null/none/tgen-dram-ctrl/simout 2Redirecting stderr to build/NULL/tests/opt/quick/se/70.tgen/null/none/tgen-dram-ctrl/simerr 3gem5 Simulator System. http://gem5.org 4gem5 is copyrighted software; use the --copyright option for details. 5 6gem5 compiled Nov 15 2017 18:28:23 7gem5 started Nov 15 2017 18:28:28 8gem5 executing on e108600-lin, pid 19888 9command line: /work/andsan01/outgoing/gem5/build/NULL/gem5.opt -d build/NULL/tests/opt/quick/se/70.tgen/null/none/tgen-dram-ctrl --stats-file 'text://stats.txt?desc=False' -re /work/andsan01/outgoing/gem5/tests/testing/../run.py quick/se/70.tgen/null/none/tgen-dram-ctrl 10 11Global frequency set at 1000000000000 ticks per second 12Exiting @ tick 100000000000 because simulate() limit reached 13