config.ini revision 11388
1[root] 2type=Root 3children=system 4eventq_index=0 5full_system=false 6sim_quantum=0 7time_sync_enable=false 8time_sync_period=100000000000 9time_sync_spin_threshold=100000000 10 11[system] 12type=System 13children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain 14boot_osflags=a 15cache_line_size=64 16clk_domain=system.clk_domain 17eventq_index=0 18exit_on_work_items=false 19init_param=0 20kernel= 21kernel_addr_check=true 22load_addr_mask=1099511627775 23load_offset=0 24mem_mode=timing 25mem_ranges= 26memories=system.physmem 27mmap_using_noreserve=false 28multi_thread=false 29num_work_ids=16 30readfile= 31symbolfile= 32work_begin_ckpt_count=0 33work_begin_cpu_id_exit=-1 34work_begin_exit_count=0 35work_cpus_ckpt_count=0 36work_end_ckpt_count=0 37work_end_exit_count=0 38work_item_id=-1 39system_port=system.membus.slave[0] 40 41[system.clk_domain] 42type=SrcClockDomain 43clock=1000 44domain_id=-1 45eventq_index=0 46init_perf_level=0 47voltage_domain=system.voltage_domain 48 49[system.cpu] 50type=TimingSimpleCPU 51children=dcache dtb icache interrupts isa itb l2cache toL2Bus tracer workload 52branchPred=Null 53checker=Null 54clk_domain=system.cpu_clk_domain 55cpu_id=0 56do_checkpoint_insts=true 57do_quiesce=true 58do_statistics_insts=true 59dtb=system.cpu.dtb 60eventq_index=0 61function_trace=false 62function_trace_start=0 63interrupts=system.cpu.interrupts 64isa=system.cpu.isa 65itb=system.cpu.itb 66max_insts_all_threads=0 67max_insts_any_thread=0 68max_loads_all_threads=0 69max_loads_any_thread=0 70numThreads=1 71profile=0 72progress_interval=0 73simpoint_start_insts= 74socket_id=0 75switched_out=false 76system=system 77tracer=system.cpu.tracer 78workload=system.cpu.workload 79dcache_port=system.cpu.dcache.cpu_side 80icache_port=system.cpu.icache.cpu_side 81 82[system.cpu.dcache] 83type=Cache 84children=tags 85addr_ranges=0:18446744073709551615 86assoc=2 87clk_domain=system.cpu_clk_domain 88clusivity=mostly_incl 89demand_mshr_reserve=1 90eventq_index=0 91hit_latency=2 92is_read_only=false 93max_miss_count=0 94mshrs=4 95prefetch_on_access=false 96prefetcher=Null 97response_latency=2 98sequential_access=false 99size=262144 100system=system 101tags=system.cpu.dcache.tags 102tgts_per_mshr=20 103write_buffers=8 104writeback_clean=false 105cpu_side=system.cpu.dcache_port 106mem_side=system.cpu.toL2Bus.slave[1] 107 108[system.cpu.dcache.tags] 109type=LRU 110assoc=2 111block_size=64 112clk_domain=system.cpu_clk_domain 113eventq_index=0 114hit_latency=2 115sequential_access=false 116size=262144 117 118[system.cpu.dtb] 119type=SparcTLB 120eventq_index=0 121size=64 122 123[system.cpu.icache] 124type=Cache 125children=tags 126addr_ranges=0:18446744073709551615 127assoc=2 128clk_domain=system.cpu_clk_domain 129clusivity=mostly_incl 130demand_mshr_reserve=1 131eventq_index=0 132hit_latency=2 133is_read_only=true 134max_miss_count=0 135mshrs=4 136prefetch_on_access=false 137prefetcher=Null 138response_latency=2 139sequential_access=false 140size=131072 141system=system 142tags=system.cpu.icache.tags 143tgts_per_mshr=20 144write_buffers=8 145writeback_clean=true 146cpu_side=system.cpu.icache_port 147mem_side=system.cpu.toL2Bus.slave[0] 148 149[system.cpu.icache.tags] 150type=LRU 151assoc=2 152block_size=64 153clk_domain=system.cpu_clk_domain 154eventq_index=0 155hit_latency=2 156sequential_access=false 157size=131072 158 159[system.cpu.interrupts] 160type=SparcInterrupts 161eventq_index=0 162 163[system.cpu.isa] 164type=SparcISA 165eventq_index=0 166 167[system.cpu.itb] 168type=SparcTLB 169eventq_index=0 170size=64 171 172[system.cpu.l2cache] 173type=Cache 174children=tags 175addr_ranges=0:18446744073709551615 176assoc=8 177clk_domain=system.cpu_clk_domain 178clusivity=mostly_incl 179demand_mshr_reserve=1 180eventq_index=0 181hit_latency=20 182is_read_only=false 183max_miss_count=0 184mshrs=20 185prefetch_on_access=false 186prefetcher=Null 187response_latency=20 188sequential_access=false 189size=2097152 190system=system 191tags=system.cpu.l2cache.tags 192tgts_per_mshr=12 193write_buffers=8 194writeback_clean=false 195cpu_side=system.cpu.toL2Bus.master[0] 196mem_side=system.membus.slave[1] 197 198[system.cpu.l2cache.tags] 199type=LRU 200assoc=8 201block_size=64 202clk_domain=system.cpu_clk_domain 203eventq_index=0 204hit_latency=20 205sequential_access=false 206size=2097152 207 208[system.cpu.toL2Bus] 209type=CoherentXBar 210children=snoop_filter 211clk_domain=system.cpu_clk_domain 212eventq_index=0 213forward_latency=0 214frontend_latency=1 215point_of_coherency=false 216response_latency=1 217snoop_filter=system.cpu.toL2Bus.snoop_filter 218snoop_response_latency=1 219system=system 220use_default_range=false 221width=32 222master=system.cpu.l2cache.cpu_side 223slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side 224 225[system.cpu.toL2Bus.snoop_filter] 226type=SnoopFilter 227eventq_index=0 228lookup_latency=0 229max_capacity=8388608 230system=system 231 232[system.cpu.tracer] 233type=ExeTracer 234eventq_index=0 235 236[system.cpu.workload] 237type=LiveProcess 238cmd=vortex bendian.raw 239cwd=build/SPARC/tests/opt/quick/se/50.vortex/sparc/linux/simple-timing 240drivers= 241egid=100 242env= 243errout=cerr 244euid=100 245eventq_index=0 246executable=/home/stever/m5/dist/cpu2000/binaries/sparc/linux/vortex 247gid=100 248input=cin 249kvmInSE=false 250max_stack_size=67108864 251output=cout 252pid=100 253ppid=99 254simpoint=0 255system=system 256uid=100 257useArchPT=false 258 259[system.cpu_clk_domain] 260type=SrcClockDomain 261clock=500 262domain_id=-1 263eventq_index=0 264init_perf_level=0 265voltage_domain=system.voltage_domain 266 267[system.dvfs_handler] 268type=DVFSHandler 269domains= 270enable=false 271eventq_index=0 272sys_clk_domain=system.clk_domain 273transition_latency=100000000 274 275[system.membus] 276type=CoherentXBar 277clk_domain=system.clk_domain 278eventq_index=0 279forward_latency=4 280frontend_latency=3 281point_of_coherency=true 282response_latency=2 283snoop_filter=Null 284snoop_response_latency=4 285system=system 286use_default_range=false 287width=16 288master=system.physmem.port 289slave=system.system_port system.cpu.l2cache.mem_side 290 291[system.physmem] 292type=SimpleMemory 293bandwidth=73.000000 294clk_domain=system.clk_domain 295conf_table_reported=true 296eventq_index=0 297in_addr_map=true 298latency=30000 299latency_var=0 300null=false 301range=0:134217727 302port=system.membus.master[0] 303 304[system.voltage_domain] 305type=VoltageDomain 306eventq_index=0 307voltage=1.000000 308 309