config.ini revision 11440
1[root] 2type=Root 3children=system 4eventq_index=0 5full_system=false 6sim_quantum=0 7time_sync_enable=false 8time_sync_period=100000000000 9time_sync_spin_threshold=100000000 10 11[system] 12type=System 13children=clk_domain cpu dvfs_handler l2bus l2cache mem_ctrl membus 14boot_osflags=a 15cache_line_size=64 16clk_domain=system.clk_domain 17eventq_index=0 18exit_on_work_items=false 19init_param=0 20kernel= 21kernel_addr_check=true 22load_addr_mask=1099511627775 23load_offset=0 24mem_mode=timing 25mem_ranges=0:536870911 26memories=system.mem_ctrl 27mmap_using_noreserve=false 28multi_thread=false 29num_work_ids=16 30readfile= 31symbolfile= 32thermal_components= 33thermal_model=Null 34work_begin_ckpt_count=0 35work_begin_cpu_id_exit=-1 36work_begin_exit_count=0 37work_cpus_ckpt_count=0 38work_end_ckpt_count=0 39work_end_exit_count=0 40work_item_id=-1 41system_port=system.membus.slave[1] 42 43[system.clk_domain] 44type=SrcClockDomain 45children=voltage_domain 46clock=1000 47domain_id=-1 48eventq_index=0 49init_perf_level=0 50voltage_domain=system.clk_domain.voltage_domain 51 52[system.clk_domain.voltage_domain] 53type=VoltageDomain 54eventq_index=0 55voltage=1.000000 56 57[system.cpu] 58type=TimingSimpleCPU 59children=dcache dstage2_mmu dtb icache interrupts isa istage2_mmu itb tracer workload 60branchPred=Null 61checker=Null 62clk_domain=system.clk_domain 63cpu_id=-1 64do_checkpoint_insts=true 65do_quiesce=true 66do_statistics_insts=true 67dstage2_mmu=system.cpu.dstage2_mmu 68dtb=system.cpu.dtb 69eventq_index=0 70function_trace=false 71function_trace_start=0 72interrupts=system.cpu.interrupts 73isa=system.cpu.isa 74istage2_mmu=system.cpu.istage2_mmu 75itb=system.cpu.itb 76max_insts_all_threads=0 77max_insts_any_thread=0 78max_loads_all_threads=0 79max_loads_any_thread=0 80numThreads=1 81profile=0 82progress_interval=0 83simpoint_start_insts= 84socket_id=0 85switched_out=false 86system=system 87tracer=system.cpu.tracer 88workload=system.cpu.workload 89dcache_port=system.cpu.dcache.cpu_side 90icache_port=system.cpu.icache.cpu_side 91 92[system.cpu.dcache] 93type=Cache 94children=tags 95addr_ranges=0:18446744073709551615 96assoc=2 97clk_domain=system.clk_domain 98clusivity=mostly_incl 99demand_mshr_reserve=1 100eventq_index=0 101hit_latency=2 102is_read_only=false 103max_miss_count=0 104mshrs=4 105prefetch_on_access=false 106prefetcher=Null 107response_latency=2 108sequential_access=false 109size=65536 110system=system 111tags=system.cpu.dcache.tags 112tgts_per_mshr=20 113write_buffers=8 114writeback_clean=false 115cpu_side=system.cpu.dcache_port 116mem_side=system.l2bus.slave[1] 117 118[system.cpu.dcache.tags] 119type=LRU 120assoc=2 121block_size=64 122clk_domain=system.clk_domain 123eventq_index=0 124hit_latency=2 125sequential_access=false 126size=65536 127 128[system.cpu.dstage2_mmu] 129type=ArmStage2MMU 130children=stage2_tlb 131eventq_index=0 132stage2_tlb=system.cpu.dstage2_mmu.stage2_tlb 133sys=system 134tlb=system.cpu.dtb 135 136[system.cpu.dstage2_mmu.stage2_tlb] 137type=ArmTLB 138children=walker 139eventq_index=0 140is_stage2=true 141size=32 142walker=system.cpu.dstage2_mmu.stage2_tlb.walker 143 144[system.cpu.dstage2_mmu.stage2_tlb.walker] 145type=ArmTableWalker 146clk_domain=system.clk_domain 147eventq_index=0 148is_stage2=true 149num_squash_per_cycle=2 150sys=system 151 152[system.cpu.dtb] 153type=ArmTLB 154children=walker 155eventq_index=0 156is_stage2=false 157size=64 158walker=system.cpu.dtb.walker 159 160[system.cpu.dtb.walker] 161type=ArmTableWalker 162clk_domain=system.clk_domain 163eventq_index=0 164is_stage2=false 165num_squash_per_cycle=2 166sys=system 167 168[system.cpu.icache] 169type=Cache 170children=tags 171addr_ranges=0:18446744073709551615 172assoc=2 173clk_domain=system.clk_domain 174clusivity=mostly_incl 175demand_mshr_reserve=1 176eventq_index=0 177hit_latency=2 178is_read_only=false 179max_miss_count=0 180mshrs=4 181prefetch_on_access=false 182prefetcher=Null 183response_latency=2 184sequential_access=false 185size=16384 186system=system 187tags=system.cpu.icache.tags 188tgts_per_mshr=20 189write_buffers=8 190writeback_clean=false 191cpu_side=system.cpu.icache_port 192mem_side=system.l2bus.slave[0] 193 194[system.cpu.icache.tags] 195type=LRU 196assoc=2 197block_size=64 198clk_domain=system.clk_domain 199eventq_index=0 200hit_latency=2 201sequential_access=false 202size=16384 203 204[system.cpu.interrupts] 205type=ArmInterrupts 206eventq_index=0 207 208[system.cpu.isa] 209type=ArmISA 210decoderFlavour=Generic 211eventq_index=0 212fpsid=1090793632 213id_aa64afr0_el1=0 214id_aa64afr1_el1=0 215id_aa64dfr0_el1=1052678 216id_aa64dfr1_el1=0 217id_aa64isar0_el1=0 218id_aa64isar1_el1=0 219id_aa64mmfr0_el1=15728642 220id_aa64mmfr1_el1=0 221id_aa64pfr0_el1=17 222id_aa64pfr1_el1=0 223id_isar0=34607377 224id_isar1=34677009 225id_isar2=555950401 226id_isar3=17899825 227id_isar4=268501314 228id_isar5=0 229id_mmfr0=270536963 230id_mmfr1=0 231id_mmfr2=19070976 232id_mmfr3=34611729 233id_pfr0=49 234id_pfr1=4113 235midr=1091551472 236pmu=Null 237system=system 238 239[system.cpu.istage2_mmu] 240type=ArmStage2MMU 241children=stage2_tlb 242eventq_index=0 243stage2_tlb=system.cpu.istage2_mmu.stage2_tlb 244sys=system 245tlb=system.cpu.itb 246 247[system.cpu.istage2_mmu.stage2_tlb] 248type=ArmTLB 249children=walker 250eventq_index=0 251is_stage2=true 252size=32 253walker=system.cpu.istage2_mmu.stage2_tlb.walker 254 255[system.cpu.istage2_mmu.stage2_tlb.walker] 256type=ArmTableWalker 257clk_domain=system.clk_domain 258eventq_index=0 259is_stage2=true 260num_squash_per_cycle=2 261sys=system 262 263[system.cpu.itb] 264type=ArmTLB 265children=walker 266eventq_index=0 267is_stage2=false 268size=64 269walker=system.cpu.itb.walker 270 271[system.cpu.itb.walker] 272type=ArmTableWalker 273clk_domain=system.clk_domain 274eventq_index=0 275is_stage2=false 276num_squash_per_cycle=2 277sys=system 278 279[system.cpu.tracer] 280type=ExeTracer 281eventq_index=0 282 283[system.cpu.workload] 284type=LiveProcess 285cmd=tests/test-progs/hello/bin/arm/linux/hello 286cwd= 287drivers= 288egid=100 289env= 290errout=cerr 291euid=100 292eventq_index=0 293executable= 294gid=100 295input=cin 296kvmInSE=false 297max_stack_size=67108864 298output=cout 299pid=100 300ppid=99 301simpoint=0 302system=system 303uid=100 304useArchPT=false 305 306[system.dvfs_handler] 307type=DVFSHandler 308domains= 309enable=false 310eventq_index=0 311sys_clk_domain=system.clk_domain 312transition_latency=100000000 313 314[system.l2bus] 315type=CoherentXBar 316children=snoop_filter 317clk_domain=system.clk_domain 318eventq_index=0 319forward_latency=0 320frontend_latency=1 321point_of_coherency=false 322response_latency=1 323snoop_filter=system.l2bus.snoop_filter 324snoop_response_latency=1 325system=system 326use_default_range=false 327width=32 328master=system.l2cache.cpu_side 329slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side 330 331[system.l2bus.snoop_filter] 332type=SnoopFilter 333eventq_index=0 334lookup_latency=0 335max_capacity=8388608 336system=system 337 338[system.l2cache] 339type=Cache 340children=tags 341addr_ranges=0:18446744073709551615 342assoc=8 343clk_domain=system.clk_domain 344clusivity=mostly_incl 345demand_mshr_reserve=1 346eventq_index=0 347hit_latency=20 348is_read_only=false 349max_miss_count=0 350mshrs=20 351prefetch_on_access=false 352prefetcher=Null 353response_latency=20 354sequential_access=false 355size=262144 356system=system 357tags=system.l2cache.tags 358tgts_per_mshr=12 359write_buffers=8 360writeback_clean=false 361cpu_side=system.l2bus.master[0] 362mem_side=system.membus.slave[0] 363 364[system.l2cache.tags] 365type=LRU 366assoc=8 367block_size=64 368clk_domain=system.clk_domain 369eventq_index=0 370hit_latency=20 371sequential_access=false 372size=262144 373 374[system.mem_ctrl] 375type=DRAMCtrl 376IDD0=0.075000 377IDD02=0.000000 378IDD2N=0.050000 379IDD2N2=0.000000 380IDD2P0=0.000000 381IDD2P02=0.000000 382IDD2P1=0.000000 383IDD2P12=0.000000 384IDD3N=0.057000 385IDD3N2=0.000000 386IDD3P0=0.000000 387IDD3P02=0.000000 388IDD3P1=0.000000 389IDD3P12=0.000000 390IDD4R=0.187000 391IDD4R2=0.000000 392IDD4W=0.165000 393IDD4W2=0.000000 394IDD5=0.220000 395IDD52=0.000000 396IDD6=0.000000 397IDD62=0.000000 398VDD=1.500000 399VDD2=0.000000 400activation_limit=4 401addr_mapping=RoRaBaCoCh 402bank_groups_per_rank=0 403banks_per_rank=8 404burst_length=8 405channels=1 406clk_domain=system.clk_domain 407conf_table_reported=true 408device_bus_width=8 409device_rowbuffer_size=1024 410device_size=536870912 411devices_per_rank=8 412dll=true 413eventq_index=0 414in_addr_map=true 415max_accesses_per_row=16 416mem_sched_policy=frfcfs 417min_writes_per_switch=16 418null=false 419page_policy=open_adaptive 420range=0:536870911 421ranks_per_channel=2 422read_buffer_size=32 423static_backend_latency=10000 424static_frontend_latency=10000 425tBURST=5000 426tCCD_L=0 427tCK=1250 428tCL=13750 429tCS=2500 430tRAS=35000 431tRCD=13750 432tREFI=7800000 433tRFC=260000 434tRP=13750 435tRRD=6000 436tRRD_L=0 437tRTP=7500 438tRTW=2500 439tWR=15000 440tWTR=7500 441tXAW=30000 442tXP=0 443tXPDLL=0 444tXS=0 445tXSDLL=0 446write_buffer_size=64 447write_high_thresh_perc=85 448write_low_thresh_perc=50 449port=system.membus.master[0] 450 451[system.membus] 452type=CoherentXBar 453clk_domain=system.clk_domain 454eventq_index=0 455forward_latency=4 456frontend_latency=3 457point_of_coherency=true 458response_latency=2 459snoop_filter=Null 460snoop_response_latency=4 461system=system 462use_default_range=false 463width=16 464master=system.mem_ctrl.port 465slave=system.l2cache.mem_side system.system_port 466 467