1[root] 2type=Root 3children=system 4eventq_index=0 5full_system=false 6sim_quantum=0 7time_sync_enable=false 8time_sync_period=100000000000 9time_sync_spin_threshold=100000000 10 11[system] 12type=System 13children=clk_domain cpu dvfs_handler l2bus l2cache mem_ctrl membus 14boot_osflags=a 15cache_line_size=64 16clk_domain=system.clk_domain 17default_p_state=UNDEFINED 18eventq_index=0 19exit_on_work_items=false 20init_param=0 21kernel= 22kernel_addr_check=true 23load_addr_mask=1099511627775 24load_offset=0 25mem_mode=timing 26mem_ranges=0:536870911:0:0:0:0 27memories=system.mem_ctrl 28mmap_using_noreserve=false 29multi_thread=false 30num_work_ids=16 31p_state_clk_gate_bins=20 32p_state_clk_gate_max=1000000000000 33p_state_clk_gate_min=1000 34power_model=Null 35readfile= 36symbolfile= 37thermal_components= 38thermal_model=Null 39work_begin_ckpt_count=0 40work_begin_cpu_id_exit=-1 41work_begin_exit_count=0 42work_cpus_ckpt_count=0 43work_end_ckpt_count=0 44work_end_exit_count=0 45work_item_id=-1 46system_port=system.membus.slave[1] 47 48[system.clk_domain] 49type=SrcClockDomain 50children=voltage_domain 51clock=1000 52domain_id=-1 53eventq_index=0 54init_perf_level=0 55voltage_domain=system.clk_domain.voltage_domain 56 57[system.clk_domain.voltage_domain] 58type=VoltageDomain 59eventq_index=0 60voltage=1.000000 61 62[system.cpu] 63type=TimingSimpleCPU 64children=dcache dstage2_mmu dtb icache interrupts isa istage2_mmu itb tracer workload 65branchPred=Null 66checker=Null 67clk_domain=system.clk_domain 68cpu_id=-1 69default_p_state=UNDEFINED 70do_checkpoint_insts=true 71do_quiesce=true 72do_statistics_insts=true 73dstage2_mmu=system.cpu.dstage2_mmu 74dtb=system.cpu.dtb 75eventq_index=0 76function_trace=false 77function_trace_start=0 78interrupts=system.cpu.interrupts 79isa=system.cpu.isa 80istage2_mmu=system.cpu.istage2_mmu 81itb=system.cpu.itb 82max_insts_all_threads=0 83max_insts_any_thread=0 84max_loads_all_threads=0 85max_loads_any_thread=0 86numThreads=1 87p_state_clk_gate_bins=20 88p_state_clk_gate_max=1000000000000 89p_state_clk_gate_min=1000 90power_model=Null 91profile=0 92progress_interval=0 93simpoint_start_insts= 94socket_id=0 95switched_out=false 96syscallRetryLatency=10000 97system=system 98tracer=system.cpu.tracer 99workload=system.cpu.workload 100dcache_port=system.cpu.dcache.cpu_side 101icache_port=system.cpu.icache.cpu_side 102 103[system.cpu.dcache] 104type=Cache 105children=tags 106addr_ranges=0:18446744073709551615:0:0:0:0 107assoc=2 108clk_domain=system.clk_domain 109clusivity=mostly_incl 110data_latency=2 111default_p_state=UNDEFINED 112demand_mshr_reserve=1 113eventq_index=0 114is_read_only=false 115max_miss_count=0 116mshrs=4 117p_state_clk_gate_bins=20 118p_state_clk_gate_max=1000000000000 119p_state_clk_gate_min=1000 120power_model=Null 121prefetch_on_access=false 122prefetcher=Null 123response_latency=2 124sequential_access=false 125size=65536 126system=system 127tag_latency=2 128tags=system.cpu.dcache.tags 129tgts_per_mshr=20 130write_buffers=8 131writeback_clean=false 132cpu_side=system.cpu.dcache_port 133mem_side=system.l2bus.slave[1] 134 135[system.cpu.dcache.tags] 136type=LRU 137assoc=2 138block_size=64 139clk_domain=system.clk_domain 140data_latency=2 141default_p_state=UNDEFINED 142eventq_index=0 143p_state_clk_gate_bins=20 144p_state_clk_gate_max=1000000000000 145p_state_clk_gate_min=1000 146power_model=Null 147sequential_access=false 148size=65536 149tag_latency=2 150 151[system.cpu.dstage2_mmu] 152type=ArmStage2MMU 153children=stage2_tlb 154eventq_index=0 155stage2_tlb=system.cpu.dstage2_mmu.stage2_tlb 156sys=system 157tlb=system.cpu.dtb 158 159[system.cpu.dstage2_mmu.stage2_tlb] 160type=ArmTLB 161children=walker 162eventq_index=0 163is_stage2=true 164size=32 165walker=system.cpu.dstage2_mmu.stage2_tlb.walker 166 167[system.cpu.dstage2_mmu.stage2_tlb.walker] 168type=ArmTableWalker 169clk_domain=system.clk_domain 170default_p_state=UNDEFINED 171eventq_index=0 172is_stage2=true 173num_squash_per_cycle=2 174p_state_clk_gate_bins=20 175p_state_clk_gate_max=1000000000000 176p_state_clk_gate_min=1000 177power_model=Null 178sys=system 179 180[system.cpu.dtb] 181type=ArmTLB 182children=walker 183eventq_index=0 184is_stage2=false 185size=64 186walker=system.cpu.dtb.walker 187 188[system.cpu.dtb.walker] 189type=ArmTableWalker 190clk_domain=system.clk_domain 191default_p_state=UNDEFINED 192eventq_index=0 193is_stage2=false 194num_squash_per_cycle=2 195p_state_clk_gate_bins=20 196p_state_clk_gate_max=1000000000000 197p_state_clk_gate_min=1000 198power_model=Null 199sys=system 200 201[system.cpu.icache] 202type=Cache 203children=tags 204addr_ranges=0:18446744073709551615:0:0:0:0 205assoc=2 206clk_domain=system.clk_domain 207clusivity=mostly_incl 208data_latency=2 209default_p_state=UNDEFINED 210demand_mshr_reserve=1 211eventq_index=0 212is_read_only=false 213max_miss_count=0 214mshrs=4 215p_state_clk_gate_bins=20 216p_state_clk_gate_max=1000000000000 217p_state_clk_gate_min=1000 218power_model=Null 219prefetch_on_access=false 220prefetcher=Null 221response_latency=2 222sequential_access=false 223size=16384 224system=system 225tag_latency=2 226tags=system.cpu.icache.tags 227tgts_per_mshr=20 228write_buffers=8 229writeback_clean=false 230cpu_side=system.cpu.icache_port 231mem_side=system.l2bus.slave[0] 232 233[system.cpu.icache.tags] 234type=LRU 235assoc=2 236block_size=64 237clk_domain=system.clk_domain 238data_latency=2 239default_p_state=UNDEFINED 240eventq_index=0 241p_state_clk_gate_bins=20 242p_state_clk_gate_max=1000000000000 243p_state_clk_gate_min=1000 244power_model=Null 245sequential_access=false 246size=16384 247tag_latency=2 248 249[system.cpu.interrupts] 250type=ArmInterrupts 251eventq_index=0 252 253[system.cpu.isa] 254type=ArmISA 255decoderFlavour=Generic 256eventq_index=0 257fpsid=1090793632 258id_aa64afr0_el1=0 259id_aa64afr1_el1=0 260id_aa64dfr0_el1=1052678 261id_aa64dfr1_el1=0 262id_aa64isar0_el1=0 263id_aa64isar1_el1=0 264id_aa64mmfr0_el1=15728642 265id_aa64mmfr1_el1=0 266id_isar0=34607377 267id_isar1=34677009 268id_isar2=555950401 269id_isar3=17899825 270id_isar4=268501314 271id_isar5=0 272id_mmfr0=270536963 273id_mmfr1=0 274id_mmfr2=19070976 275id_mmfr3=34611729 276midr=1091551472 277pmu=Null 278system=system 279 280[system.cpu.istage2_mmu] 281type=ArmStage2MMU 282children=stage2_tlb 283eventq_index=0 284stage2_tlb=system.cpu.istage2_mmu.stage2_tlb 285sys=system 286tlb=system.cpu.itb 287 288[system.cpu.istage2_mmu.stage2_tlb] 289type=ArmTLB 290children=walker 291eventq_index=0 292is_stage2=true 293size=32 294walker=system.cpu.istage2_mmu.stage2_tlb.walker 295 296[system.cpu.istage2_mmu.stage2_tlb.walker] 297type=ArmTableWalker 298clk_domain=system.clk_domain 299default_p_state=UNDEFINED 300eventq_index=0 301is_stage2=true 302num_squash_per_cycle=2 303p_state_clk_gate_bins=20 304p_state_clk_gate_max=1000000000000 305p_state_clk_gate_min=1000 306power_model=Null 307sys=system 308 309[system.cpu.itb] 310type=ArmTLB 311children=walker 312eventq_index=0 313is_stage2=false 314size=64 315walker=system.cpu.itb.walker 316 317[system.cpu.itb.walker] 318type=ArmTableWalker 319clk_domain=system.clk_domain 320default_p_state=UNDEFINED 321eventq_index=0 322is_stage2=false 323num_squash_per_cycle=2 324p_state_clk_gate_bins=20 325p_state_clk_gate_max=1000000000000 326p_state_clk_gate_min=1000 327power_model=Null 328sys=system 329 330[system.cpu.tracer] 331type=ExeTracer 332eventq_index=0 333 334[system.cpu.workload] 335type=Process 336cmd=tests/test-progs/hello/bin/arm/linux/hello 337cwd= 338drivers= 339egid=100 340env= 341errout=cerr 342euid=100 343eventq_index=0 344executable= 345gid=100 346input=cin 347kvmInSE=false 348maxStackSize=67108864 349output=cout 350pgid=100 351pid=100 352ppid=0 353simpoint=0 354system=system 355uid=100 356useArchPT=false 357 358[system.dvfs_handler] 359type=DVFSHandler 360domains= 361enable=false 362eventq_index=0 363sys_clk_domain=system.clk_domain 364transition_latency=100000000 365 366[system.l2bus] 367type=CoherentXBar 368children=snoop_filter 369clk_domain=system.clk_domain 370default_p_state=UNDEFINED 371eventq_index=0 372forward_latency=0 373frontend_latency=1 374p_state_clk_gate_bins=20 375p_state_clk_gate_max=1000000000000 376p_state_clk_gate_min=1000 377point_of_coherency=false 378power_model=Null 379response_latency=1 380snoop_filter=system.l2bus.snoop_filter 381snoop_response_latency=1 382system=system 383use_default_range=false 384width=32 385master=system.l2cache.cpu_side 386slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side 387 388[system.l2bus.snoop_filter] 389type=SnoopFilter 390eventq_index=0 391lookup_latency=0 392max_capacity=8388608 393system=system 394 395[system.l2cache] 396type=Cache 397children=tags 398addr_ranges=0:18446744073709551615:0:0:0:0 399assoc=8 400clk_domain=system.clk_domain 401clusivity=mostly_incl 402data_latency=20 403default_p_state=UNDEFINED 404demand_mshr_reserve=1 405eventq_index=0 406is_read_only=false 407max_miss_count=0 408mshrs=20 409p_state_clk_gate_bins=20 410p_state_clk_gate_max=1000000000000 411p_state_clk_gate_min=1000 412power_model=Null 413prefetch_on_access=false 414prefetcher=Null 415response_latency=20 416sequential_access=false 417size=262144 418system=system 419tag_latency=20 420tags=system.l2cache.tags 421tgts_per_mshr=12 422write_buffers=8 423writeback_clean=false 424cpu_side=system.l2bus.master[0] 425mem_side=system.membus.slave[0] 426 427[system.l2cache.tags] 428type=LRU 429assoc=8 430block_size=64 431clk_domain=system.clk_domain 432data_latency=20 433default_p_state=UNDEFINED 434eventq_index=0 435p_state_clk_gate_bins=20 436p_state_clk_gate_max=1000000000000 437p_state_clk_gate_min=1000 438power_model=Null 439sequential_access=false 440size=262144 441tag_latency=20 442 443[system.mem_ctrl] 444type=DRAMCtrl 445IDD0=0.055000 446IDD02=0.000000 447IDD2N=0.032000 448IDD2N2=0.000000 449IDD2P0=0.000000 450IDD2P02=0.000000 451IDD2P1=0.032000 452IDD2P12=0.000000 453IDD3N=0.038000 454IDD3N2=0.000000 455IDD3P0=0.000000 456IDD3P02=0.000000 457IDD3P1=0.038000 458IDD3P12=0.000000 459IDD4R=0.157000 460IDD4R2=0.000000 461IDD4W=0.125000 462IDD4W2=0.000000 463IDD5=0.235000 464IDD52=0.000000 465IDD6=0.020000 466IDD62=0.000000 467VDD=1.500000 468VDD2=0.000000 469activation_limit=4 470addr_mapping=RoRaBaCoCh 471bank_groups_per_rank=0 472banks_per_rank=8 473burst_length=8 474channels=1 475clk_domain=system.clk_domain 476conf_table_reported=true 477default_p_state=UNDEFINED 478device_bus_width=8 479device_rowbuffer_size=1024 480device_size=536870912 481devices_per_rank=8 482dll=true 483eventq_index=0 484in_addr_map=true 485kvm_map=true 486max_accesses_per_row=16 487mem_sched_policy=frfcfs 488min_writes_per_switch=16 489null=false 490p_state_clk_gate_bins=20 491p_state_clk_gate_max=1000000000000 492p_state_clk_gate_min=1000 493page_policy=open_adaptive 494power_model=Null 495range=0:536870911:0:0:0:0 496ranks_per_channel=2 497read_buffer_size=32 498static_backend_latency=10000 499static_frontend_latency=10000 500tBURST=5000 501tCCD_L=0 502tCK=1250 503tCL=13750 504tCS=2500 505tRAS=35000 506tRCD=13750 507tREFI=7800000 508tRFC=260000 509tRP=13750 510tRRD=6000 511tRRD_L=0 512tRTP=7500 513tRTW=2500 514tWR=15000 515tWTR=7500 516tXAW=30000 517tXP=6000 518tXPDLL=0 519tXS=270000 520tXSDLL=0 521write_buffer_size=64 522write_high_thresh_perc=85 523write_low_thresh_perc=50 524port=system.membus.master[0] 525 526[system.membus] 527type=CoherentXBar 528children=snoop_filter 529clk_domain=system.clk_domain 530default_p_state=UNDEFINED 531eventq_index=0 532forward_latency=4 533frontend_latency=3 534p_state_clk_gate_bins=20 535p_state_clk_gate_max=1000000000000 536p_state_clk_gate_min=1000 537point_of_coherency=true 538power_model=Null 539response_latency=2 540snoop_filter=system.membus.snoop_filter 541snoop_response_latency=4 542system=system 543use_default_range=false 544width=16 545master=system.mem_ctrl.port 546slave=system.l2cache.mem_side system.system_port 547 548[system.membus.snoop_filter] 549type=SnoopFilter 550eventq_index=0 551lookup_latency=1 552max_capacity=8388608 553system=system 554 555