config.ini revision 5723
1[root] 2type=Root 3children=system 4dummy=0 5 6[system] 7type=System 8children=cpu membus physmem 9mem_mode=atomic 10physmem=system.physmem 11 12[system.cpu] 13type=DerivO3CPU 14children=dcache dtb fuPool icache itb l2cache toL2Bus tracer workload0 workload1 15BTBEntries=4096 16BTBTagSize=16 17LFSTSize=1024 18LQEntries=32 19RASSize=16 20SQEntries=32 21SSITSize=1024 22activity=0 23backComSize=5 24cachePorts=200 25choiceCtrBits=2 26choicePredictorSize=8192 27clock=500 28commitToDecodeDelay=1 29commitToFetchDelay=1 30commitToIEWDelay=1 31commitToRenameDelay=1 32commitWidth=8 33cpu_id=0 34decodeToFetchDelay=1 35decodeToRenameDelay=1 36decodeWidth=8 37defer_registration=false 38dispatchWidth=8 39dtb=system.cpu.dtb 40fetchToDecodeDelay=1 41fetchTrapLatency=1 42fetchWidth=8 43forwardComSize=5 44fuPool=system.cpu.fuPool 45function_trace=false 46function_trace_start=0 47globalCtrBits=2 48globalHistoryBits=13 49globalPredictorSize=8192 50iewToCommitDelay=1 51iewToDecodeDelay=1 52iewToFetchDelay=1 53iewToRenameDelay=1 54instShiftAmt=2 55issueToExecuteDelay=1 56issueWidth=8 57itb=system.cpu.itb 58localCtrBits=2 59localHistoryBits=11 60localHistoryTableSize=2048 61localPredictorSize=2048 62max_insts_all_threads=0 63max_insts_any_thread=0 64max_loads_all_threads=0 65max_loads_any_thread=0 66numIQEntries=64 67numPhysFloatRegs=256 68numPhysIntRegs=256 69numROBEntries=192 70numRobs=1 71numThreads=1 72phase=0 73predType=tournament 74progress_interval=0 75renameToDecodeDelay=1 76renameToFetchDelay=1 77renameToIEWDelay=2 78renameToROBDelay=1 79renameWidth=8 80smtCommitPolicy=RoundRobin 81smtFetchPolicy=SingleThread 82smtIQPolicy=Partitioned 83smtIQThreshold=100 84smtLSQPolicy=Partitioned 85smtLSQThreshold=100 86smtNumFetchingThreads=1 87smtROBPolicy=Partitioned 88smtROBThreshold=100 89squashWidth=8 90system=system 91tracer=system.cpu.tracer 92trapLatency=13 93wbDepth=1 94wbWidth=8 95workload=system.cpu.workload0 system.cpu.workload1 96dcache_port=system.cpu.dcache.cpu_side 97icache_port=system.cpu.icache.cpu_side 98 99[system.cpu.dcache] 100type=BaseCache 101addr_range=0:18446744073709551615 102assoc=2 103block_size=64 104cpu_side_filter_ranges= 105hash_delay=1 106latency=1000 107max_miss_count=0 108mem_side_filter_ranges= 109mshrs=10 110prefetch_access=false 111prefetch_cache_check_push=true 112prefetch_data_accesses_only=false 113prefetch_degree=1 114prefetch_latency=10000 115prefetch_miss=false 116prefetch_past_page=false 117prefetch_policy=none 118prefetch_serial_squash=false 119prefetch_use_cpu_id=true 120prefetcher_size=100 121prioritizeRequests=false 122repl=Null 123size=262144 124subblock_size=0 125tgts_per_mshr=20 126trace_addr=0 127two_queue=false 128write_buffers=8 129cpu_side=system.cpu.dcache_port 130mem_side=system.cpu.toL2Bus.port[1] 131 132[system.cpu.dtb] 133type=AlphaDTB 134size=64 135 136[system.cpu.fuPool] 137type=FUPool 138children=FUList0 FUList1 FUList2 FUList3 FUList4 FUList5 FUList6 FUList7 139FUList=system.cpu.fuPool.FUList0 system.cpu.fuPool.FUList1 system.cpu.fuPool.FUList2 system.cpu.fuPool.FUList3 system.cpu.fuPool.FUList4 system.cpu.fuPool.FUList5 system.cpu.fuPool.FUList6 system.cpu.fuPool.FUList7 140 141[system.cpu.fuPool.FUList0] 142type=FUDesc 143children=opList 144count=6 145opList=system.cpu.fuPool.FUList0.opList 146 147[system.cpu.fuPool.FUList0.opList] 148type=OpDesc 149issueLat=1 150opClass=IntAlu 151opLat=1 152 153[system.cpu.fuPool.FUList1] 154type=FUDesc 155children=opList0 opList1 156count=2 157opList=system.cpu.fuPool.FUList1.opList0 system.cpu.fuPool.FUList1.opList1 158 159[system.cpu.fuPool.FUList1.opList0] 160type=OpDesc 161issueLat=1 162opClass=IntMult 163opLat=3 164 165[system.cpu.fuPool.FUList1.opList1] 166type=OpDesc 167issueLat=19 168opClass=IntDiv 169opLat=20 170 171[system.cpu.fuPool.FUList2] 172type=FUDesc 173children=opList0 opList1 opList2 174count=4 175opList=system.cpu.fuPool.FUList2.opList0 system.cpu.fuPool.FUList2.opList1 system.cpu.fuPool.FUList2.opList2 176 177[system.cpu.fuPool.FUList2.opList0] 178type=OpDesc 179issueLat=1 180opClass=FloatAdd 181opLat=2 182 183[system.cpu.fuPool.FUList2.opList1] 184type=OpDesc 185issueLat=1 186opClass=FloatCmp 187opLat=2 188 189[system.cpu.fuPool.FUList2.opList2] 190type=OpDesc 191issueLat=1 192opClass=FloatCvt 193opLat=2 194 195[system.cpu.fuPool.FUList3] 196type=FUDesc 197children=opList0 opList1 opList2 198count=2 199opList=system.cpu.fuPool.FUList3.opList0 system.cpu.fuPool.FUList3.opList1 system.cpu.fuPool.FUList3.opList2 200 201[system.cpu.fuPool.FUList3.opList0] 202type=OpDesc 203issueLat=1 204opClass=FloatMult 205opLat=4 206 207[system.cpu.fuPool.FUList3.opList1] 208type=OpDesc 209issueLat=12 210opClass=FloatDiv 211opLat=12 212 213[system.cpu.fuPool.FUList3.opList2] 214type=OpDesc 215issueLat=24 216opClass=FloatSqrt 217opLat=24 218 219[system.cpu.fuPool.FUList4] 220type=FUDesc 221children=opList 222count=0 223opList=system.cpu.fuPool.FUList4.opList 224 225[system.cpu.fuPool.FUList4.opList] 226type=OpDesc 227issueLat=1 228opClass=MemRead 229opLat=1 230 231[system.cpu.fuPool.FUList5] 232type=FUDesc 233children=opList 234count=0 235opList=system.cpu.fuPool.FUList5.opList 236 237[system.cpu.fuPool.FUList5.opList] 238type=OpDesc 239issueLat=1 240opClass=MemWrite 241opLat=1 242 243[system.cpu.fuPool.FUList6] 244type=FUDesc 245children=opList0 opList1 246count=4 247opList=system.cpu.fuPool.FUList6.opList0 system.cpu.fuPool.FUList6.opList1 248 249[system.cpu.fuPool.FUList6.opList0] 250type=OpDesc 251issueLat=1 252opClass=MemRead 253opLat=1 254 255[system.cpu.fuPool.FUList6.opList1] 256type=OpDesc 257issueLat=1 258opClass=MemWrite 259opLat=1 260 261[system.cpu.fuPool.FUList7] 262type=FUDesc 263children=opList 264count=1 265opList=system.cpu.fuPool.FUList7.opList 266 267[system.cpu.fuPool.FUList7.opList] 268type=OpDesc 269issueLat=3 270opClass=IprAccess 271opLat=3 272 273[system.cpu.icache] 274type=BaseCache 275addr_range=0:18446744073709551615 276assoc=2 277block_size=64 278cpu_side_filter_ranges= 279hash_delay=1 280latency=1000 281max_miss_count=0 282mem_side_filter_ranges= 283mshrs=10 284prefetch_access=false 285prefetch_cache_check_push=true 286prefetch_data_accesses_only=false 287prefetch_degree=1 288prefetch_latency=10000 289prefetch_miss=false 290prefetch_past_page=false 291prefetch_policy=none 292prefetch_serial_squash=false 293prefetch_use_cpu_id=true 294prefetcher_size=100 295prioritizeRequests=false 296repl=Null 297size=131072 298subblock_size=0 299tgts_per_mshr=20 300trace_addr=0 301two_queue=false 302write_buffers=8 303cpu_side=system.cpu.icache_port 304mem_side=system.cpu.toL2Bus.port[0] 305 306[system.cpu.itb] 307type=AlphaITB 308size=48 309 310[system.cpu.l2cache] 311type=BaseCache 312addr_range=0:18446744073709551615 313assoc=2 314block_size=64 315cpu_side_filter_ranges= 316hash_delay=1 317latency=1000 318max_miss_count=0 319mem_side_filter_ranges= 320mshrs=10 321prefetch_access=false 322prefetch_cache_check_push=true 323prefetch_data_accesses_only=false 324prefetch_degree=1 325prefetch_latency=10000 326prefetch_miss=false 327prefetch_past_page=false 328prefetch_policy=none 329prefetch_serial_squash=false 330prefetch_use_cpu_id=true 331prefetcher_size=100 332prioritizeRequests=false 333repl=Null 334size=2097152 335subblock_size=0 336tgts_per_mshr=5 337trace_addr=0 338two_queue=false 339write_buffers=8 340cpu_side=system.cpu.toL2Bus.port[2] 341mem_side=system.membus.port[1] 342 343[system.cpu.toL2Bus] 344type=Bus 345block_size=64 346bus_id=0 347clock=1000 348header_cycles=1 349responder_set=false 350width=64 351port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side 352 353[system.cpu.tracer] 354type=ExeTracer 355 356[system.cpu.workload0] 357type=LiveProcess 358cmd=hello 359cwd= 360egid=100 361env= 362errout=cerr 363euid=100 364executable=/dist/m5/regression/test-progs/hello/bin/alpha/linux/hello 365gid=100 366input=cin 367max_stack_size=67108864 368output=cout 369pid=100 370ppid=99 371simpoint=0 372system=system 373uid=100 374 375[system.cpu.workload1] 376type=LiveProcess 377cmd=hello 378cwd= 379egid=100 380env= 381errout=cerr 382euid=100 383executable=/dist/m5/regression/test-progs/hello/bin/alpha/linux/hello 384gid=100 385input=cin 386max_stack_size=67108864 387output=cout 388pid=100 389ppid=99 390simpoint=0 391system=system 392uid=100 393 394[system.membus] 395type=Bus 396block_size=64 397bus_id=0 398clock=1000 399header_cycles=1 400responder_set=false 401width=64 402port=system.physmem.port[0] system.cpu.l2cache.mem_side 403 404[system.physmem] 405type=PhysicalMemory 406file= 407latency=30000 408latency_var=0 409null=false 410range=0:134217727 411zero=false 412port=system.membus.port[0] 413 414