config.ini revision 5516
110515SAli.Saidi@ARM.com[root] 210515SAli.Saidi@ARM.comtype=Root 311680SCurtis.Dunham@arm.comchildren=system 411680SCurtis.Dunham@arm.comdummy=0 511680SCurtis.Dunham@arm.com 610515SAli.Saidi@ARM.com[system] 711680SCurtis.Dunham@arm.comtype=System 811680SCurtis.Dunham@arm.comchildren=cpu membus physmem 911680SCurtis.Dunham@arm.commem_mode=atomic 1011680SCurtis.Dunham@arm.comphysmem=system.physmem 1111680SCurtis.Dunham@arm.com 1211680SCurtis.Dunham@arm.com[system.cpu] 1311680SCurtis.Dunham@arm.comtype=DerivO3CPU 1410515SAli.Saidi@ARM.comchildren=dcache dtb fuPool icache itb l2cache toL2Bus tracer workload0 workload1 1510515SAli.Saidi@ARM.comBTBEntries=4096 1611680SCurtis.Dunham@arm.comBTBTagSize=16 1711680SCurtis.Dunham@arm.comLFSTSize=1024 1811680SCurtis.Dunham@arm.comLQEntries=32 1911680SCurtis.Dunham@arm.comRASSize=16 2011680SCurtis.Dunham@arm.comSQEntries=32 2111680SCurtis.Dunham@arm.comSSITSize=1024 2211680SCurtis.Dunham@arm.comactivity=0 2311680SCurtis.Dunham@arm.combackComSize=5 2411680SCurtis.Dunham@arm.comcachePorts=200 2511680SCurtis.Dunham@arm.comchoiceCtrBits=2 2610636Snilay@cs.wisc.educhoicePredictorSize=8192 2711680SCurtis.Dunham@arm.comclock=500 2811680SCurtis.Dunham@arm.comcommitToDecodeDelay=1 2911680SCurtis.Dunham@arm.comcommitToFetchDelay=1 3011680SCurtis.Dunham@arm.comcommitToIEWDelay=1 3111680SCurtis.Dunham@arm.comcommitToRenameDelay=1 3211680SCurtis.Dunham@arm.comcommitWidth=8 3311680SCurtis.Dunham@arm.comcpu_id=0 3411680SCurtis.Dunham@arm.comdecodeToFetchDelay=1 3510636Snilay@cs.wisc.edudecodeToRenameDelay=1 3611680SCurtis.Dunham@arm.comdecodeWidth=8 3711680SCurtis.Dunham@arm.comdefer_registration=false 3811680SCurtis.Dunham@arm.comdispatchWidth=8 3911680SCurtis.Dunham@arm.comdtb=system.cpu.dtb 4011680SCurtis.Dunham@arm.comfetchToDecodeDelay=1 4111680SCurtis.Dunham@arm.comfetchTrapLatency=1 4211680SCurtis.Dunham@arm.comfetchWidth=8 4311680SCurtis.Dunham@arm.comforwardComSize=5 4411680SCurtis.Dunham@arm.comfuPool=system.cpu.fuPool 4511680SCurtis.Dunham@arm.comfunction_trace=false 4610892Sandreas.hansson@arm.comfunction_trace_start=0 4711680SCurtis.Dunham@arm.comglobalCtrBits=2 4811680SCurtis.Dunham@arm.comglobalHistoryBits=13 4911680SCurtis.Dunham@arm.comglobalPredictorSize=8192 5011680SCurtis.Dunham@arm.comiewToCommitDelay=1 5111680SCurtis.Dunham@arm.comiewToDecodeDelay=1 5211680SCurtis.Dunham@arm.comiewToFetchDelay=1 5311680SCurtis.Dunham@arm.comiewToRenameDelay=1 5411680SCurtis.Dunham@arm.cominstShiftAmt=2 5511680SCurtis.Dunham@arm.comissueToExecuteDelay=1 5611680SCurtis.Dunham@arm.comissueWidth=8 5711680SCurtis.Dunham@arm.comitb=system.cpu.itb 5811680SCurtis.Dunham@arm.comlocalCtrBits=2 5911680SCurtis.Dunham@arm.comlocalHistoryBits=11 6011680SCurtis.Dunham@arm.comlocalHistoryTableSize=2048 6111680SCurtis.Dunham@arm.comlocalPredictorSize=2048 6211680SCurtis.Dunham@arm.commax_insts_all_threads=0 6311680SCurtis.Dunham@arm.commax_insts_any_thread=0 6411680SCurtis.Dunham@arm.commax_loads_all_threads=0 6511680SCurtis.Dunham@arm.commax_loads_any_thread=0 6611336Sandreas.hansson@arm.comnumIQEntries=64 6711680SCurtis.Dunham@arm.comnumPhysFloatRegs=256 6811680SCurtis.Dunham@arm.comnumPhysIntRegs=256 6911680SCurtis.Dunham@arm.comnumROBEntries=192 7011680SCurtis.Dunham@arm.comnumRobs=1 7111680SCurtis.Dunham@arm.comnumThreads=1 7211680SCurtis.Dunham@arm.comphase=0 7311680SCurtis.Dunham@arm.compredType=tournament 7411680SCurtis.Dunham@arm.comprogress_interval=0 7511680SCurtis.Dunham@arm.comrenameToDecodeDelay=1 7611680SCurtis.Dunham@arm.comrenameToFetchDelay=1 7711680SCurtis.Dunham@arm.comrenameToIEWDelay=2 7811680SCurtis.Dunham@arm.comrenameToROBDelay=1 7911680SCurtis.Dunham@arm.comrenameWidth=8 8011680SCurtis.Dunham@arm.comsmtCommitPolicy=RoundRobin 8111680SCurtis.Dunham@arm.comsmtFetchPolicy=SingleThread 8211680SCurtis.Dunham@arm.comsmtIQPolicy=Partitioned 8311680SCurtis.Dunham@arm.comsmtIQThreshold=100 8411680SCurtis.Dunham@arm.comsmtLSQPolicy=Partitioned 8511680SCurtis.Dunham@arm.comsmtLSQThreshold=100 8611680SCurtis.Dunham@arm.comsmtNumFetchingThreads=1 8711680SCurtis.Dunham@arm.comsmtROBPolicy=Partitioned 8811680SCurtis.Dunham@arm.comsmtROBThreshold=100 8911680SCurtis.Dunham@arm.comsquashWidth=8 9011680SCurtis.Dunham@arm.comsystem=system 9111680SCurtis.Dunham@arm.comtracer=system.cpu.tracer 9211680SCurtis.Dunham@arm.comtrapLatency=13 9311680SCurtis.Dunham@arm.comwbDepth=1 9411680SCurtis.Dunham@arm.comwbWidth=8 9511680SCurtis.Dunham@arm.comworkload=system.cpu.workload0 system.cpu.workload1 9611680SCurtis.Dunham@arm.comdcache_port=system.cpu.dcache.cpu_side 9711680SCurtis.Dunham@arm.comicache_port=system.cpu.icache.cpu_side 9811680SCurtis.Dunham@arm.com 9910515SAli.Saidi@ARM.com[system.cpu.dcache] 10011680SCurtis.Dunham@arm.comtype=BaseCache 10111680SCurtis.Dunham@arm.comaddr_range=0:18446744073709551615 10210515SAli.Saidi@ARM.comassoc=2 10310515SAli.Saidi@ARM.comblock_size=64 10410515SAli.Saidi@ARM.comcpu_side_filter_ranges= 10510515SAli.Saidi@ARM.comhash_delay=1 10610515SAli.Saidi@ARM.comlatency=1000 10710515SAli.Saidi@ARM.comlifo=false 10811680SCurtis.Dunham@arm.commax_miss_count=0 10910515SAli.Saidi@ARM.commem_side_filter_ranges= 11010515SAli.Saidi@ARM.commshrs=10 11110515SAli.Saidi@ARM.comprefetch_access=false 11210515SAli.Saidi@ARM.comprefetch_cache_check_push=true 11310515SAli.Saidi@ARM.comprefetch_data_accesses_only=false 11410515SAli.Saidi@ARM.comprefetch_degree=1 11511680SCurtis.Dunham@arm.comprefetch_latency=10000 11611680SCurtis.Dunham@arm.comprefetch_miss=false 11711680SCurtis.Dunham@arm.comprefetch_past_page=false 11811680SCurtis.Dunham@arm.comprefetch_policy=none 11911680SCurtis.Dunham@arm.comprefetch_serial_squash=false 12011680SCurtis.Dunham@arm.comprefetch_use_cpu_id=true 12111680SCurtis.Dunham@arm.comprefetcher_size=100 12211680SCurtis.Dunham@arm.comprioritizeRequests=false 12311680SCurtis.Dunham@arm.comrepl=Null 12411680SCurtis.Dunham@arm.comsize=262144 12511680SCurtis.Dunham@arm.comsplit=false 12611680SCurtis.Dunham@arm.comsplit_size=0 12711680SCurtis.Dunham@arm.comsubblock_size=0 12811680SCurtis.Dunham@arm.comtgts_per_mshr=20 12911680SCurtis.Dunham@arm.comtrace_addr=0 13011680SCurtis.Dunham@arm.comtwo_queue=false 13111680SCurtis.Dunham@arm.comwrite_buffers=8 13211680SCurtis.Dunham@arm.comcpu_side=system.cpu.dcache_port 13311680SCurtis.Dunham@arm.commem_side=system.cpu.toL2Bus.port[1] 13411680SCurtis.Dunham@arm.com 13511680SCurtis.Dunham@arm.com[system.cpu.dtb] 13611680SCurtis.Dunham@arm.comtype=AlphaDTB 13711606Sandreas.sandberg@arm.comsize=64 13810515SAli.Saidi@ARM.com 13910515SAli.Saidi@ARM.com[system.cpu.fuPool] 14010515SAli.Saidi@ARM.comtype=FUPool 14110515SAli.Saidi@ARM.comchildren=FUList0 FUList1 FUList2 FUList3 FUList4 FUList5 FUList6 FUList7 14210515SAli.Saidi@ARM.comFUList=system.cpu.fuPool.FUList0 system.cpu.fuPool.FUList1 system.cpu.fuPool.FUList2 system.cpu.fuPool.FUList3 system.cpu.fuPool.FUList4 system.cpu.fuPool.FUList5 system.cpu.fuPool.FUList6 system.cpu.fuPool.FUList7 14310515SAli.Saidi@ARM.com 14410515SAli.Saidi@ARM.com[system.cpu.fuPool.FUList0] 14510515SAli.Saidi@ARM.comtype=FUDesc 14610515SAli.Saidi@ARM.comchildren=opList 14710515SAli.Saidi@ARM.comcount=6 14810515SAli.Saidi@ARM.comopList=system.cpu.fuPool.FUList0.opList 14910515SAli.Saidi@ARM.com 15010515SAli.Saidi@ARM.com[system.cpu.fuPool.FUList0.opList] 15110515SAli.Saidi@ARM.comtype=OpDesc 15210515SAli.Saidi@ARM.comissueLat=1 15310515SAli.Saidi@ARM.comopClass=IntAlu 15410515SAli.Saidi@ARM.comopLat=1 15510515SAli.Saidi@ARM.com 15610515SAli.Saidi@ARM.com[system.cpu.fuPool.FUList1] 15710515SAli.Saidi@ARM.comtype=FUDesc 15810515SAli.Saidi@ARM.comchildren=opList0 opList1 15910515SAli.Saidi@ARM.comcount=2 16010515SAli.Saidi@ARM.comopList=system.cpu.fuPool.FUList1.opList0 system.cpu.fuPool.FUList1.opList1 16110515SAli.Saidi@ARM.com 16210515SAli.Saidi@ARM.com[system.cpu.fuPool.FUList1.opList0] 16311680SCurtis.Dunham@arm.comtype=OpDesc 16411680SCurtis.Dunham@arm.comissueLat=1 16511680SCurtis.Dunham@arm.comopClass=IntMult 16611680SCurtis.Dunham@arm.comopLat=3 16711680SCurtis.Dunham@arm.com 16811680SCurtis.Dunham@arm.com[system.cpu.fuPool.FUList1.opList1] 16911680SCurtis.Dunham@arm.comtype=OpDesc 17011680SCurtis.Dunham@arm.comissueLat=19 17111680SCurtis.Dunham@arm.comopClass=IntDiv 17211680SCurtis.Dunham@arm.comopLat=20 17311680SCurtis.Dunham@arm.com 17411680SCurtis.Dunham@arm.com[system.cpu.fuPool.FUList2] 17511680SCurtis.Dunham@arm.comtype=FUDesc 17611680SCurtis.Dunham@arm.comchildren=opList0 opList1 opList2 17711680SCurtis.Dunham@arm.comcount=4 17811680SCurtis.Dunham@arm.comopList=system.cpu.fuPool.FUList2.opList0 system.cpu.fuPool.FUList2.opList1 system.cpu.fuPool.FUList2.opList2 17911680SCurtis.Dunham@arm.com 18011680SCurtis.Dunham@arm.com[system.cpu.fuPool.FUList2.opList0] 18111680SCurtis.Dunham@arm.comtype=OpDesc 18211680SCurtis.Dunham@arm.comissueLat=1 18311680SCurtis.Dunham@arm.comopClass=FloatAdd 18411680SCurtis.Dunham@arm.comopLat=2 18511680SCurtis.Dunham@arm.com 18611680SCurtis.Dunham@arm.com[system.cpu.fuPool.FUList2.opList1] 18711680SCurtis.Dunham@arm.comtype=OpDesc 18811680SCurtis.Dunham@arm.comissueLat=1 18911680SCurtis.Dunham@arm.comopClass=FloatCmp 19011680SCurtis.Dunham@arm.comopLat=2 19111680SCurtis.Dunham@arm.com 19211680SCurtis.Dunham@arm.com[system.cpu.fuPool.FUList2.opList2] 19311680SCurtis.Dunham@arm.comtype=OpDesc 19411680SCurtis.Dunham@arm.comissueLat=1 19511680SCurtis.Dunham@arm.comopClass=FloatCvt 19611680SCurtis.Dunham@arm.comopLat=2 19711680SCurtis.Dunham@arm.com 19811680SCurtis.Dunham@arm.com[system.cpu.fuPool.FUList3] 19911680SCurtis.Dunham@arm.comtype=FUDesc 20011680SCurtis.Dunham@arm.comchildren=opList0 opList1 opList2 20111680SCurtis.Dunham@arm.comcount=2 20211680SCurtis.Dunham@arm.comopList=system.cpu.fuPool.FUList3.opList0 system.cpu.fuPool.FUList3.opList1 system.cpu.fuPool.FUList3.opList2 20311680SCurtis.Dunham@arm.com 20411680SCurtis.Dunham@arm.com[system.cpu.fuPool.FUList3.opList0] 20511680SCurtis.Dunham@arm.comtype=OpDesc 20611680SCurtis.Dunham@arm.comissueLat=1 20711680SCurtis.Dunham@arm.comopClass=FloatMult 20811680SCurtis.Dunham@arm.comopLat=4 20911680SCurtis.Dunham@arm.com 21011680SCurtis.Dunham@arm.com[system.cpu.fuPool.FUList3.opList1] 21111680SCurtis.Dunham@arm.comtype=OpDesc 21211680SCurtis.Dunham@arm.comissueLat=12 21311680SCurtis.Dunham@arm.comopClass=FloatDiv 21411680SCurtis.Dunham@arm.comopLat=12 21511680SCurtis.Dunham@arm.com 21611680SCurtis.Dunham@arm.com[system.cpu.fuPool.FUList3.opList2] 21711680SCurtis.Dunham@arm.comtype=OpDesc 21811680SCurtis.Dunham@arm.comissueLat=24 21911680SCurtis.Dunham@arm.comopClass=FloatSqrt 22011680SCurtis.Dunham@arm.comopLat=24 22111680SCurtis.Dunham@arm.com 22211680SCurtis.Dunham@arm.com[system.cpu.fuPool.FUList4] 22311680SCurtis.Dunham@arm.comtype=FUDesc 22411680SCurtis.Dunham@arm.comchildren=opList 22511680SCurtis.Dunham@arm.comcount=0 22611680SCurtis.Dunham@arm.comopList=system.cpu.fuPool.FUList4.opList 22711680SCurtis.Dunham@arm.com 22811680SCurtis.Dunham@arm.com[system.cpu.fuPool.FUList4.opList] 22911680SCurtis.Dunham@arm.comtype=OpDesc 23011680SCurtis.Dunham@arm.comissueLat=1 23111353Sandreas.hansson@arm.comopClass=MemRead 23211353Sandreas.hansson@arm.comopLat=1 23311680SCurtis.Dunham@arm.com 23411680SCurtis.Dunham@arm.com[system.cpu.fuPool.FUList5] 23511680SCurtis.Dunham@arm.comtype=FUDesc 23611680SCurtis.Dunham@arm.comchildren=opList 23711680SCurtis.Dunham@arm.comcount=0 23811680SCurtis.Dunham@arm.comopList=system.cpu.fuPool.FUList5.opList 23911680SCurtis.Dunham@arm.com 24011680SCurtis.Dunham@arm.com[system.cpu.fuPool.FUList5.opList] 24111680SCurtis.Dunham@arm.comtype=OpDesc 24211680SCurtis.Dunham@arm.comissueLat=1 24311680SCurtis.Dunham@arm.comopClass=MemWrite 24411680SCurtis.Dunham@arm.comopLat=1 24511680SCurtis.Dunham@arm.com 24611680SCurtis.Dunham@arm.com[system.cpu.fuPool.FUList6] 24711680SCurtis.Dunham@arm.comtype=FUDesc 24811680SCurtis.Dunham@arm.comchildren=opList0 opList1 24911680SCurtis.Dunham@arm.comcount=4 25011680SCurtis.Dunham@arm.comopList=system.cpu.fuPool.FUList6.opList0 system.cpu.fuPool.FUList6.opList1 25111680SCurtis.Dunham@arm.com 25211680SCurtis.Dunham@arm.com[system.cpu.fuPool.FUList6.opList0] 25311680SCurtis.Dunham@arm.comtype=OpDesc 25411680SCurtis.Dunham@arm.comissueLat=1 25511680SCurtis.Dunham@arm.comopClass=MemRead 25611680SCurtis.Dunham@arm.comopLat=1 25711680SCurtis.Dunham@arm.com 25811680SCurtis.Dunham@arm.com[system.cpu.fuPool.FUList6.opList1] 25911680SCurtis.Dunham@arm.comtype=OpDesc 26011680SCurtis.Dunham@arm.comissueLat=1 26111680SCurtis.Dunham@arm.comopClass=MemWrite 26211680SCurtis.Dunham@arm.comopLat=1 26311680SCurtis.Dunham@arm.com 26411680SCurtis.Dunham@arm.com[system.cpu.fuPool.FUList7] 26511680SCurtis.Dunham@arm.comtype=FUDesc 26611680SCurtis.Dunham@arm.comchildren=opList 26711680SCurtis.Dunham@arm.comcount=1 26811680SCurtis.Dunham@arm.comopList=system.cpu.fuPool.FUList7.opList 26911680SCurtis.Dunham@arm.com 27011680SCurtis.Dunham@arm.com[system.cpu.fuPool.FUList7.opList] 27111680SCurtis.Dunham@arm.comtype=OpDesc 27211680SCurtis.Dunham@arm.comissueLat=3 27311680SCurtis.Dunham@arm.comopClass=IprAccess 27411680SCurtis.Dunham@arm.comopLat=3 27511680SCurtis.Dunham@arm.com 27611680SCurtis.Dunham@arm.com[system.cpu.icache] 27711680SCurtis.Dunham@arm.comtype=BaseCache 27811680SCurtis.Dunham@arm.comaddr_range=0:18446744073709551615 27911680SCurtis.Dunham@arm.comassoc=2 28011680SCurtis.Dunham@arm.comblock_size=64 28111680SCurtis.Dunham@arm.comcpu_side_filter_ranges= 28211680SCurtis.Dunham@arm.comhash_delay=1 28311680SCurtis.Dunham@arm.comlatency=1000 28410515SAli.Saidi@ARM.comlifo=false 28511680SCurtis.Dunham@arm.commax_miss_count=0 28611680SCurtis.Dunham@arm.commem_side_filter_ranges= 28711680SCurtis.Dunham@arm.commshrs=10 28811680SCurtis.Dunham@arm.comprefetch_access=false 28911680SCurtis.Dunham@arm.comprefetch_cache_check_push=true 29010515SAli.Saidi@ARM.comprefetch_data_accesses_only=false 29111606Sandreas.sandberg@arm.comprefetch_degree=1 29211353Sandreas.hansson@arm.comprefetch_latency=10000 29310892Sandreas.hansson@arm.comprefetch_miss=false 29411103Snilay@cs.wisc.eduprefetch_past_page=false 29511680SCurtis.Dunham@arm.comprefetch_policy=none 29611680SCurtis.Dunham@arm.comprefetch_serial_squash=false 29711680SCurtis.Dunham@arm.comprefetch_use_cpu_id=true 29811680SCurtis.Dunham@arm.comprefetcher_size=100 29911680SCurtis.Dunham@arm.comprioritizeRequests=false 30011680SCurtis.Dunham@arm.comrepl=Null 30111680SCurtis.Dunham@arm.comsize=131072 30211680SCurtis.Dunham@arm.comsplit=false 30311680SCurtis.Dunham@arm.comsplit_size=0 30411680SCurtis.Dunham@arm.comsubblock_size=0 30511680SCurtis.Dunham@arm.comtgts_per_mshr=20 30611680SCurtis.Dunham@arm.comtrace_addr=0 30711680SCurtis.Dunham@arm.comtwo_queue=false 30811680SCurtis.Dunham@arm.comwrite_buffers=8 30911680SCurtis.Dunham@arm.comcpu_side=system.cpu.icache_port 31011680SCurtis.Dunham@arm.commem_side=system.cpu.toL2Bus.port[0] 31111680SCurtis.Dunham@arm.com 31211680SCurtis.Dunham@arm.com[system.cpu.itb] 31311680SCurtis.Dunham@arm.comtype=AlphaITB 31411680SCurtis.Dunham@arm.comsize=48 31511680SCurtis.Dunham@arm.com 31611680SCurtis.Dunham@arm.com[system.cpu.l2cache] 31711680SCurtis.Dunham@arm.comtype=BaseCache 31811680SCurtis.Dunham@arm.comaddr_range=0:18446744073709551615 31911680SCurtis.Dunham@arm.comassoc=2 32011680SCurtis.Dunham@arm.comblock_size=64 32111680SCurtis.Dunham@arm.comcpu_side_filter_ranges= 32211680SCurtis.Dunham@arm.comhash_delay=1 32311680SCurtis.Dunham@arm.comlatency=1000 32411680SCurtis.Dunham@arm.comlifo=false 32511680SCurtis.Dunham@arm.commax_miss_count=0 32611680SCurtis.Dunham@arm.commem_side_filter_ranges= 32711680SCurtis.Dunham@arm.commshrs=10 32811680SCurtis.Dunham@arm.comprefetch_access=false 32911680SCurtis.Dunham@arm.comprefetch_cache_check_push=true 33011680SCurtis.Dunham@arm.comprefetch_data_accesses_only=false 33111680SCurtis.Dunham@arm.comprefetch_degree=1 33211680SCurtis.Dunham@arm.comprefetch_latency=10000 33311680SCurtis.Dunham@arm.comprefetch_miss=false 33411680SCurtis.Dunham@arm.comprefetch_past_page=false 33511680SCurtis.Dunham@arm.comprefetch_policy=none 33611680SCurtis.Dunham@arm.comprefetch_serial_squash=false 33711680SCurtis.Dunham@arm.comprefetch_use_cpu_id=true 33811680SCurtis.Dunham@arm.comprefetcher_size=100 33911680SCurtis.Dunham@arm.comprioritizeRequests=false 34011680SCurtis.Dunham@arm.comrepl=Null 34110636Snilay@cs.wisc.edusize=2097152 34210636Snilay@cs.wisc.edusplit=false 34310515SAli.Saidi@ARM.comsplit_size=0 34410515SAli.Saidi@ARM.comsubblock_size=0 34510515SAli.Saidi@ARM.comtgts_per_mshr=5 34610636Snilay@cs.wisc.edutrace_addr=0 34710636Snilay@cs.wisc.edutwo_queue=false 34810515SAli.Saidi@ARM.comwrite_buffers=8 34910515SAli.Saidi@ARM.comcpu_side=system.cpu.toL2Bus.port[2] 35010636Snilay@cs.wisc.edumem_side=system.membus.port[1] 35110515SAli.Saidi@ARM.com 35210515SAli.Saidi@ARM.com[system.cpu.toL2Bus] 35310515SAli.Saidi@ARM.comtype=Bus 35410515SAli.Saidi@ARM.comblock_size=64 35510636Snilay@cs.wisc.edubus_id=0 35610515SAli.Saidi@ARM.comclock=1000 35711680SCurtis.Dunham@arm.comheader_cycles=1 35811680SCurtis.Dunham@arm.comresponder_set=false 35911680SCurtis.Dunham@arm.comwidth=64 36010585Sandreas.hansson@arm.comport=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side 36110585Sandreas.hansson@arm.com 36210585Sandreas.hansson@arm.com[system.cpu.tracer] 36310585Sandreas.hansson@arm.comtype=ExeTracer 36410585Sandreas.hansson@arm.com 36510585Sandreas.hansson@arm.com[system.cpu.workload0] 36611680SCurtis.Dunham@arm.comtype=LiveProcess 36711680SCurtis.Dunham@arm.comcmd=hello 36811680SCurtis.Dunham@arm.comcwd= 36911680SCurtis.Dunham@arm.comegid=100 37011680SCurtis.Dunham@arm.comenv= 37110585Sandreas.hansson@arm.comerrout=cerr 37211680SCurtis.Dunham@arm.comeuid=100 37311680SCurtis.Dunham@arm.comexecutable=/dist/m5/regression/test-progs/hello/bin/alpha/linux/hello 37411680SCurtis.Dunham@arm.comgid=100 37511680SCurtis.Dunham@arm.cominput=cin 37611680SCurtis.Dunham@arm.commax_stack_size=67108864 37711680SCurtis.Dunham@arm.comoutput=cout 37811680SCurtis.Dunham@arm.compid=100 37910585Sandreas.hansson@arm.comppid=99 38011680SCurtis.Dunham@arm.comsimpoint=0 38110628Sandreas.hansson@arm.comsystem=system 38210628Sandreas.hansson@arm.comuid=100 38310628Sandreas.hansson@arm.com 38410628Sandreas.hansson@arm.com[system.cpu.workload1] 38510628Sandreas.hansson@arm.comtype=LiveProcess 38610628Sandreas.hansson@arm.comcmd=hello 38710628Sandreas.hansson@arm.comcwd= 38810628Sandreas.hansson@arm.comegid=100 38910585Sandreas.hansson@arm.comenv= 39010585Sandreas.hansson@arm.comerrout=cerr 39110585Sandreas.hansson@arm.comeuid=100 39210585Sandreas.hansson@arm.comexecutable=/dist/m5/regression/test-progs/hello/bin/alpha/linux/hello 39310585Sandreas.hansson@arm.comgid=100 39410585Sandreas.hansson@arm.cominput=cin 39510585Sandreas.hansson@arm.commax_stack_size=67108864 39610585Sandreas.hansson@arm.comoutput=cout 39710585Sandreas.hansson@arm.compid=100 39810585Sandreas.hansson@arm.comppid=99 39910585Sandreas.hansson@arm.comsimpoint=0 40010585Sandreas.hansson@arm.comsystem=system 40110585Sandreas.hansson@arm.comuid=100 40210585Sandreas.hansson@arm.com 40310585Sandreas.hansson@arm.com[system.membus] 40410585Sandreas.hansson@arm.comtype=Bus 40510585Sandreas.hansson@arm.comblock_size=64 40610585Sandreas.hansson@arm.combus_id=0 40710585Sandreas.hansson@arm.comclock=1000 40810585Sandreas.hansson@arm.comheader_cycles=1 40910585Sandreas.hansson@arm.comresponder_set=false 41011680SCurtis.Dunham@arm.comwidth=64 41111680SCurtis.Dunham@arm.comport=system.physmem.port[0] system.cpu.l2cache.mem_side 41211680SCurtis.Dunham@arm.com 41311680SCurtis.Dunham@arm.com[system.physmem] 41411680SCurtis.Dunham@arm.comtype=PhysicalMemory 41511680SCurtis.Dunham@arm.comfile= 41611680SCurtis.Dunham@arm.comlatency=1 41711680SCurtis.Dunham@arm.comlatency_var=0 41811680SCurtis.Dunham@arm.comnull=false 41911680SCurtis.Dunham@arm.comrange=0:134217727 42011680SCurtis.Dunham@arm.comzero=false 42111680SCurtis.Dunham@arm.comport=system.membus.port[0] 42211680SCurtis.Dunham@arm.com 42311680SCurtis.Dunham@arm.com