1[root] 2type=Root 3children=system 4eventq_index=0 5full_system=false 6sim_quantum=0 7time_sync_enable=false 8time_sync_period=100000000000 9time_sync_spin_threshold=100000000 10 11[system] 12type=System 13children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain 14boot_osflags=a 15cache_line_size=64 16clk_domain=system.clk_domain 17default_p_state=UNDEFINED 18eventq_index=0 19exit_on_work_items=false 20init_param=0 21kernel= 22kernel_addr_check=true 23load_addr_mask=1099511627775 24load_offset=0 25mem_mode=atomic 26mem_ranges= 27memories=system.physmem 28mmap_using_noreserve=false 29multi_thread=false 30num_work_ids=16 31p_state_clk_gate_bins=20 32p_state_clk_gate_max=1000000000000 33p_state_clk_gate_min=1000 34power_model=Null 35readfile= 36symbolfile= 37thermal_components= 38thermal_model=Null 39work_begin_ckpt_count=0 40work_begin_cpu_id_exit=-1 41work_begin_exit_count=0 42work_cpus_ckpt_count=0 43work_end_ckpt_count=0 44work_end_exit_count=0 45work_item_id=-1 46system_port=system.membus.slave[0] 47 48[system.clk_domain] 49type=SrcClockDomain 50clock=1000 51domain_id=-1 52eventq_index=0 53init_perf_level=0 54voltage_domain=system.voltage_domain 55 56[system.cpu] 57type=AtomicSimpleCPU 58children=checker dstage2_mmu dtb interrupts isa istage2_mmu itb tracer workload 59branchPred=Null 60checker=system.cpu.checker 61clk_domain=system.cpu_clk_domain 62cpu_id=0 63default_p_state=UNDEFINED 64do_checkpoint_insts=true 65do_quiesce=true 66do_statistics_insts=true 67dstage2_mmu=system.cpu.dstage2_mmu 68dtb=system.cpu.dtb 69eventq_index=0 70fastmem=false 71function_trace=false 72function_trace_start=0 73interrupts=system.cpu.interrupts 74isa=system.cpu.isa 75istage2_mmu=system.cpu.istage2_mmu 76itb=system.cpu.itb 77max_insts_all_threads=0 78max_insts_any_thread=0 79max_loads_all_threads=0 80max_loads_any_thread=0 81numThreads=1 82p_state_clk_gate_bins=20 83p_state_clk_gate_max=1000000000000 84p_state_clk_gate_min=1000 85power_model=Null 86profile=0 87progress_interval=0 88simpoint_start_insts= 89simulate_data_stalls=false 90simulate_inst_stalls=false 91socket_id=0 92switched_out=false 93syscallRetryLatency=10000 94system=system 95tracer=system.cpu.tracer 96width=1 97workload=system.cpu.workload 98dcache_port=system.membus.slave[2] 99icache_port=system.membus.slave[1] 100 101[system.cpu.checker] 102type=DummyChecker 103children=dstage2_mmu dtb isa istage2_mmu itb tracer 104checker=Null 105clk_domain=system.cpu_clk_domain 106cpu_id=-1 107default_p_state=UNDEFINED 108do_checkpoint_insts=true 109do_quiesce=true 110do_statistics_insts=true 111dstage2_mmu=system.cpu.checker.dstage2_mmu 112dtb=system.cpu.checker.dtb 113eventq_index=0 114exitOnError=false 115function_trace=false 116function_trace_start=0 117interrupts= 118isa=system.cpu.checker.isa 119istage2_mmu=system.cpu.checker.istage2_mmu 120itb=system.cpu.checker.itb 121max_insts_all_threads=0 122max_insts_any_thread=0 123max_loads_all_threads=0 124max_loads_any_thread=0 125numThreads=1 126p_state_clk_gate_bins=20 127p_state_clk_gate_max=1000000000000 128p_state_clk_gate_min=1000 129power_model=Null 130profile=0 131progress_interval=0 132simpoint_start_insts= 133socket_id=0 134switched_out=false 135syscallRetryLatency=10000 136system=system 137tracer=system.cpu.checker.tracer 138updateOnError=false 139warnOnlyOnLoadError=true 140workload=system.cpu.workload 141 142[system.cpu.checker.dstage2_mmu] 143type=ArmStage2MMU 144children=stage2_tlb 145eventq_index=0 146stage2_tlb=system.cpu.checker.dstage2_mmu.stage2_tlb 147sys=system 148tlb=system.cpu.checker.dtb 149 150[system.cpu.checker.dstage2_mmu.stage2_tlb] 151type=ArmTLB 152children=walker 153eventq_index=0 154is_stage2=true 155size=32 156walker=system.cpu.checker.dstage2_mmu.stage2_tlb.walker 157 158[system.cpu.checker.dstage2_mmu.stage2_tlb.walker] 159type=ArmTableWalker 160clk_domain=system.cpu_clk_domain 161default_p_state=UNDEFINED 162eventq_index=0 163is_stage2=true 164num_squash_per_cycle=2 165p_state_clk_gate_bins=20 166p_state_clk_gate_max=1000000000000 167p_state_clk_gate_min=1000 168power_model=Null 169sys=system 170 171[system.cpu.checker.dtb] 172type=ArmTLB 173children=walker 174eventq_index=0 175is_stage2=false 176size=64 177walker=system.cpu.checker.dtb.walker 178 179[system.cpu.checker.dtb.walker] 180type=ArmTableWalker 181clk_domain=system.cpu_clk_domain 182default_p_state=UNDEFINED 183eventq_index=0 184is_stage2=false 185num_squash_per_cycle=2 186p_state_clk_gate_bins=20 187p_state_clk_gate_max=1000000000000 188p_state_clk_gate_min=1000 189power_model=Null 190sys=system 191 192[system.cpu.checker.isa] 193type=ArmISA 194decoderFlavour=Generic 195eventq_index=0 196fpsid=1090793632 197id_aa64afr0_el1=0 198id_aa64afr1_el1=0 199id_aa64dfr0_el1=1052678 200id_aa64dfr1_el1=0 201id_aa64isar0_el1=0 202id_aa64isar1_el1=0 203id_aa64mmfr0_el1=15728642 204id_aa64mmfr1_el1=0 205id_isar0=34607377 206id_isar1=34677009 207id_isar2=555950401 208id_isar3=17899825 209id_isar4=268501314 210id_isar5=0 211id_mmfr0=270536963 212id_mmfr1=0 213id_mmfr2=19070976 214id_mmfr3=34611729 215midr=1091551472 216pmu=Null 217system=system 218 219[system.cpu.checker.istage2_mmu] 220type=ArmStage2MMU 221children=stage2_tlb 222eventq_index=0 223stage2_tlb=system.cpu.checker.istage2_mmu.stage2_tlb 224sys=system 225tlb=system.cpu.checker.itb 226 227[system.cpu.checker.istage2_mmu.stage2_tlb] 228type=ArmTLB 229children=walker 230eventq_index=0 231is_stage2=true 232size=32 233walker=system.cpu.checker.istage2_mmu.stage2_tlb.walker 234 235[system.cpu.checker.istage2_mmu.stage2_tlb.walker] 236type=ArmTableWalker 237clk_domain=system.cpu_clk_domain 238default_p_state=UNDEFINED 239eventq_index=0 240is_stage2=true 241num_squash_per_cycle=2 242p_state_clk_gate_bins=20 243p_state_clk_gate_max=1000000000000 244p_state_clk_gate_min=1000 245power_model=Null 246sys=system 247 248[system.cpu.checker.itb] 249type=ArmTLB 250children=walker 251eventq_index=0 252is_stage2=false 253size=64 254walker=system.cpu.checker.itb.walker 255 256[system.cpu.checker.itb.walker] 257type=ArmTableWalker 258clk_domain=system.cpu_clk_domain 259default_p_state=UNDEFINED 260eventq_index=0 261is_stage2=false 262num_squash_per_cycle=2 263p_state_clk_gate_bins=20 264p_state_clk_gate_max=1000000000000 265p_state_clk_gate_min=1000 266power_model=Null 267sys=system 268 269[system.cpu.checker.tracer] 270type=ExeTracer 271eventq_index=0 272 273[system.cpu.dstage2_mmu] 274type=ArmStage2MMU 275children=stage2_tlb 276eventq_index=0 277stage2_tlb=system.cpu.dstage2_mmu.stage2_tlb 278sys=system 279tlb=system.cpu.dtb 280 281[system.cpu.dstage2_mmu.stage2_tlb] 282type=ArmTLB 283children=walker 284eventq_index=0 285is_stage2=true 286size=32 287walker=system.cpu.dstage2_mmu.stage2_tlb.walker 288 289[system.cpu.dstage2_mmu.stage2_tlb.walker] 290type=ArmTableWalker 291clk_domain=system.cpu_clk_domain 292default_p_state=UNDEFINED 293eventq_index=0 294is_stage2=true 295num_squash_per_cycle=2 296p_state_clk_gate_bins=20 297p_state_clk_gate_max=1000000000000 298p_state_clk_gate_min=1000 299power_model=Null 300sys=system 301 302[system.cpu.dtb] 303type=ArmTLB 304children=walker 305eventq_index=0 306is_stage2=false 307size=64 308walker=system.cpu.dtb.walker 309 310[system.cpu.dtb.walker] 311type=ArmTableWalker 312clk_domain=system.cpu_clk_domain 313default_p_state=UNDEFINED 314eventq_index=0 315is_stage2=false 316num_squash_per_cycle=2 317p_state_clk_gate_bins=20 318p_state_clk_gate_max=1000000000000 319p_state_clk_gate_min=1000 320power_model=Null 321sys=system 322port=system.membus.slave[4] 323 324[system.cpu.interrupts] 325type=ArmInterrupts 326eventq_index=0 327 328[system.cpu.isa] 329type=ArmISA 330decoderFlavour=Generic 331eventq_index=0 332fpsid=1090793632 333id_aa64afr0_el1=0 334id_aa64afr1_el1=0 335id_aa64dfr0_el1=1052678 336id_aa64dfr1_el1=0 337id_aa64isar0_el1=0 338id_aa64isar1_el1=0 339id_aa64mmfr0_el1=15728642 340id_aa64mmfr1_el1=0 341id_isar0=34607377 342id_isar1=34677009 343id_isar2=555950401 344id_isar3=17899825 345id_isar4=268501314 346id_isar5=0 347id_mmfr0=270536963 348id_mmfr1=0 349id_mmfr2=19070976 350id_mmfr3=34611729 351midr=1091551472 352pmu=Null 353system=system 354 355[system.cpu.istage2_mmu] 356type=ArmStage2MMU 357children=stage2_tlb 358eventq_index=0 359stage2_tlb=system.cpu.istage2_mmu.stage2_tlb 360sys=system 361tlb=system.cpu.itb 362 363[system.cpu.istage2_mmu.stage2_tlb] 364type=ArmTLB 365children=walker 366eventq_index=0 367is_stage2=true 368size=32 369walker=system.cpu.istage2_mmu.stage2_tlb.walker 370 371[system.cpu.istage2_mmu.stage2_tlb.walker] 372type=ArmTableWalker 373clk_domain=system.cpu_clk_domain 374default_p_state=UNDEFINED 375eventq_index=0 376is_stage2=true 377num_squash_per_cycle=2 378p_state_clk_gate_bins=20 379p_state_clk_gate_max=1000000000000 380p_state_clk_gate_min=1000 381power_model=Null 382sys=system 383 384[system.cpu.itb] 385type=ArmTLB 386children=walker 387eventq_index=0 388is_stage2=false 389size=64 390walker=system.cpu.itb.walker 391 392[system.cpu.itb.walker] 393type=ArmTableWalker 394clk_domain=system.cpu_clk_domain 395default_p_state=UNDEFINED 396eventq_index=0 397is_stage2=false 398num_squash_per_cycle=2 399p_state_clk_gate_bins=20 400p_state_clk_gate_max=1000000000000 401p_state_clk_gate_min=1000 402power_model=Null 403sys=system 404port=system.membus.slave[3] 405 406[system.cpu.tracer] 407type=ExeTracer 408eventq_index=0 409 410[system.cpu.workload] 411type=Process 412cmd=hello 413cwd= 414drivers= 415egid=100 416env= 417errout=cerr 418euid=100 419eventq_index=0 420executable=/usr/local/google/home/gabeblack/gem5/dist/m5/regression/test-progs/hello/bin/arm/linux/hello 421gid=100 422input=cin 423kvmInSE=false 424maxStackSize=67108864 425output=cout 426pgid=100 427pid=100 428ppid=0 429simpoint=0 430system=system 431uid=100 432useArchPT=false 433 434[system.cpu_clk_domain] 435type=SrcClockDomain 436clock=500 437domain_id=-1 438eventq_index=0 439init_perf_level=0 440voltage_domain=system.voltage_domain 441 442[system.dvfs_handler] 443type=DVFSHandler 444domains= 445enable=false 446eventq_index=0 447sys_clk_domain=system.clk_domain 448transition_latency=100000000 449 450[system.membus] 451type=CoherentXBar 452children=snoop_filter 453clk_domain=system.clk_domain 454default_p_state=UNDEFINED 455eventq_index=0 456forward_latency=4 457frontend_latency=3 458p_state_clk_gate_bins=20 459p_state_clk_gate_max=1000000000000 460p_state_clk_gate_min=1000 461point_of_coherency=true 462power_model=Null 463response_latency=2 464snoop_filter=system.membus.snoop_filter 465snoop_response_latency=4 466system=system 467use_default_range=false 468width=16 469master=system.physmem.port 470slave=system.system_port system.cpu.icache_port system.cpu.dcache_port system.cpu.itb.walker.port system.cpu.dtb.walker.port 471 472[system.membus.snoop_filter] 473type=SnoopFilter 474eventq_index=0 475lookup_latency=1 476max_capacity=8388608 477system=system 478 479[system.physmem] 480type=SimpleMemory 481bandwidth=73.000000 482clk_domain=system.clk_domain 483conf_table_reported=true 484default_p_state=UNDEFINED 485eventq_index=0 486in_addr_map=true 487kvm_map=true 488latency=30000 489latency_var=0 490null=false 491p_state_clk_gate_bins=20 492p_state_clk_gate_max=1000000000000 493p_state_clk_gate_min=1000 494power_model=Null 495range=0:134217727:0:0:0:0 496port=system.membus.master[0] 497 498[system.voltage_domain] 499type=VoltageDomain 500eventq_index=0 501voltage=1.000000 502 503