1[root] 2type=Root 3children=system 4eventq_index=0 5full_system=false 6sim_quantum=0 7time_sync_enable=false 8time_sync_period=100000000000 9time_sync_spin_threshold=100000000 10 11[system] 12type=System 13children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain 14boot_osflags=a 15cache_line_size=64 16clk_domain=system.clk_domain 17default_p_state=UNDEFINED 18eventq_index=0 19exit_on_work_items=false 20init_param=0 21kernel= 22kernel_addr_check=true 23load_addr_mask=1099511627775 24load_offset=0 25mem_mode=timing 26mem_ranges= 27memories=system.physmem 28mmap_using_noreserve=false 29multi_thread=false 30num_work_ids=16 31p_state_clk_gate_bins=20 32p_state_clk_gate_max=1000000000000 33p_state_clk_gate_min=1000 34power_model=Null 35readfile= 36symbolfile= 37thermal_components= 38thermal_model=Null 39work_begin_ckpt_count=0 40work_begin_cpu_id_exit=-1 41work_begin_exit_count=0 42work_cpus_ckpt_count=0 43work_end_ckpt_count=0 44work_end_exit_count=0 45work_item_id=-1 46system_port=system.membus.slave[0] 47 48[system.clk_domain] 49type=SrcClockDomain 50clock=1000 51domain_id=-1 52eventq_index=0 53init_perf_level=0 54voltage_domain=system.voltage_domain 55 56[system.cpu] 57type=MinorCPU 58children=branchPred dcache dstage2_mmu dtb executeFuncUnits icache interrupts isa istage2_mmu itb l2cache toL2Bus tracer workload 59branchPred=system.cpu.branchPred 60checker=Null 61clk_domain=system.cpu_clk_domain 62cpu_id=0 63decodeCycleInput=true 64decodeInputBufferSize=3 65decodeInputWidth=2 66decodeToExecuteForwardDelay=1 67default_p_state=UNDEFINED 68do_checkpoint_insts=true 69do_quiesce=true 70do_statistics_insts=true 71dstage2_mmu=system.cpu.dstage2_mmu 72dtb=system.cpu.dtb 73enableIdling=true 74eventq_index=0 75executeAllowEarlyMemoryIssue=true 76executeBranchDelay=1 77executeCommitLimit=2 78executeCycleInput=true 79executeFuncUnits=system.cpu.executeFuncUnits 80executeInputBufferSize=7 81executeInputWidth=2 82executeIssueLimit=2 83executeLSQMaxStoreBufferStoresPerCycle=2 84executeLSQRequestsQueueSize=1 85executeLSQStoreBufferSize=5 86executeLSQTransfersQueueSize=2 87executeMaxAccessesInMemory=2 88executeMemoryCommitLimit=1 89executeMemoryIssueLimit=1 90executeMemoryWidth=0 91executeSetTraceTimeOnCommit=true 92executeSetTraceTimeOnIssue=false 93fetch1FetchLimit=1 94fetch1LineSnapWidth=0 95fetch1LineWidth=0 96fetch1ToFetch2BackwardDelay=1 97fetch1ToFetch2ForwardDelay=1 98fetch2CycleInput=true 99fetch2InputBufferSize=2 100fetch2ToDecodeForwardDelay=1 101function_trace=false 102function_trace_start=0 103interrupts=system.cpu.interrupts 104isa=system.cpu.isa 105istage2_mmu=system.cpu.istage2_mmu 106itb=system.cpu.itb 107max_insts_all_threads=0 108max_insts_any_thread=0 109max_loads_all_threads=0 110max_loads_any_thread=0 111numThreads=1 112p_state_clk_gate_bins=20 113p_state_clk_gate_max=1000000000000 114p_state_clk_gate_min=1000 115power_model=Null 116profile=0 117progress_interval=0 118simpoint_start_insts= 119socket_id=0 120switched_out=false 121syscallRetryLatency=10000 122system=system 123threadPolicy=RoundRobin 124tracer=system.cpu.tracer 125workload=system.cpu.workload 126dcache_port=system.cpu.dcache.cpu_side 127icache_port=system.cpu.icache.cpu_side 128 129[system.cpu.branchPred] 130type=TournamentBP 131BTBEntries=4096 132BTBTagSize=16 133RASSize=16 134choiceCtrBits=2 135choicePredictorSize=8192 136eventq_index=0 137globalCtrBits=2 138globalPredictorSize=8192 139indirectHashGHR=true 140indirectHashTargets=true 141indirectPathLength=3 142indirectSets=256 143indirectTagSize=16 144indirectWays=2 145instShiftAmt=2 146localCtrBits=2 147localHistoryTableSize=2048 148localPredictorSize=2048 149numThreads=1 150useIndirect=true 151 152[system.cpu.dcache] 153type=Cache 154children=tags 155addr_ranges=0:18446744073709551615:0:0:0:0 156assoc=2 157clk_domain=system.cpu_clk_domain 158clusivity=mostly_incl 159data_latency=2 160default_p_state=UNDEFINED 161demand_mshr_reserve=1 162eventq_index=0 163is_read_only=false 164max_miss_count=0 165mshrs=4 166p_state_clk_gate_bins=20 167p_state_clk_gate_max=1000000000000 168p_state_clk_gate_min=1000 169power_model=Null 170prefetch_on_access=false 171prefetcher=Null 172response_latency=2 173sequential_access=false 174size=262144 175system=system 176tag_latency=2 177tags=system.cpu.dcache.tags 178tgts_per_mshr=20 179write_buffers=8 180writeback_clean=false 181cpu_side=system.cpu.dcache_port 182mem_side=system.cpu.toL2Bus.slave[1] 183 184[system.cpu.dcache.tags] 185type=LRU 186assoc=2 187block_size=64 188clk_domain=system.cpu_clk_domain 189data_latency=2 190default_p_state=UNDEFINED 191eventq_index=0 192p_state_clk_gate_bins=20 193p_state_clk_gate_max=1000000000000 194p_state_clk_gate_min=1000 195power_model=Null 196sequential_access=false 197size=262144 198tag_latency=2 199 200[system.cpu.dstage2_mmu] 201type=ArmStage2MMU 202children=stage2_tlb 203eventq_index=0 204stage2_tlb=system.cpu.dstage2_mmu.stage2_tlb 205sys=system 206tlb=system.cpu.dtb 207 208[system.cpu.dstage2_mmu.stage2_tlb] 209type=ArmTLB 210children=walker 211eventq_index=0 212is_stage2=true 213size=32 214walker=system.cpu.dstage2_mmu.stage2_tlb.walker 215 216[system.cpu.dstage2_mmu.stage2_tlb.walker] 217type=ArmTableWalker 218clk_domain=system.cpu_clk_domain 219default_p_state=UNDEFINED 220eventq_index=0 221is_stage2=true 222num_squash_per_cycle=2 223p_state_clk_gate_bins=20 224p_state_clk_gate_max=1000000000000 225p_state_clk_gate_min=1000 226power_model=Null 227sys=system 228 229[system.cpu.dtb] 230type=ArmTLB 231children=walker 232eventq_index=0 233is_stage2=false 234size=64 235walker=system.cpu.dtb.walker 236 237[system.cpu.dtb.walker] 238type=ArmTableWalker 239clk_domain=system.cpu_clk_domain 240default_p_state=UNDEFINED 241eventq_index=0 242is_stage2=false 243num_squash_per_cycle=2 244p_state_clk_gate_bins=20 245p_state_clk_gate_max=1000000000000 246p_state_clk_gate_min=1000 247power_model=Null 248sys=system 249port=system.cpu.toL2Bus.slave[3] 250 251[system.cpu.executeFuncUnits] 252type=MinorFUPool 253children=funcUnits0 funcUnits1 funcUnits2 funcUnits3 funcUnits4 funcUnits5 funcUnits6 254eventq_index=0 255funcUnits=system.cpu.executeFuncUnits.funcUnits0 system.cpu.executeFuncUnits.funcUnits1 system.cpu.executeFuncUnits.funcUnits2 system.cpu.executeFuncUnits.funcUnits3 system.cpu.executeFuncUnits.funcUnits4 system.cpu.executeFuncUnits.funcUnits5 system.cpu.executeFuncUnits.funcUnits6 256 257[system.cpu.executeFuncUnits.funcUnits0] 258type=MinorFU 259children=opClasses timings 260cantForwardFromFUIndices= 261eventq_index=0 262issueLat=1 263opClasses=system.cpu.executeFuncUnits.funcUnits0.opClasses 264opLat=3 265timings=system.cpu.executeFuncUnits.funcUnits0.timings 266 267[system.cpu.executeFuncUnits.funcUnits0.opClasses] 268type=MinorOpClassSet 269children=opClasses 270eventq_index=0 271opClasses=system.cpu.executeFuncUnits.funcUnits0.opClasses.opClasses 272 273[system.cpu.executeFuncUnits.funcUnits0.opClasses.opClasses] 274type=MinorOpClass 275eventq_index=0 276opClass=IntAlu 277 278[system.cpu.executeFuncUnits.funcUnits0.timings] 279type=MinorFUTiming 280children=opClasses 281description=Int 282eventq_index=0 283extraAssumedLat=0 284extraCommitLat=0 285extraCommitLatExpr=Null 286mask=0 287match=0 288opClasses=system.cpu.executeFuncUnits.funcUnits0.timings.opClasses 289srcRegsRelativeLats=2 290suppress=false 291 292[system.cpu.executeFuncUnits.funcUnits0.timings.opClasses] 293type=MinorOpClassSet 294eventq_index=0 295opClasses= 296 297[system.cpu.executeFuncUnits.funcUnits1] 298type=MinorFU 299children=opClasses timings 300cantForwardFromFUIndices= 301eventq_index=0 302issueLat=1 303opClasses=system.cpu.executeFuncUnits.funcUnits1.opClasses 304opLat=3 305timings=system.cpu.executeFuncUnits.funcUnits1.timings 306 307[system.cpu.executeFuncUnits.funcUnits1.opClasses] 308type=MinorOpClassSet 309children=opClasses 310eventq_index=0 311opClasses=system.cpu.executeFuncUnits.funcUnits1.opClasses.opClasses 312 313[system.cpu.executeFuncUnits.funcUnits1.opClasses.opClasses] 314type=MinorOpClass 315eventq_index=0 316opClass=IntAlu 317 318[system.cpu.executeFuncUnits.funcUnits1.timings] 319type=MinorFUTiming 320children=opClasses 321description=Int 322eventq_index=0 323extraAssumedLat=0 324extraCommitLat=0 325extraCommitLatExpr=Null 326mask=0 327match=0 328opClasses=system.cpu.executeFuncUnits.funcUnits1.timings.opClasses 329srcRegsRelativeLats=2 330suppress=false 331 332[system.cpu.executeFuncUnits.funcUnits1.timings.opClasses] 333type=MinorOpClassSet 334eventq_index=0 335opClasses= 336 337[system.cpu.executeFuncUnits.funcUnits2] 338type=MinorFU 339children=opClasses timings 340cantForwardFromFUIndices= 341eventq_index=0 342issueLat=1 343opClasses=system.cpu.executeFuncUnits.funcUnits2.opClasses 344opLat=3 345timings=system.cpu.executeFuncUnits.funcUnits2.timings 346 347[system.cpu.executeFuncUnits.funcUnits2.opClasses] 348type=MinorOpClassSet 349children=opClasses 350eventq_index=0 351opClasses=system.cpu.executeFuncUnits.funcUnits2.opClasses.opClasses 352 353[system.cpu.executeFuncUnits.funcUnits2.opClasses.opClasses] 354type=MinorOpClass 355eventq_index=0 356opClass=IntMult 357 358[system.cpu.executeFuncUnits.funcUnits2.timings] 359type=MinorFUTiming 360children=opClasses 361description=Mul 362eventq_index=0 363extraAssumedLat=0 364extraCommitLat=0 365extraCommitLatExpr=Null 366mask=0 367match=0 368opClasses=system.cpu.executeFuncUnits.funcUnits2.timings.opClasses 369srcRegsRelativeLats=0 370suppress=false 371 372[system.cpu.executeFuncUnits.funcUnits2.timings.opClasses] 373type=MinorOpClassSet 374eventq_index=0 375opClasses= 376 377[system.cpu.executeFuncUnits.funcUnits3] 378type=MinorFU 379children=opClasses 380cantForwardFromFUIndices= 381eventq_index=0 382issueLat=9 383opClasses=system.cpu.executeFuncUnits.funcUnits3.opClasses 384opLat=9 385timings= 386 387[system.cpu.executeFuncUnits.funcUnits3.opClasses] 388type=MinorOpClassSet 389children=opClasses 390eventq_index=0 391opClasses=system.cpu.executeFuncUnits.funcUnits3.opClasses.opClasses 392 393[system.cpu.executeFuncUnits.funcUnits3.opClasses.opClasses] 394type=MinorOpClass 395eventq_index=0 396opClass=IntDiv 397 398[system.cpu.executeFuncUnits.funcUnits4] 399type=MinorFU 400children=opClasses timings 401cantForwardFromFUIndices= 402eventq_index=0 403issueLat=1 404opClasses=system.cpu.executeFuncUnits.funcUnits4.opClasses 405opLat=6 406timings=system.cpu.executeFuncUnits.funcUnits4.timings 407 408[system.cpu.executeFuncUnits.funcUnits4.opClasses] 409type=MinorOpClassSet 410children=opClasses00 opClasses01 opClasses02 opClasses03 opClasses04 opClasses05 opClasses06 opClasses07 opClasses08 opClasses09 opClasses10 opClasses11 opClasses12 opClasses13 opClasses14 opClasses15 opClasses16 opClasses17 opClasses18 opClasses19 opClasses20 opClasses21 opClasses22 opClasses23 opClasses24 opClasses25 opClasses26 opClasses27 411eventq_index=0 412opClasses=system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses00 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses01 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses02 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses03 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses04 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses05 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses06 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses07 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses08 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses09 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses10 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses11 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses12 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses13 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses14 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses15 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses16 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses17 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses18 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses19 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses20 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses21 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses22 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses23 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses24 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses25 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses26 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses27 413 414[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses00] 415type=MinorOpClass 416eventq_index=0 417opClass=FloatAdd 418 419[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses01] 420type=MinorOpClass 421eventq_index=0 422opClass=FloatCmp 423 424[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses02] 425type=MinorOpClass 426eventq_index=0 427opClass=FloatCvt 428 429[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses03] 430type=MinorOpClass 431eventq_index=0 432opClass=FloatMisc 433 434[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses04] 435type=MinorOpClass 436eventq_index=0 437opClass=FloatMult 438 439[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses05] 440type=MinorOpClass 441eventq_index=0 442opClass=FloatMultAcc 443 444[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses06] 445type=MinorOpClass 446eventq_index=0 447opClass=FloatDiv 448 449[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses07] 450type=MinorOpClass 451eventq_index=0 452opClass=FloatSqrt 453 454[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses08] 455type=MinorOpClass 456eventq_index=0 457opClass=SimdAdd 458 459[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses09] 460type=MinorOpClass 461eventq_index=0 462opClass=SimdAddAcc 463 464[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses10] 465type=MinorOpClass 466eventq_index=0 467opClass=SimdAlu 468 469[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses11] 470type=MinorOpClass 471eventq_index=0 472opClass=SimdCmp 473 474[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses12] 475type=MinorOpClass 476eventq_index=0 477opClass=SimdCvt 478 479[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses13] 480type=MinorOpClass 481eventq_index=0 482opClass=SimdMisc 483 484[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses14] 485type=MinorOpClass 486eventq_index=0 487opClass=SimdMult 488 489[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses15] 490type=MinorOpClass 491eventq_index=0 492opClass=SimdMultAcc 493 494[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses16] 495type=MinorOpClass 496eventq_index=0 497opClass=SimdShift 498 499[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses17] 500type=MinorOpClass 501eventq_index=0 502opClass=SimdShiftAcc 503 504[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses18] 505type=MinorOpClass 506eventq_index=0 507opClass=SimdSqrt 508 509[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses19] 510type=MinorOpClass 511eventq_index=0 512opClass=SimdFloatAdd 513 514[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses20] 515type=MinorOpClass 516eventq_index=0 517opClass=SimdFloatAlu 518 519[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses21] 520type=MinorOpClass 521eventq_index=0 522opClass=SimdFloatCmp 523 524[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses22] 525type=MinorOpClass 526eventq_index=0 527opClass=SimdFloatCvt 528 529[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses23] 530type=MinorOpClass 531eventq_index=0 532opClass=SimdFloatDiv 533 534[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses24] 535type=MinorOpClass 536eventq_index=0 537opClass=SimdFloatMisc 538 539[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses25] 540type=MinorOpClass 541eventq_index=0 542opClass=SimdFloatMult 543 544[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses26] 545type=MinorOpClass 546eventq_index=0 547opClass=SimdFloatMultAcc 548 549[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses27] 550type=MinorOpClass 551eventq_index=0 552opClass=SimdFloatSqrt 553 554[system.cpu.executeFuncUnits.funcUnits4.timings] 555type=MinorFUTiming 556children=opClasses 557description=FloatSimd 558eventq_index=0 559extraAssumedLat=0 560extraCommitLat=0 561extraCommitLatExpr=Null 562mask=0 563match=0 564opClasses=system.cpu.executeFuncUnits.funcUnits4.timings.opClasses 565srcRegsRelativeLats=2 566suppress=false 567 568[system.cpu.executeFuncUnits.funcUnits4.timings.opClasses] 569type=MinorOpClassSet 570eventq_index=0 571opClasses= 572 573[system.cpu.executeFuncUnits.funcUnits5] 574type=MinorFU 575children=opClasses timings 576cantForwardFromFUIndices= 577eventq_index=0 578issueLat=1 579opClasses=system.cpu.executeFuncUnits.funcUnits5.opClasses 580opLat=1 581timings=system.cpu.executeFuncUnits.funcUnits5.timings 582 583[system.cpu.executeFuncUnits.funcUnits5.opClasses] 584type=MinorOpClassSet 585children=opClasses0 opClasses1 opClasses2 opClasses3 586eventq_index=0 587opClasses=system.cpu.executeFuncUnits.funcUnits5.opClasses.opClasses0 system.cpu.executeFuncUnits.funcUnits5.opClasses.opClasses1 system.cpu.executeFuncUnits.funcUnits5.opClasses.opClasses2 system.cpu.executeFuncUnits.funcUnits5.opClasses.opClasses3 588 589[system.cpu.executeFuncUnits.funcUnits5.opClasses.opClasses0] 590type=MinorOpClass 591eventq_index=0 592opClass=MemRead 593 594[system.cpu.executeFuncUnits.funcUnits5.opClasses.opClasses1] 595type=MinorOpClass 596eventq_index=0 597opClass=MemWrite 598 599[system.cpu.executeFuncUnits.funcUnits5.opClasses.opClasses2] 600type=MinorOpClass 601eventq_index=0 602opClass=FloatMemRead 603 604[system.cpu.executeFuncUnits.funcUnits5.opClasses.opClasses3] 605type=MinorOpClass 606eventq_index=0 607opClass=FloatMemWrite 608 609[system.cpu.executeFuncUnits.funcUnits5.timings] 610type=MinorFUTiming 611children=opClasses 612description=Mem 613eventq_index=0 614extraAssumedLat=2 615extraCommitLat=0 616extraCommitLatExpr=Null 617mask=0 618match=0 619opClasses=system.cpu.executeFuncUnits.funcUnits5.timings.opClasses 620srcRegsRelativeLats=1 621suppress=false 622 623[system.cpu.executeFuncUnits.funcUnits5.timings.opClasses] 624type=MinorOpClassSet 625eventq_index=0 626opClasses= 627 628[system.cpu.executeFuncUnits.funcUnits6] 629type=MinorFU 630children=opClasses 631cantForwardFromFUIndices= 632eventq_index=0 633issueLat=1 634opClasses=system.cpu.executeFuncUnits.funcUnits6.opClasses 635opLat=1 636timings= 637 638[system.cpu.executeFuncUnits.funcUnits6.opClasses] 639type=MinorOpClassSet 640children=opClasses0 opClasses1 641eventq_index=0 642opClasses=system.cpu.executeFuncUnits.funcUnits6.opClasses.opClasses0 system.cpu.executeFuncUnits.funcUnits6.opClasses.opClasses1 643 644[system.cpu.executeFuncUnits.funcUnits6.opClasses.opClasses0] 645type=MinorOpClass 646eventq_index=0 647opClass=IprAccess 648 649[system.cpu.executeFuncUnits.funcUnits6.opClasses.opClasses1] 650type=MinorOpClass 651eventq_index=0 652opClass=InstPrefetch 653 654[system.cpu.icache] 655type=Cache 656children=tags 657addr_ranges=0:18446744073709551615:0:0:0:0 658assoc=2 659clk_domain=system.cpu_clk_domain 660clusivity=mostly_incl 661data_latency=2 662default_p_state=UNDEFINED 663demand_mshr_reserve=1 664eventq_index=0 665is_read_only=true 666max_miss_count=0 667mshrs=4 668p_state_clk_gate_bins=20 669p_state_clk_gate_max=1000000000000 670p_state_clk_gate_min=1000 671power_model=Null 672prefetch_on_access=false 673prefetcher=Null 674response_latency=2 675sequential_access=false 676size=131072 677system=system 678tag_latency=2 679tags=system.cpu.icache.tags 680tgts_per_mshr=20 681write_buffers=8 682writeback_clean=true 683cpu_side=system.cpu.icache_port 684mem_side=system.cpu.toL2Bus.slave[0] 685 686[system.cpu.icache.tags] 687type=LRU 688assoc=2 689block_size=64 690clk_domain=system.cpu_clk_domain 691data_latency=2 692default_p_state=UNDEFINED 693eventq_index=0 694p_state_clk_gate_bins=20 695p_state_clk_gate_max=1000000000000 696p_state_clk_gate_min=1000 697power_model=Null 698sequential_access=false 699size=131072 700tag_latency=2 701 702[system.cpu.interrupts] 703type=ArmInterrupts 704eventq_index=0 705 706[system.cpu.isa] 707type=ArmISA 708decoderFlavour=Generic 709eventq_index=0 710fpsid=1090793632 711id_aa64afr0_el1=0 712id_aa64afr1_el1=0 713id_aa64dfr0_el1=1052678 714id_aa64dfr1_el1=0 715id_aa64isar0_el1=0 716id_aa64isar1_el1=0 717id_aa64mmfr0_el1=15728642 718id_aa64mmfr1_el1=0 719id_isar0=34607377 720id_isar1=34677009 721id_isar2=555950401 722id_isar3=17899825 723id_isar4=268501314 724id_isar5=0 725id_mmfr0=270536963 726id_mmfr1=0 727id_mmfr2=19070976 728id_mmfr3=34611729 729midr=1091551472 730pmu=Null 731system=system 732 733[system.cpu.istage2_mmu] 734type=ArmStage2MMU 735children=stage2_tlb 736eventq_index=0 737stage2_tlb=system.cpu.istage2_mmu.stage2_tlb 738sys=system 739tlb=system.cpu.itb 740 741[system.cpu.istage2_mmu.stage2_tlb] 742type=ArmTLB 743children=walker 744eventq_index=0 745is_stage2=true 746size=32 747walker=system.cpu.istage2_mmu.stage2_tlb.walker 748 749[system.cpu.istage2_mmu.stage2_tlb.walker] 750type=ArmTableWalker 751clk_domain=system.cpu_clk_domain 752default_p_state=UNDEFINED 753eventq_index=0 754is_stage2=true 755num_squash_per_cycle=2 756p_state_clk_gate_bins=20 757p_state_clk_gate_max=1000000000000 758p_state_clk_gate_min=1000 759power_model=Null 760sys=system 761 762[system.cpu.itb] 763type=ArmTLB 764children=walker 765eventq_index=0 766is_stage2=false 767size=64 768walker=system.cpu.itb.walker 769 770[system.cpu.itb.walker] 771type=ArmTableWalker 772clk_domain=system.cpu_clk_domain 773default_p_state=UNDEFINED 774eventq_index=0 775is_stage2=false 776num_squash_per_cycle=2 777p_state_clk_gate_bins=20 778p_state_clk_gate_max=1000000000000 779p_state_clk_gate_min=1000 780power_model=Null 781sys=system 782port=system.cpu.toL2Bus.slave[2] 783 784[system.cpu.l2cache] 785type=Cache 786children=tags 787addr_ranges=0:18446744073709551615:0:0:0:0 788assoc=8 789clk_domain=system.cpu_clk_domain 790clusivity=mostly_incl 791data_latency=20 792default_p_state=UNDEFINED 793demand_mshr_reserve=1 794eventq_index=0 795is_read_only=false 796max_miss_count=0 797mshrs=20 798p_state_clk_gate_bins=20 799p_state_clk_gate_max=1000000000000 800p_state_clk_gate_min=1000 801power_model=Null 802prefetch_on_access=false 803prefetcher=Null 804response_latency=20 805sequential_access=false 806size=2097152 807system=system 808tag_latency=20 809tags=system.cpu.l2cache.tags 810tgts_per_mshr=12 811write_buffers=8 812writeback_clean=false 813cpu_side=system.cpu.toL2Bus.master[0] 814mem_side=system.membus.slave[1] 815 816[system.cpu.l2cache.tags] 817type=LRU 818assoc=8 819block_size=64 820clk_domain=system.cpu_clk_domain 821data_latency=20 822default_p_state=UNDEFINED 823eventq_index=0 824p_state_clk_gate_bins=20 825p_state_clk_gate_max=1000000000000 826p_state_clk_gate_min=1000 827power_model=Null 828sequential_access=false 829size=2097152 830tag_latency=20 831 832[system.cpu.toL2Bus] 833type=CoherentXBar 834children=snoop_filter 835clk_domain=system.cpu_clk_domain 836default_p_state=UNDEFINED 837eventq_index=0 838forward_latency=0 839frontend_latency=1 840p_state_clk_gate_bins=20 841p_state_clk_gate_max=1000000000000 842p_state_clk_gate_min=1000 843point_of_coherency=false 844power_model=Null 845response_latency=1 846snoop_filter=system.cpu.toL2Bus.snoop_filter 847snoop_response_latency=1 848system=system 849use_default_range=false 850width=32 851master=system.cpu.l2cache.cpu_side 852slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port 853 854[system.cpu.toL2Bus.snoop_filter] 855type=SnoopFilter 856eventq_index=0 857lookup_latency=0 858max_capacity=8388608 859system=system 860 861[system.cpu.tracer] 862type=ExeTracer 863eventq_index=0 864 865[system.cpu.workload] 866type=Process 867cmd=hello 868cwd= 869drivers= 870egid=100 871env= 872errout=cerr 873euid=100 874eventq_index=0 875executable=/usr/local/google/home/gabeblack/gem5/dist/m5/regression/test-progs/hello/bin/arm/linux/hello 876gid=100 877input=cin 878kvmInSE=false 879maxStackSize=67108864 880output=cout 881pgid=100 882pid=100 883ppid=0 884simpoint=0 885system=system 886uid=100 887useArchPT=false 888 889[system.cpu_clk_domain] 890type=SrcClockDomain 891clock=500 892domain_id=-1 893eventq_index=0 894init_perf_level=0 895voltage_domain=system.voltage_domain 896 897[system.dvfs_handler] 898type=DVFSHandler 899domains= 900enable=false 901eventq_index=0 902sys_clk_domain=system.clk_domain 903transition_latency=100000000 904 905[system.membus] 906type=CoherentXBar 907children=snoop_filter 908clk_domain=system.clk_domain 909default_p_state=UNDEFINED 910eventq_index=0 911forward_latency=4 912frontend_latency=3 913p_state_clk_gate_bins=20 914p_state_clk_gate_max=1000000000000 915p_state_clk_gate_min=1000 916point_of_coherency=true 917power_model=Null 918response_latency=2 919snoop_filter=system.membus.snoop_filter 920snoop_response_latency=4 921system=system 922use_default_range=false 923width=16 924master=system.physmem.port 925slave=system.system_port system.cpu.l2cache.mem_side 926 927[system.membus.snoop_filter] 928type=SnoopFilter 929eventq_index=0 930lookup_latency=1 931max_capacity=8388608 932system=system 933 934[system.physmem] 935type=DRAMCtrl 936IDD0=0.055000 937IDD02=0.000000 938IDD2N=0.032000 939IDD2N2=0.000000 940IDD2P0=0.000000 941IDD2P02=0.000000 942IDD2P1=0.032000 943IDD2P12=0.000000 944IDD3N=0.038000 945IDD3N2=0.000000 946IDD3P0=0.000000 947IDD3P02=0.000000 948IDD3P1=0.038000 949IDD3P12=0.000000 950IDD4R=0.157000 951IDD4R2=0.000000 952IDD4W=0.125000 953IDD4W2=0.000000 954IDD5=0.235000 955IDD52=0.000000 956IDD6=0.020000 957IDD62=0.000000 958VDD=1.500000 959VDD2=0.000000 960activation_limit=4 961addr_mapping=RoRaBaCoCh 962bank_groups_per_rank=0 963banks_per_rank=8 964burst_length=8 965channels=1 966clk_domain=system.clk_domain 967conf_table_reported=true 968default_p_state=UNDEFINED 969device_bus_width=8 970device_rowbuffer_size=1024 971device_size=536870912 972devices_per_rank=8 973dll=true 974eventq_index=0 975in_addr_map=true 976kvm_map=true 977max_accesses_per_row=16 978mem_sched_policy=frfcfs 979min_writes_per_switch=16 980null=false 981p_state_clk_gate_bins=20 982p_state_clk_gate_max=1000000000000 983p_state_clk_gate_min=1000 984page_policy=open_adaptive 985power_model=Null 986range=0:134217727:0:0:0:0 987ranks_per_channel=2 988read_buffer_size=32 989static_backend_latency=10000 990static_frontend_latency=10000 991tBURST=5000 992tCCD_L=0 993tCK=1250 994tCL=13750 995tCS=2500 996tRAS=35000 997tRCD=13750 998tREFI=7800000 999tRFC=260000 1000tRP=13750 1001tRRD=6000 1002tRRD_L=0 1003tRTP=7500 1004tRTW=2500 1005tWR=15000 1006tWTR=7500 1007tXAW=30000 1008tXP=6000 1009tXPDLL=0 1010tXS=270000 1011tXSDLL=0 1012write_buffer_size=64 1013write_high_thresh_perc=85 1014write_low_thresh_perc=50 1015port=system.membus.master[0] 1016 1017[system.voltage_domain] 1018type=VoltageDomain 1019eventq_index=0 1020voltage=1.000000 1021 1022