stats.txt revision 9698
16167SN/A 26167SN/A---------- Begin Simulation Statistics ---------- 39183Shestness@cs.wisc.edusim_seconds 0.000144 # Number of seconds simulated 49183Shestness@cs.wisc.edusim_ticks 143853 # Number of ticks simulated 59183Shestness@cs.wisc.edufinal_tick 143853 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) 68721SN/Asim_freq 1000000000 # Frequency of simulated ticks 79698Snilay@cs.wisc.eduhost_inst_rate 31570 # Simulator instruction rate (inst/s) 89698Snilay@cs.wisc.eduhost_op_rate 31567 # Simulator op (including micro ops) rate (op/s) 99698Snilay@cs.wisc.eduhost_tick_rate 710572 # Simulator tick rate (ticks/s) 109698Snilay@cs.wisc.eduhost_mem_usage 153096 # Number of bytes of host memory used 119698Snilay@cs.wisc.eduhost_seconds 0.20 # Real time elapsed on the host 129150SAli.Saidi@ARM.comsim_insts 6390 # Number of instructions simulated 139150SAli.Saidi@ARM.comsim_ops 6390 # Number of ops (including micro ops) simulated 149698Snilay@cs.wisc.edusystem.ruby.l1_cntrl0.cacheMemory.demand_hits 6718 # Number of cache demand hits 159698Snilay@cs.wisc.edusystem.ruby.l1_cntrl0.cacheMemory.demand_misses 1730 # Number of cache demand misses 169698Snilay@cs.wisc.edusystem.ruby.l1_cntrl0.cacheMemory.demand_accesses 8448 # Number of cache demand accesses 178721SN/Asystem.cpu.dtb.fetch_hits 0 # ITB hits 188721SN/Asystem.cpu.dtb.fetch_misses 0 # ITB misses 198721SN/Asystem.cpu.dtb.fetch_acv 0 # ITB acv 208721SN/Asystem.cpu.dtb.fetch_accesses 0 # ITB accesses 219150SAli.Saidi@ARM.comsystem.cpu.dtb.read_hits 1183 # DTB read hits 228721SN/Asystem.cpu.dtb.read_misses 7 # DTB read misses 238721SN/Asystem.cpu.dtb.read_acv 0 # DTB read access violations 249150SAli.Saidi@ARM.comsystem.cpu.dtb.read_accesses 1190 # DTB read accesses 258721SN/Asystem.cpu.dtb.write_hits 865 # DTB write hits 268721SN/Asystem.cpu.dtb.write_misses 3 # DTB write misses 278721SN/Asystem.cpu.dtb.write_acv 0 # DTB write access violations 288721SN/Asystem.cpu.dtb.write_accesses 868 # DTB write accesses 299150SAli.Saidi@ARM.comsystem.cpu.dtb.data_hits 2048 # DTB hits 306167SN/Asystem.cpu.dtb.data_misses 10 # DTB misses 318721SN/Asystem.cpu.dtb.data_acv 0 # DTB access violations 329150SAli.Saidi@ARM.comsystem.cpu.dtb.data_accesses 2058 # DTB accesses 339150SAli.Saidi@ARM.comsystem.cpu.itb.fetch_hits 6401 # ITB hits 348721SN/Asystem.cpu.itb.fetch_misses 17 # ITB misses 358721SN/Asystem.cpu.itb.fetch_acv 0 # ITB acv 369150SAli.Saidi@ARM.comsystem.cpu.itb.fetch_accesses 6418 # ITB accesses 378721SN/Asystem.cpu.itb.read_hits 0 # DTB read hits 388721SN/Asystem.cpu.itb.read_misses 0 # DTB read misses 398721SN/Asystem.cpu.itb.read_acv 0 # DTB read access violations 408721SN/Asystem.cpu.itb.read_accesses 0 # DTB read accesses 418721SN/Asystem.cpu.itb.write_hits 0 # DTB write hits 428721SN/Asystem.cpu.itb.write_misses 0 # DTB write misses 438721SN/Asystem.cpu.itb.write_acv 0 # DTB write access violations 448721SN/Asystem.cpu.itb.write_accesses 0 # DTB write accesses 456167SN/Asystem.cpu.itb.data_hits 0 # DTB hits 466167SN/Asystem.cpu.itb.data_misses 0 # DTB misses 478721SN/Asystem.cpu.itb.data_acv 0 # DTB access violations 488721SN/Asystem.cpu.itb.data_accesses 0 # DTB accesses 498721SN/Asystem.cpu.workload.num_syscalls 17 # Number of system calls 509183Shestness@cs.wisc.edusystem.cpu.numCycles 143853 # number of cpu cycles simulated 518721SN/Asystem.cpu.numWorkItemsStarted 0 # number of work items this cpu started 527935SN/Asystem.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed 539150SAli.Saidi@ARM.comsystem.cpu.committedInsts 6390 # Number of instructions committed 549150SAli.Saidi@ARM.comsystem.cpu.committedOps 6390 # Number of ops (including micro ops) committed 559150SAli.Saidi@ARM.comsystem.cpu.num_int_alu_accesses 6317 # Number of integer alu accesses 568721SN/Asystem.cpu.num_fp_alu_accesses 10 # Number of float alu accesses 578721SN/Asystem.cpu.num_func_calls 251 # number of times a function call or return occured 589150SAli.Saidi@ARM.comsystem.cpu.num_conditional_control_insts 749 # number of instructions that are conditional controls 599150SAli.Saidi@ARM.comsystem.cpu.num_int_insts 6317 # number of integer instructions 607935SN/Asystem.cpu.num_fp_insts 10 # number of float instructions 619150SAli.Saidi@ARM.comsystem.cpu.num_int_register_reads 8285 # number of times the integer registers were read 629150SAli.Saidi@ARM.comsystem.cpu.num_int_register_writes 4568 # number of times the integer registers were written 637935SN/Asystem.cpu.num_fp_register_reads 8 # number of times the floating registers were read 647935SN/Asystem.cpu.num_fp_register_writes 2 # number of times the floating registers were written 659150SAli.Saidi@ARM.comsystem.cpu.num_mem_refs 2058 # number of memory refs 669150SAli.Saidi@ARM.comsystem.cpu.num_load_insts 1190 # Number of load instructions 678721SN/Asystem.cpu.num_store_insts 868 # Number of store instructions 687935SN/Asystem.cpu.num_idle_cycles 0 # Number of idle cycles 699183Shestness@cs.wisc.edusystem.cpu.num_busy_cycles 143853 # Number of busy cycles 708721SN/Asystem.cpu.not_idle_fraction 1 # Percentage of non-idle cycles 718721SN/Asystem.cpu.idle_fraction 0 # Percentage of idle cycles 726167SN/A 736167SN/A---------- End Simulation Statistics ---------- 74