1
2---------- Begin Simulation Statistics ----------
3sim_seconds                                  0.201717                      
4sim_ticks                                201717314000                      
5final_tick                               201717314000                      
6sim_freq                                 1000000000000                      
7host_inst_rate                                 634159                      
8host_op_rate                                   761378                      
9host_tick_rate                              468510100                      
10host_mem_usage                                 279924                      
11host_seconds                                   430.55                      
12sim_insts                                   273037595                      
13sim_ops                                     327811950                      
14system.voltage_domain.voltage                       1                      
15system.clk_domain.clock                          1000                      
16system.physmem.pwrStateResidencyTicks::UNDEFINED 201717314000                      
17system.physmem.bytes_read::cpu.inst        1394641096                      
18system.physmem.bytes_read::cpu.data         480709216                      
19system.physmem.bytes_read::total           1875350312                      
20system.physmem.bytes_inst_read::cpu.inst   1394641096                      
21system.physmem.bytes_inst_read::total      1394641096                      
22system.physmem.bytes_written::cpu.data      400047763                      
23system.physmem.bytes_written::total         400047763                      
24system.physmem.num_reads::cpu.inst          348660274                      
25system.physmem.num_reads::cpu.data           86300511                      
26system.physmem.num_reads::total             434960785                      
27system.physmem.num_writes::cpu.data          82063567                      
28system.physmem.num_writes::total             82063567                      
29system.physmem.bw_read::cpu.inst           6913839315                      
30system.physmem.bw_read::cpu.data           2383083566                      
31system.physmem.bw_read::total              9296922881                      
32system.physmem.bw_inst_read::cpu.inst      6913839315                      
33system.physmem.bw_inst_read::total         6913839315                      
34system.physmem.bw_write::cpu.data          1983209845                      
35system.physmem.bw_write::total             1983209845                      
36system.physmem.bw_total::cpu.inst          6913839315                      
37system.physmem.bw_total::cpu.data          4366293411                      
38system.physmem.bw_total::total            11280132726                      
39system.pwrStateResidencyTicks::UNDEFINED 201717314000                      
40system.cpu_clk_domain.clock                       500                      
41system.cpu.dstage2_mmu.stage2_tlb.walker.pwrStateResidencyTicks::UNDEFINED 201717314000                      
42system.cpu.dstage2_mmu.stage2_tlb.walker.walks            0                      
43system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::Data            0                      
44system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::Inst            0                      
45system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::total            0                      
46system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Completed::Data            0                      
47system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Completed::Inst            0                      
48system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Completed::total            0                      
49system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin::total            0                      
50system.cpu.dstage2_mmu.stage2_tlb.inst_hits            0                      
51system.cpu.dstage2_mmu.stage2_tlb.inst_misses            0                      
52system.cpu.dstage2_mmu.stage2_tlb.read_hits            0                      
53system.cpu.dstage2_mmu.stage2_tlb.read_misses            0                      
54system.cpu.dstage2_mmu.stage2_tlb.write_hits            0                      
55system.cpu.dstage2_mmu.stage2_tlb.write_misses            0                      
56system.cpu.dstage2_mmu.stage2_tlb.flush_tlb            0                      
57system.cpu.dstage2_mmu.stage2_tlb.flush_tlb_mva            0                      
58system.cpu.dstage2_mmu.stage2_tlb.flush_tlb_mva_asid            0                      
59system.cpu.dstage2_mmu.stage2_tlb.flush_tlb_asid            0                      
60system.cpu.dstage2_mmu.stage2_tlb.flush_entries            0                      
61system.cpu.dstage2_mmu.stage2_tlb.align_faults            0                      
62system.cpu.dstage2_mmu.stage2_tlb.prefetch_faults            0                      
63system.cpu.dstage2_mmu.stage2_tlb.domain_faults            0                      
64system.cpu.dstage2_mmu.stage2_tlb.perms_faults            0                      
65system.cpu.dstage2_mmu.stage2_tlb.read_accesses            0                      
66system.cpu.dstage2_mmu.stage2_tlb.write_accesses            0                      
67system.cpu.dstage2_mmu.stage2_tlb.inst_accesses            0                      
68system.cpu.dstage2_mmu.stage2_tlb.hits              0                      
69system.cpu.dstage2_mmu.stage2_tlb.misses            0                      
70system.cpu.dstage2_mmu.stage2_tlb.accesses            0                      
71system.cpu.dtb.walker.pwrStateResidencyTicks::UNDEFINED 201717314000                      
72system.cpu.dtb.walker.walks                         0                      
73system.cpu.dtb.walker.walkRequestOrigin_Requested::Data            0                      
74system.cpu.dtb.walker.walkRequestOrigin_Requested::Inst            0                      
75system.cpu.dtb.walker.walkRequestOrigin_Requested::total            0                      
76system.cpu.dtb.walker.walkRequestOrigin_Completed::Data            0                      
77system.cpu.dtb.walker.walkRequestOrigin_Completed::Inst            0                      
78system.cpu.dtb.walker.walkRequestOrigin_Completed::total            0                      
79system.cpu.dtb.walker.walkRequestOrigin::total            0                      
80system.cpu.dtb.inst_hits                            0                      
81system.cpu.dtb.inst_misses                          0                      
82system.cpu.dtb.read_hits                            0                      
83system.cpu.dtb.read_misses                          0                      
84system.cpu.dtb.write_hits                           0                      
85system.cpu.dtb.write_misses                         0                      
86system.cpu.dtb.flush_tlb                            0                      
87system.cpu.dtb.flush_tlb_mva                        0                      
88system.cpu.dtb.flush_tlb_mva_asid                   0                      
89system.cpu.dtb.flush_tlb_asid                       0                      
90system.cpu.dtb.flush_entries                        0                      
91system.cpu.dtb.align_faults                         0                      
92system.cpu.dtb.prefetch_faults                      0                      
93system.cpu.dtb.domain_faults                        0                      
94system.cpu.dtb.perms_faults                         0                      
95system.cpu.dtb.read_accesses                        0                      
96system.cpu.dtb.write_accesses                       0                      
97system.cpu.dtb.inst_accesses                        0                      
98system.cpu.dtb.hits                                 0                      
99system.cpu.dtb.misses                               0                      
100system.cpu.dtb.accesses                             0                      
101system.cpu.istage2_mmu.stage2_tlb.walker.pwrStateResidencyTicks::UNDEFINED 201717314000                      
102system.cpu.istage2_mmu.stage2_tlb.walker.walks            0                      
103system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::Data            0                      
104system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::Inst            0                      
105system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::total            0                      
106system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Completed::Data            0                      
107system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Completed::Inst            0                      
108system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Completed::total            0                      
109system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin::total            0                      
110system.cpu.istage2_mmu.stage2_tlb.inst_hits            0                      
111system.cpu.istage2_mmu.stage2_tlb.inst_misses            0                      
112system.cpu.istage2_mmu.stage2_tlb.read_hits            0                      
113system.cpu.istage2_mmu.stage2_tlb.read_misses            0                      
114system.cpu.istage2_mmu.stage2_tlb.write_hits            0                      
115system.cpu.istage2_mmu.stage2_tlb.write_misses            0                      
116system.cpu.istage2_mmu.stage2_tlb.flush_tlb            0                      
117system.cpu.istage2_mmu.stage2_tlb.flush_tlb_mva            0                      
118system.cpu.istage2_mmu.stage2_tlb.flush_tlb_mva_asid            0                      
119system.cpu.istage2_mmu.stage2_tlb.flush_tlb_asid            0                      
120system.cpu.istage2_mmu.stage2_tlb.flush_entries            0                      
121system.cpu.istage2_mmu.stage2_tlb.align_faults            0                      
122system.cpu.istage2_mmu.stage2_tlb.prefetch_faults            0                      
123system.cpu.istage2_mmu.stage2_tlb.domain_faults            0                      
124system.cpu.istage2_mmu.stage2_tlb.perms_faults            0                      
125system.cpu.istage2_mmu.stage2_tlb.read_accesses            0                      
126system.cpu.istage2_mmu.stage2_tlb.write_accesses            0                      
127system.cpu.istage2_mmu.stage2_tlb.inst_accesses            0                      
128system.cpu.istage2_mmu.stage2_tlb.hits              0                      
129system.cpu.istage2_mmu.stage2_tlb.misses            0                      
130system.cpu.istage2_mmu.stage2_tlb.accesses            0                      
131system.cpu.itb.walker.pwrStateResidencyTicks::UNDEFINED 201717314000                      
132system.cpu.itb.walker.walks                         0                      
133system.cpu.itb.walker.walkRequestOrigin_Requested::Data            0                      
134system.cpu.itb.walker.walkRequestOrigin_Requested::Inst            0                      
135system.cpu.itb.walker.walkRequestOrigin_Requested::total            0                      
136system.cpu.itb.walker.walkRequestOrigin_Completed::Data            0                      
137system.cpu.itb.walker.walkRequestOrigin_Completed::Inst            0                      
138system.cpu.itb.walker.walkRequestOrigin_Completed::total            0                      
139system.cpu.itb.walker.walkRequestOrigin::total            0                      
140system.cpu.itb.inst_hits                            0                      
141system.cpu.itb.inst_misses                          0                      
142system.cpu.itb.read_hits                            0                      
143system.cpu.itb.read_misses                          0                      
144system.cpu.itb.write_hits                           0                      
145system.cpu.itb.write_misses                         0                      
146system.cpu.itb.flush_tlb                            0                      
147system.cpu.itb.flush_tlb_mva                        0                      
148system.cpu.itb.flush_tlb_mva_asid                   0                      
149system.cpu.itb.flush_tlb_asid                       0                      
150system.cpu.itb.flush_entries                        0                      
151system.cpu.itb.align_faults                         0                      
152system.cpu.itb.prefetch_faults                      0                      
153system.cpu.itb.domain_faults                        0                      
154system.cpu.itb.perms_faults                         0                      
155system.cpu.itb.read_accesses                        0                      
156system.cpu.itb.write_accesses                       0                      
157system.cpu.itb.inst_accesses                        0                      
158system.cpu.itb.hits                                 0                      
159system.cpu.itb.misses                               0                      
160system.cpu.itb.accesses                             0                      
161system.cpu.workload.numSyscalls                   191                      
162system.cpu.pwrStateResidencyTicks::ON    201717314000                      
163system.cpu.numCycles                        403434629                      
164system.cpu.numWorkItemsStarted                      0                      
165system.cpu.numWorkItemsCompleted                    0                      
166system.cpu.committedInsts                   273037595                      
167system.cpu.committedOps                     327811950                      
168system.cpu.num_int_alu_accesses             258331481                      
169system.cpu.num_fp_alu_accesses              114216705                      
170system.cpu.num_func_calls                    12448615                      
171system.cpu.num_conditional_control_insts     15799338                      
172system.cpu.num_int_insts                    258331481                      
173system.cpu.num_fp_insts                     114216705                      
174system.cpu.num_int_register_reads           938030601                      
175system.cpu.num_int_register_writes          162499657                      
176system.cpu.num_fp_register_reads            180262959                      
177system.cpu.num_fp_register_writes           126152315                      
178system.cpu.num_cc_register_reads            985884626                      
179system.cpu.num_cc_register_writes            76361749                      
180system.cpu.num_mem_refs                     168107829                      
181system.cpu.num_load_insts                    85732235                      
182system.cpu.num_store_insts                   82375594                      
183system.cpu.num_idle_cycles                          0                      
184system.cpu.num_busy_cycles                  403434629                      
185system.cpu.not_idle_fraction                        1                      
186system.cpu.idle_fraction                            0                      
187system.cpu.Branches                          30563491                      
188system.cpu.op_class::No_OpClass                     0      0.00%      0.00%
189system.cpu.op_class::IntAlu                 104312493     31.82%     31.82%
190system.cpu.op_class::IntMult                  2145905      0.65%     32.48%
191system.cpu.op_class::IntDiv                         0      0.00%     32.48%
192system.cpu.op_class::FloatAdd                       0      0.00%     32.48%
193system.cpu.op_class::FloatCmp                       0      0.00%     32.48%
194system.cpu.op_class::FloatCvt                       0      0.00%     32.48%
195system.cpu.op_class::FloatMult                      0      0.00%     32.48%
196system.cpu.op_class::FloatMultAcc                   0      0.00%     32.48%
197system.cpu.op_class::FloatDiv                       0      0.00%     32.48%
198system.cpu.op_class::FloatMisc                      0      0.00%     32.48%
199system.cpu.op_class::FloatSqrt                      0      0.00%     32.48%
200system.cpu.op_class::SimdAdd                        0      0.00%     32.48%
201system.cpu.op_class::SimdAddAcc                     0      0.00%     32.48%
202system.cpu.op_class::SimdAlu                        0      0.00%     32.48%
203system.cpu.op_class::SimdCmp                        0      0.00%     32.48%
204system.cpu.op_class::SimdCvt                        0      0.00%     32.48%
205system.cpu.op_class::SimdMisc                       0      0.00%     32.48%
206system.cpu.op_class::SimdMult                       0      0.00%     32.48%
207system.cpu.op_class::SimdMultAcc                    0      0.00%     32.48%
208system.cpu.op_class::SimdShift                      0      0.00%     32.48%
209system.cpu.op_class::SimdShiftAcc                   0      0.00%     32.48%
210system.cpu.op_class::SimdSqrt                       0      0.00%     32.48%
211system.cpu.op_class::SimdFloatAdd             6594343      2.01%     34.49%
212system.cpu.op_class::SimdFloatAlu                   0      0.00%     34.49%
213system.cpu.op_class::SimdFloatCmp             7943502      2.42%     36.91%
214system.cpu.op_class::SimdFloatCvt             3118180      0.95%     37.86%
215system.cpu.op_class::SimdFloatDiv             1563217      0.48%     38.34%
216system.cpu.op_class::SimdFloatMisc           19652356      6.00%     44.33%
217system.cpu.op_class::SimdFloatMult            7136937      2.18%     46.51%
218system.cpu.op_class::SimdFloatMultAcc         7062098      2.15%     48.66%
219system.cpu.op_class::SimdFloatSqrt             175285      0.05%     48.72%
220system.cpu.op_class::MemRead                 44185161     13.48%     62.20%
221system.cpu.op_class::MemWrite                55008376     16.78%     78.98%
222system.cpu.op_class::FloatMemRead            41547074     12.67%     91.65%
223system.cpu.op_class::FloatMemWrite           27367218      8.35%    100.00%
224system.cpu.op_class::IprAccess                      0      0.00%    100.00%
225system.cpu.op_class::InstPrefetch                   0      0.00%    100.00%
226system.cpu.op_class::total                  327812145                      
227system.membus.snoop_filter.tot_requests             0                      
228system.membus.snoop_filter.hit_single_requests            0                      
229system.membus.snoop_filter.hit_multi_requests            0                      
230system.membus.snoop_filter.tot_snoops               0                      
231system.membus.snoop_filter.hit_single_snoops            0                      
232system.membus.snoop_filter.hit_multi_snoops            0                      
233system.membus.pwrStateResidencyTicks::UNDEFINED 201717314000                      
234system.membus.trans_dist::ReadReq           434895828                      
235system.membus.trans_dist::ReadResp          434906723                      
236system.membus.trans_dist::WriteReq           82052672                      
237system.membus.trans_dist::WriteResp          82052672                      
238system.membus.trans_dist::SoftPFReq             54062                      
239system.membus.trans_dist::SoftPFResp            54062                      
240system.membus.trans_dist::LoadLockedReq         10895                      
241system.membus.trans_dist::StoreCondReq          10895                      
242system.membus.trans_dist::StoreCondResp         10895                      
243system.membus.pkt_count_system.cpu.icache_port::system.physmem.port    697320548                      
244system.membus.pkt_count_system.cpu.dcache_port::system.physmem.port    336728156                      
245system.membus.pkt_count::total             1034048704                      
246system.membus.pkt_size_system.cpu.icache_port::system.physmem.port   1394641096                      
247system.membus.pkt_size_system.cpu.dcache_port::system.physmem.port    880756979                      
248system.membus.pkt_size::total              2275398075                      
249system.membus.snoops                                0                      
250system.membus.snoopTraffic                          0                      
251system.membus.snoop_fanout::samples         517024352                      
252system.membus.snoop_fanout::mean                    0                      
253system.membus.snoop_fanout::stdev                   0                      
254system.membus.snoop_fanout::underflows              0      0.00%      0.00%
255system.membus.snoop_fanout::0               517024352    100.00%    100.00%
256system.membus.snoop_fanout::1                       0      0.00%    100.00%
257system.membus.snoop_fanout::overflows               0      0.00%    100.00%
258system.membus.snoop_fanout::min_value               0                      
259system.membus.snoop_fanout::max_value               0                      
260system.membus.snoop_fanout::total           517024352                      
261
262---------- End Simulation Statistics   ----------
263