config.ini revision 9213
17893SN/A[root]
27893SN/Atype=Root
37893SN/Achildren=system
48825Snilay@cs.wisc.edufull_system=false
57893SN/Atime_sync_enable=false
67893SN/Atime_sync_period=100000000000
77893SN/Atime_sync_spin_threshold=100000000
87893SN/A
97893SN/A[system]
107893SN/Atype=System
117893SN/Achildren=cpu membus physmem
128825Snilay@cs.wisc.eduboot_osflags=a
139213Snilay@cs.wisc.educlock=1
148825Snilay@cs.wisc.eduinit_param=0
158825Snilay@cs.wisc.edukernel=
168825Snilay@cs.wisc.eduload_addr_mask=1099511627775
177893SN/Amem_mode=atomic
188464SN/Amemories=system.physmem
198721SN/Anum_work_ids=16
208825Snilay@cs.wisc.edureadfile=
218825Snilay@cs.wisc.edusymbolfile=
227935SN/Awork_begin_ckpt_count=0
237935SN/Awork_begin_cpu_id_exit=-1
247935SN/Awork_begin_exit_count=0
257935SN/Awork_cpus_ckpt_count=0
267935SN/Awork_end_ckpt_count=0
277935SN/Awork_end_exit_count=0
287935SN/Awork_item_id=-1
298983Snate@binkert.orgsystem_port=system.membus.slave[0]
307893SN/A
317893SN/A[system.cpu]
327893SN/Atype=DerivO3CPU
338825Snilay@cs.wisc.educhildren=dcache dtb fuPool icache interrupts itb l2cache toL2Bus tracer workload
347893SN/ABTBEntries=4096
357893SN/ABTBTagSize=16
367893SN/ALFSTSize=1024
377893SN/ALQEntries=32
388241SN/ALSQCheckLoads=true
398241SN/ALSQDepCheckShift=4
407893SN/ARASSize=16
417893SN/ASQEntries=32
427893SN/ASSITSize=1024
437893SN/Aactivity=0
447893SN/AbackComSize=5
457893SN/AcachePorts=200
467893SN/Achecker=Null
477893SN/AchoiceCtrBits=2
487893SN/AchoicePredictorSize=8192
497893SN/Aclock=500
507893SN/AcommitToDecodeDelay=1
517893SN/AcommitToFetchDelay=1
527893SN/AcommitToIEWDelay=1
537893SN/AcommitToRenameDelay=1
547893SN/AcommitWidth=8
557893SN/Acpu_id=0
567893SN/AdecodeToFetchDelay=1
577893SN/AdecodeToRenameDelay=1
587893SN/AdecodeWidth=8
597893SN/Adefer_registration=false
607893SN/AdispatchWidth=8
617893SN/Ado_checkpoint_insts=true
628825Snilay@cs.wisc.edudo_quiesce=true
637893SN/Ado_statistics_insts=true
647893SN/Adtb=system.cpu.dtb
657893SN/AfetchToDecodeDelay=1
667893SN/AfetchTrapLatency=1
677893SN/AfetchWidth=8
687893SN/AforwardComSize=5
697893SN/AfuPool=system.cpu.fuPool
707893SN/Afunction_trace=false
717893SN/Afunction_trace_start=0
727893SN/AglobalCtrBits=2
737893SN/AglobalHistoryBits=13
747893SN/AglobalPredictorSize=8192
757893SN/AiewToCommitDelay=1
767893SN/AiewToDecodeDelay=1
777893SN/AiewToFetchDelay=1
787893SN/AiewToRenameDelay=1
797893SN/AinstShiftAmt=2
808825Snilay@cs.wisc.eduinterrupts=system.cpu.interrupts
817893SN/AissueToExecuteDelay=1
827893SN/AissueWidth=8
837893SN/Aitb=system.cpu.itb
847893SN/AlocalCtrBits=2
857893SN/AlocalHistoryBits=11
867893SN/AlocalHistoryTableSize=2048
877893SN/AlocalPredictorSize=2048
887893SN/Amax_insts_all_threads=0
897893SN/Amax_insts_any_thread=0
907893SN/Amax_loads_all_threads=0
917893SN/Amax_loads_any_thread=0
928728SN/AneedsTSO=true
937893SN/AnumIQEntries=64
947893SN/AnumPhysFloatRegs=256
957893SN/AnumPhysIntRegs=256
967893SN/AnumROBEntries=192
977893SN/AnumRobs=1
987893SN/AnumThreads=1
997893SN/ApredType=tournament
1008825Snilay@cs.wisc.eduprofile=0
1017893SN/Aprogress_interval=0
1027893SN/ArenameToDecodeDelay=1
1037893SN/ArenameToFetchDelay=1
1047893SN/ArenameToIEWDelay=2
1057893SN/ArenameToROBDelay=1
1067893SN/ArenameWidth=8
1077893SN/AsmtCommitPolicy=RoundRobin
1087893SN/AsmtFetchPolicy=SingleThread
1097893SN/AsmtIQPolicy=Partitioned
1107893SN/AsmtIQThreshold=100
1117893SN/AsmtLSQPolicy=Partitioned
1127893SN/AsmtLSQThreshold=100
1137893SN/AsmtNumFetchingThreads=1
1147893SN/AsmtROBPolicy=Partitioned
1157893SN/AsmtROBThreshold=100
1167893SN/AsquashWidth=8
1178521SN/Astore_set_clear_period=250000
1187893SN/Asystem=system
1197893SN/Atracer=system.cpu.tracer
1207893SN/AtrapLatency=13
1217893SN/AwbDepth=1
1227893SN/AwbWidth=8
1237893SN/Aworkload=system.cpu.workload
1247893SN/Adcache_port=system.cpu.dcache.cpu_side
1257893SN/Aicache_port=system.cpu.icache.cpu_side
1267893SN/A
1277893SN/A[system.cpu.dcache]
1287893SN/Atype=BaseCache
1298983Snate@binkert.orgaddr_ranges=0:18446744073709551615
1307893SN/Aassoc=2
1317893SN/Ablock_size=64
1329213Snilay@cs.wisc.educlock=1
1337893SN/Aforward_snoops=true
1347893SN/Ahash_delay=1
1358200SN/Ais_top_level=true
1367893SN/Alatency=1000
1377893SN/Amax_miss_count=0
1387893SN/Amshrs=10
1397893SN/Aprefetch_on_access=false
1408835SAli.Saidi@ARM.comprefetcher=Null
1417893SN/AprioritizeRequests=false
1427893SN/Arepl=Null
1437893SN/Asize=262144
1447893SN/Asubblock_size=0
1458835SAli.Saidi@ARM.comsystem=system
1467893SN/Atgts_per_mshr=20
1477893SN/Atrace_addr=0
1487893SN/Atwo_queue=false
1497893SN/Awrite_buffers=8
1507893SN/Acpu_side=system.cpu.dcache_port
1518983Snate@binkert.orgmem_side=system.cpu.toL2Bus.slave[1]
1527893SN/A
1537893SN/A[system.cpu.dtb]
1547893SN/Atype=X86TLB
1558825Snilay@cs.wisc.educhildren=walker
1567893SN/Asize=64
1578825Snilay@cs.wisc.eduwalker=system.cpu.dtb.walker
1588825Snilay@cs.wisc.edu
1598825Snilay@cs.wisc.edu[system.cpu.dtb.walker]
1608825Snilay@cs.wisc.edutype=X86PagetableWalker
1619213Snilay@cs.wisc.educlock=1
1628825Snilay@cs.wisc.edusystem=system
1638983Snate@binkert.orgport=system.cpu.toL2Bus.slave[3]
1647893SN/A
1657893SN/A[system.cpu.fuPool]
1667893SN/Atype=FUPool
1677893SN/Achildren=FUList0 FUList1 FUList2 FUList3 FUList4 FUList5 FUList6 FUList7 FUList8
1687893SN/AFUList=system.cpu.fuPool.FUList0 system.cpu.fuPool.FUList1 system.cpu.fuPool.FUList2 system.cpu.fuPool.FUList3 system.cpu.fuPool.FUList4 system.cpu.fuPool.FUList5 system.cpu.fuPool.FUList6 system.cpu.fuPool.FUList7 system.cpu.fuPool.FUList8
1697893SN/A
1707893SN/A[system.cpu.fuPool.FUList0]
1717893SN/Atype=FUDesc
1727893SN/Achildren=opList
1737893SN/Acount=6
1747893SN/AopList=system.cpu.fuPool.FUList0.opList
1757893SN/A
1767893SN/A[system.cpu.fuPool.FUList0.opList]
1777893SN/Atype=OpDesc
1787893SN/AissueLat=1
1797893SN/AopClass=IntAlu
1807893SN/AopLat=1
1817893SN/A
1827893SN/A[system.cpu.fuPool.FUList1]
1837893SN/Atype=FUDesc
1847893SN/Achildren=opList0 opList1
1857893SN/Acount=2
1867893SN/AopList=system.cpu.fuPool.FUList1.opList0 system.cpu.fuPool.FUList1.opList1
1877893SN/A
1887893SN/A[system.cpu.fuPool.FUList1.opList0]
1897893SN/Atype=OpDesc
1907893SN/AissueLat=1
1917893SN/AopClass=IntMult
1927893SN/AopLat=3
1937893SN/A
1947893SN/A[system.cpu.fuPool.FUList1.opList1]
1957893SN/Atype=OpDesc
1967893SN/AissueLat=19
1977893SN/AopClass=IntDiv
1987893SN/AopLat=20
1997893SN/A
2007893SN/A[system.cpu.fuPool.FUList2]
2017893SN/Atype=FUDesc
2027893SN/Achildren=opList0 opList1 opList2
2037893SN/Acount=4
2047893SN/AopList=system.cpu.fuPool.FUList2.opList0 system.cpu.fuPool.FUList2.opList1 system.cpu.fuPool.FUList2.opList2
2057893SN/A
2067893SN/A[system.cpu.fuPool.FUList2.opList0]
2077893SN/Atype=OpDesc
2087893SN/AissueLat=1
2097893SN/AopClass=FloatAdd
2107893SN/AopLat=2
2117893SN/A
2127893SN/A[system.cpu.fuPool.FUList2.opList1]
2137893SN/Atype=OpDesc
2147893SN/AissueLat=1
2157893SN/AopClass=FloatCmp
2167893SN/AopLat=2
2177893SN/A
2187893SN/A[system.cpu.fuPool.FUList2.opList2]
2197893SN/Atype=OpDesc
2207893SN/AissueLat=1
2217893SN/AopClass=FloatCvt
2227893SN/AopLat=2
2237893SN/A
2247893SN/A[system.cpu.fuPool.FUList3]
2257893SN/Atype=FUDesc
2267893SN/Achildren=opList0 opList1 opList2
2277893SN/Acount=2
2287893SN/AopList=system.cpu.fuPool.FUList3.opList0 system.cpu.fuPool.FUList3.opList1 system.cpu.fuPool.FUList3.opList2
2297893SN/A
2307893SN/A[system.cpu.fuPool.FUList3.opList0]
2317893SN/Atype=OpDesc
2327893SN/AissueLat=1
2337893SN/AopClass=FloatMult
2347893SN/AopLat=4
2357893SN/A
2367893SN/A[system.cpu.fuPool.FUList3.opList1]
2377893SN/Atype=OpDesc
2387893SN/AissueLat=12
2397893SN/AopClass=FloatDiv
2407893SN/AopLat=12
2417893SN/A
2427893SN/A[system.cpu.fuPool.FUList3.opList2]
2437893SN/Atype=OpDesc
2447893SN/AissueLat=24
2457893SN/AopClass=FloatSqrt
2467893SN/AopLat=24
2477893SN/A
2487893SN/A[system.cpu.fuPool.FUList4]
2497893SN/Atype=FUDesc
2507893SN/Achildren=opList
2517893SN/Acount=0
2527893SN/AopList=system.cpu.fuPool.FUList4.opList
2537893SN/A
2547893SN/A[system.cpu.fuPool.FUList4.opList]
2557893SN/Atype=OpDesc
2567893SN/AissueLat=1
2577893SN/AopClass=MemRead
2587893SN/AopLat=1
2597893SN/A
2607893SN/A[system.cpu.fuPool.FUList5]
2617893SN/Atype=FUDesc
2627893SN/Achildren=opList00 opList01 opList02 opList03 opList04 opList05 opList06 opList07 opList08 opList09 opList10 opList11 opList12 opList13 opList14 opList15 opList16 opList17 opList18 opList19
2637893SN/Acount=4
2647893SN/AopList=system.cpu.fuPool.FUList5.opList00 system.cpu.fuPool.FUList5.opList01 system.cpu.fuPool.FUList5.opList02 system.cpu.fuPool.FUList5.opList03 system.cpu.fuPool.FUList5.opList04 system.cpu.fuPool.FUList5.opList05 system.cpu.fuPool.FUList5.opList06 system.cpu.fuPool.FUList5.opList07 system.cpu.fuPool.FUList5.opList08 system.cpu.fuPool.FUList5.opList09 system.cpu.fuPool.FUList5.opList10 system.cpu.fuPool.FUList5.opList11 system.cpu.fuPool.FUList5.opList12 system.cpu.fuPool.FUList5.opList13 system.cpu.fuPool.FUList5.opList14 system.cpu.fuPool.FUList5.opList15 system.cpu.fuPool.FUList5.opList16 system.cpu.fuPool.FUList5.opList17 system.cpu.fuPool.FUList5.opList18 system.cpu.fuPool.FUList5.opList19
2657893SN/A
2667893SN/A[system.cpu.fuPool.FUList5.opList00]
2677893SN/Atype=OpDesc
2687893SN/AissueLat=1
2697893SN/AopClass=SimdAdd
2707893SN/AopLat=1
2717893SN/A
2727893SN/A[system.cpu.fuPool.FUList5.opList01]
2737893SN/Atype=OpDesc
2747893SN/AissueLat=1
2757893SN/AopClass=SimdAddAcc
2767893SN/AopLat=1
2777893SN/A
2787893SN/A[system.cpu.fuPool.FUList5.opList02]
2797893SN/Atype=OpDesc
2807893SN/AissueLat=1
2817893SN/AopClass=SimdAlu
2827893SN/AopLat=1
2837893SN/A
2847893SN/A[system.cpu.fuPool.FUList5.opList03]
2857893SN/Atype=OpDesc
2867893SN/AissueLat=1
2877893SN/AopClass=SimdCmp
2887893SN/AopLat=1
2897893SN/A
2907893SN/A[system.cpu.fuPool.FUList5.opList04]
2917893SN/Atype=OpDesc
2927893SN/AissueLat=1
2937893SN/AopClass=SimdCvt
2947893SN/AopLat=1
2957893SN/A
2967893SN/A[system.cpu.fuPool.FUList5.opList05]
2977893SN/Atype=OpDesc
2987893SN/AissueLat=1
2997893SN/AopClass=SimdMisc
3007893SN/AopLat=1
3017893SN/A
3027893SN/A[system.cpu.fuPool.FUList5.opList06]
3037893SN/Atype=OpDesc
3047893SN/AissueLat=1
3057893SN/AopClass=SimdMult
3067893SN/AopLat=1
3077893SN/A
3087893SN/A[system.cpu.fuPool.FUList5.opList07]
3097893SN/Atype=OpDesc
3107893SN/AissueLat=1
3117893SN/AopClass=SimdMultAcc
3127893SN/AopLat=1
3137893SN/A
3147893SN/A[system.cpu.fuPool.FUList5.opList08]
3157893SN/Atype=OpDesc
3167893SN/AissueLat=1
3177893SN/AopClass=SimdShift
3187893SN/AopLat=1
3197893SN/A
3207893SN/A[system.cpu.fuPool.FUList5.opList09]
3217893SN/Atype=OpDesc
3227893SN/AissueLat=1
3237893SN/AopClass=SimdShiftAcc
3247893SN/AopLat=1
3257893SN/A
3267893SN/A[system.cpu.fuPool.FUList5.opList10]
3277893SN/Atype=OpDesc
3287893SN/AissueLat=1
3297893SN/AopClass=SimdSqrt
3307893SN/AopLat=1
3317893SN/A
3327893SN/A[system.cpu.fuPool.FUList5.opList11]
3337893SN/Atype=OpDesc
3347893SN/AissueLat=1
3357893SN/AopClass=SimdFloatAdd
3367893SN/AopLat=1
3377893SN/A
3387893SN/A[system.cpu.fuPool.FUList5.opList12]
3397893SN/Atype=OpDesc
3407893SN/AissueLat=1
3417893SN/AopClass=SimdFloatAlu
3427893SN/AopLat=1
3437893SN/A
3447893SN/A[system.cpu.fuPool.FUList5.opList13]
3457893SN/Atype=OpDesc
3467893SN/AissueLat=1
3477893SN/AopClass=SimdFloatCmp
3487893SN/AopLat=1
3497893SN/A
3507893SN/A[system.cpu.fuPool.FUList5.opList14]
3517893SN/Atype=OpDesc
3527893SN/AissueLat=1
3537893SN/AopClass=SimdFloatCvt
3547893SN/AopLat=1
3557893SN/A
3567893SN/A[system.cpu.fuPool.FUList5.opList15]
3577893SN/Atype=OpDesc
3587893SN/AissueLat=1
3597893SN/AopClass=SimdFloatDiv
3607893SN/AopLat=1
3617893SN/A
3627893SN/A[system.cpu.fuPool.FUList5.opList16]
3637893SN/Atype=OpDesc
3647893SN/AissueLat=1
3657893SN/AopClass=SimdFloatMisc
3667893SN/AopLat=1
3677893SN/A
3687893SN/A[system.cpu.fuPool.FUList5.opList17]
3697893SN/Atype=OpDesc
3707893SN/AissueLat=1
3717893SN/AopClass=SimdFloatMult
3727893SN/AopLat=1
3737893SN/A
3747893SN/A[system.cpu.fuPool.FUList5.opList18]
3757893SN/Atype=OpDesc
3767893SN/AissueLat=1
3777893SN/AopClass=SimdFloatMultAcc
3787893SN/AopLat=1
3797893SN/A
3807893SN/A[system.cpu.fuPool.FUList5.opList19]
3817893SN/Atype=OpDesc
3827893SN/AissueLat=1
3837893SN/AopClass=SimdFloatSqrt
3847893SN/AopLat=1
3857893SN/A
3867893SN/A[system.cpu.fuPool.FUList6]
3877893SN/Atype=FUDesc
3887893SN/Achildren=opList
3897893SN/Acount=0
3907893SN/AopList=system.cpu.fuPool.FUList6.opList
3917893SN/A
3927893SN/A[system.cpu.fuPool.FUList6.opList]
3937893SN/Atype=OpDesc
3947893SN/AissueLat=1
3957893SN/AopClass=MemWrite
3967893SN/AopLat=1
3977893SN/A
3987893SN/A[system.cpu.fuPool.FUList7]
3997893SN/Atype=FUDesc
4007893SN/Achildren=opList0 opList1
4017893SN/Acount=4
4027893SN/AopList=system.cpu.fuPool.FUList7.opList0 system.cpu.fuPool.FUList7.opList1
4037893SN/A
4047893SN/A[system.cpu.fuPool.FUList7.opList0]
4057893SN/Atype=OpDesc
4067893SN/AissueLat=1
4077893SN/AopClass=MemRead
4087893SN/AopLat=1
4097893SN/A
4107893SN/A[system.cpu.fuPool.FUList7.opList1]
4117893SN/Atype=OpDesc
4127893SN/AissueLat=1
4137893SN/AopClass=MemWrite
4147893SN/AopLat=1
4157893SN/A
4167893SN/A[system.cpu.fuPool.FUList8]
4177893SN/Atype=FUDesc
4187893SN/Achildren=opList
4197893SN/Acount=1
4207893SN/AopList=system.cpu.fuPool.FUList8.opList
4217893SN/A
4227893SN/A[system.cpu.fuPool.FUList8.opList]
4237893SN/Atype=OpDesc
4247893SN/AissueLat=3
4257893SN/AopClass=IprAccess
4267893SN/AopLat=3
4277893SN/A
4287893SN/A[system.cpu.icache]
4297893SN/Atype=BaseCache
4308983Snate@binkert.orgaddr_ranges=0:18446744073709551615
4317893SN/Aassoc=2
4327893SN/Ablock_size=64
4339213Snilay@cs.wisc.educlock=1
4347893SN/Aforward_snoops=true
4357893SN/Ahash_delay=1
4368200SN/Ais_top_level=true
4377893SN/Alatency=1000
4387893SN/Amax_miss_count=0
4397893SN/Amshrs=10
4407893SN/Aprefetch_on_access=false
4418835SAli.Saidi@ARM.comprefetcher=Null
4427893SN/AprioritizeRequests=false
4437893SN/Arepl=Null
4447893SN/Asize=131072
4457893SN/Asubblock_size=0
4468835SAli.Saidi@ARM.comsystem=system
4477893SN/Atgts_per_mshr=20
4487893SN/Atrace_addr=0
4497893SN/Atwo_queue=false
4507893SN/Awrite_buffers=8
4517893SN/Acpu_side=system.cpu.icache_port
4528983Snate@binkert.orgmem_side=system.cpu.toL2Bus.slave[0]
4537893SN/A
4548825Snilay@cs.wisc.edu[system.cpu.interrupts]
4558825Snilay@cs.wisc.edutype=X86LocalApic
4569213Snilay@cs.wisc.educlock=1
4578825Snilay@cs.wisc.eduint_latency=1000
4588825Snilay@cs.wisc.edupio_addr=2305843009213693952
4599213Snilay@cs.wisc.edupio_latency=100000
4608825Snilay@cs.wisc.edusystem=system
4618983Snate@binkert.orgint_master=system.membus.slave[2]
4628983Snate@binkert.orgint_slave=system.membus.master[2]
4638983Snate@binkert.orgpio=system.membus.master[1]
4648825Snilay@cs.wisc.edu
4657893SN/A[system.cpu.itb]
4667893SN/Atype=X86TLB
4678825Snilay@cs.wisc.educhildren=walker
4687893SN/Asize=64
4698825Snilay@cs.wisc.eduwalker=system.cpu.itb.walker
4708825Snilay@cs.wisc.edu
4718825Snilay@cs.wisc.edu[system.cpu.itb.walker]
4728825Snilay@cs.wisc.edutype=X86PagetableWalker
4739213Snilay@cs.wisc.educlock=1
4748825Snilay@cs.wisc.edusystem=system
4758983Snate@binkert.orgport=system.cpu.toL2Bus.slave[2]
4767893SN/A
4777893SN/A[system.cpu.l2cache]
4787893SN/Atype=BaseCache
4798983Snate@binkert.orgaddr_ranges=0:18446744073709551615
4807893SN/Aassoc=2
4817893SN/Ablock_size=64
4829213Snilay@cs.wisc.educlock=1
4837893SN/Aforward_snoops=true
4847893SN/Ahash_delay=1
4858200SN/Ais_top_level=false
4867893SN/Alatency=1000
4877893SN/Amax_miss_count=0
4887893SN/Amshrs=10
4897893SN/Aprefetch_on_access=false
4908835SAli.Saidi@ARM.comprefetcher=Null
4917893SN/AprioritizeRequests=false
4927893SN/Arepl=Null
4937893SN/Asize=2097152
4947893SN/Asubblock_size=0
4958835SAli.Saidi@ARM.comsystem=system
4967893SN/Atgts_per_mshr=5
4977893SN/Atrace_addr=0
4987893SN/Atwo_queue=false
4997893SN/Awrite_buffers=8
5008983Snate@binkert.orgcpu_side=system.cpu.toL2Bus.master[0]
5018983Snate@binkert.orgmem_side=system.membus.slave[1]
5027893SN/A
5037893SN/A[system.cpu.toL2Bus]
5049039Sgblack@eecs.umich.edutype=CoherentBus
5057893SN/Ablock_size=64
5067893SN/Aclock=1000
5077893SN/Aheader_cycles=1
5087893SN/Ause_default_range=false
5099096Sandreas.hansson@arm.comwidth=8
5108983Snate@binkert.orgmaster=system.cpu.l2cache.cpu_side
5118983Snate@binkert.orgslave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port
5127893SN/A
5137893SN/A[system.cpu.tracer]
5147893SN/Atype=ExeTracer
5157893SN/A
5167893SN/A[system.cpu.workload]
5177893SN/Atype=LiveProcess
5187893SN/Acmd=parser 2.1.dict -batch
5199134Ssaidi@eecs.umich.educwd=build/X86/tests/opt/long/se/20.parser/x86/linux/o3-timing
5207893SN/Aegid=100
5217893SN/Aenv=
5227893SN/Aerrout=cerr
5237893SN/Aeuid=100
5249213Snilay@cs.wisc.eduexecutable=/scratch/nilay/GEM5/dist/m5/cpu2000/binaries/x86/linux/parser
5257893SN/Agid=100
5269213Snilay@cs.wisc.eduinput=/scratch/nilay/GEM5/dist/m5/cpu2000/data/parser/mdred/input/parser.in
5277893SN/Amax_stack_size=67108864
5287893SN/Aoutput=cout
5297893SN/Apid=100
5307893SN/Appid=99
5317893SN/Asimpoint=114600000000
5327893SN/Asystem=system
5337893SN/Auid=100
5347893SN/A
5357893SN/A[system.membus]
5369039Sgblack@eecs.umich.edutype=CoherentBus
5377893SN/Ablock_size=64
5387893SN/Aclock=1000
5397893SN/Aheader_cycles=1
5407893SN/Ause_default_range=false
5419096Sandreas.hansson@arm.comwidth=8
5429134Ssaidi@eecs.umich.edumaster=system.physmem.port system.cpu.interrupts.pio system.cpu.interrupts.int_slave
5438983Snate@binkert.orgslave=system.system_port system.cpu.l2cache.mem_side system.cpu.interrupts.int_master
5447893SN/A
5457893SN/A[system.physmem]
5468983Snate@binkert.orgtype=SimpleMemory
5479213Snilay@cs.wisc.educlock=1
5488983Snate@binkert.orgconf_table_reported=false
5497893SN/Afile=
5508983Snate@binkert.orgin_addr_map=true
5517893SN/Alatency=30000
5527893SN/Alatency_var=0
5537893SN/Anull=false
5547893SN/Arange=0:134217727
5557893SN/Azero=false
5568983Snate@binkert.orgport=system.membus.master[0]
5577893SN/A
558