config.ini revision 10753:48a72150f82c
1[root] 2type=Root 3children=system 4eventq_index=0 5full_system=false 6sim_quantum=0 7time_sync_enable=false 8time_sync_period=100000000000 9time_sync_spin_threshold=100000000 10 11[system] 12type=System 13children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain 14boot_osflags=a 15cache_line_size=64 16clk_domain=system.clk_domain 17eventq_index=0 18init_param=0 19kernel= 20kernel_addr_check=true 21load_addr_mask=1099511627775 22load_offset=0 23mem_mode=timing 24mem_ranges= 25memories=system.physmem 26mmap_using_noreserve=false 27num_work_ids=16 28readfile= 29symbolfile= 30work_begin_ckpt_count=0 31work_begin_cpu_id_exit=-1 32work_begin_exit_count=0 33work_cpus_ckpt_count=0 34work_end_ckpt_count=0 35work_end_exit_count=0 36work_item_id=-1 37system_port=system.membus.slave[0] 38 39[system.clk_domain] 40type=SrcClockDomain 41clock=1000 42domain_id=-1 43eventq_index=0 44init_perf_level=0 45voltage_domain=system.voltage_domain 46 47[system.cpu] 48type=MinorCPU 49children=branchPred dcache dstage2_mmu dtb executeFuncUnits icache interrupts isa istage2_mmu itb l2cache toL2Bus tracer workload 50branchPred=system.cpu.branchPred 51checker=Null 52clk_domain=system.cpu_clk_domain 53cpu_id=0 54decodeCycleInput=true 55decodeInputBufferSize=3 56decodeInputWidth=2 57decodeToExecuteForwardDelay=1 58do_checkpoint_insts=true 59do_quiesce=true 60do_statistics_insts=true 61dstage2_mmu=system.cpu.dstage2_mmu 62dtb=system.cpu.dtb 63enableIdling=true 64eventq_index=0 65executeAllowEarlyMemoryIssue=true 66executeBranchDelay=1 67executeCommitLimit=2 68executeCycleInput=true 69executeFuncUnits=system.cpu.executeFuncUnits 70executeInputBufferSize=7 71executeInputWidth=2 72executeIssueLimit=2 73executeLSQMaxStoreBufferStoresPerCycle=2 74executeLSQRequestsQueueSize=1 75executeLSQStoreBufferSize=5 76executeLSQTransfersQueueSize=2 77executeMaxAccessesInMemory=2 78executeMemoryCommitLimit=1 79executeMemoryIssueLimit=1 80executeMemoryWidth=0 81executeSetTraceTimeOnCommit=true 82executeSetTraceTimeOnIssue=false 83fetch1FetchLimit=1 84fetch1LineSnapWidth=0 85fetch1LineWidth=0 86fetch1ToFetch2BackwardDelay=1 87fetch1ToFetch2ForwardDelay=1 88fetch2CycleInput=true 89fetch2InputBufferSize=2 90fetch2ToDecodeForwardDelay=1 91function_trace=false 92function_trace_start=0 93interrupts=system.cpu.interrupts 94isa=system.cpu.isa 95istage2_mmu=system.cpu.istage2_mmu 96itb=system.cpu.itb 97max_insts_all_threads=0 98max_insts_any_thread=0 99max_loads_all_threads=0 100max_loads_any_thread=0 101numThreads=1 102profile=0 103progress_interval=0 104simpoint_start_insts= 105socket_id=0 106switched_out=false 107system=system 108tracer=system.cpu.tracer 109workload=system.cpu.workload 110dcache_port=system.cpu.dcache.cpu_side 111icache_port=system.cpu.icache.cpu_side 112 113[system.cpu.branchPred] 114type=BranchPredictor 115BTBEntries=4096 116BTBTagSize=16 117RASSize=16 118choiceCtrBits=2 119choicePredictorSize=8192 120eventq_index=0 121globalCtrBits=2 122globalPredictorSize=8192 123instShiftAmt=2 124localCtrBits=2 125localHistoryTableSize=2048 126localPredictorSize=2048 127numThreads=1 128predType=tournament 129 130[system.cpu.dcache] 131type=BaseCache 132children=tags 133addr_ranges=0:18446744073709551615 134assoc=2 135clk_domain=system.cpu_clk_domain 136demand_mshr_reserve=1 137eventq_index=0 138forward_snoops=true 139hit_latency=2 140is_top_level=true 141max_miss_count=0 142mshrs=4 143prefetch_on_access=false 144prefetcher=Null 145response_latency=2 146sequential_access=false 147size=262144 148system=system 149tags=system.cpu.dcache.tags 150tgts_per_mshr=20 151two_queue=false 152write_buffers=8 153cpu_side=system.cpu.dcache_port 154mem_side=system.cpu.toL2Bus.slave[1] 155 156[system.cpu.dcache.tags] 157type=LRU 158assoc=2 159block_size=64 160clk_domain=system.cpu_clk_domain 161eventq_index=0 162hit_latency=2 163sequential_access=false 164size=262144 165 166[system.cpu.dstage2_mmu] 167type=ArmStage2MMU 168children=stage2_tlb 169eventq_index=0 170stage2_tlb=system.cpu.dstage2_mmu.stage2_tlb 171sys=system 172tlb=system.cpu.dtb 173 174[system.cpu.dstage2_mmu.stage2_tlb] 175type=ArmTLB 176children=walker 177eventq_index=0 178is_stage2=true 179size=32 180walker=system.cpu.dstage2_mmu.stage2_tlb.walker 181 182[system.cpu.dstage2_mmu.stage2_tlb.walker] 183type=ArmTableWalker 184clk_domain=system.cpu_clk_domain 185eventq_index=0 186is_stage2=true 187num_squash_per_cycle=2 188sys=system 189 190[system.cpu.dtb] 191type=ArmTLB 192children=walker 193eventq_index=0 194is_stage2=false 195size=64 196walker=system.cpu.dtb.walker 197 198[system.cpu.dtb.walker] 199type=ArmTableWalker 200clk_domain=system.cpu_clk_domain 201eventq_index=0 202is_stage2=false 203num_squash_per_cycle=2 204sys=system 205port=system.cpu.toL2Bus.slave[3] 206 207[system.cpu.executeFuncUnits] 208type=MinorFUPool 209children=funcUnits0 funcUnits1 funcUnits2 funcUnits3 funcUnits4 funcUnits5 funcUnits6 210eventq_index=0 211funcUnits=system.cpu.executeFuncUnits.funcUnits0 system.cpu.executeFuncUnits.funcUnits1 system.cpu.executeFuncUnits.funcUnits2 system.cpu.executeFuncUnits.funcUnits3 system.cpu.executeFuncUnits.funcUnits4 system.cpu.executeFuncUnits.funcUnits5 system.cpu.executeFuncUnits.funcUnits6 212 213[system.cpu.executeFuncUnits.funcUnits0] 214type=MinorFU 215children=opClasses timings 216cantForwardFromFUIndices= 217eventq_index=0 218issueLat=1 219opClasses=system.cpu.executeFuncUnits.funcUnits0.opClasses 220opLat=3 221timings=system.cpu.executeFuncUnits.funcUnits0.timings 222 223[system.cpu.executeFuncUnits.funcUnits0.opClasses] 224type=MinorOpClassSet 225children=opClasses 226eventq_index=0 227opClasses=system.cpu.executeFuncUnits.funcUnits0.opClasses.opClasses 228 229[system.cpu.executeFuncUnits.funcUnits0.opClasses.opClasses] 230type=MinorOpClass 231eventq_index=0 232opClass=IntAlu 233 234[system.cpu.executeFuncUnits.funcUnits0.timings] 235type=MinorFUTiming 236children=opClasses 237description=Int 238eventq_index=0 239extraAssumedLat=0 240extraCommitLat=0 241extraCommitLatExpr=Null 242mask=0 243match=0 244opClasses=system.cpu.executeFuncUnits.funcUnits0.timings.opClasses 245srcRegsRelativeLats=2 246suppress=false 247 248[system.cpu.executeFuncUnits.funcUnits0.timings.opClasses] 249type=MinorOpClassSet 250eventq_index=0 251opClasses= 252 253[system.cpu.executeFuncUnits.funcUnits1] 254type=MinorFU 255children=opClasses timings 256cantForwardFromFUIndices= 257eventq_index=0 258issueLat=1 259opClasses=system.cpu.executeFuncUnits.funcUnits1.opClasses 260opLat=3 261timings=system.cpu.executeFuncUnits.funcUnits1.timings 262 263[system.cpu.executeFuncUnits.funcUnits1.opClasses] 264type=MinorOpClassSet 265children=opClasses 266eventq_index=0 267opClasses=system.cpu.executeFuncUnits.funcUnits1.opClasses.opClasses 268 269[system.cpu.executeFuncUnits.funcUnits1.opClasses.opClasses] 270type=MinorOpClass 271eventq_index=0 272opClass=IntAlu 273 274[system.cpu.executeFuncUnits.funcUnits1.timings] 275type=MinorFUTiming 276children=opClasses 277description=Int 278eventq_index=0 279extraAssumedLat=0 280extraCommitLat=0 281extraCommitLatExpr=Null 282mask=0 283match=0 284opClasses=system.cpu.executeFuncUnits.funcUnits1.timings.opClasses 285srcRegsRelativeLats=2 286suppress=false 287 288[system.cpu.executeFuncUnits.funcUnits1.timings.opClasses] 289type=MinorOpClassSet 290eventq_index=0 291opClasses= 292 293[system.cpu.executeFuncUnits.funcUnits2] 294type=MinorFU 295children=opClasses timings 296cantForwardFromFUIndices= 297eventq_index=0 298issueLat=1 299opClasses=system.cpu.executeFuncUnits.funcUnits2.opClasses 300opLat=3 301timings=system.cpu.executeFuncUnits.funcUnits2.timings 302 303[system.cpu.executeFuncUnits.funcUnits2.opClasses] 304type=MinorOpClassSet 305children=opClasses 306eventq_index=0 307opClasses=system.cpu.executeFuncUnits.funcUnits2.opClasses.opClasses 308 309[system.cpu.executeFuncUnits.funcUnits2.opClasses.opClasses] 310type=MinorOpClass 311eventq_index=0 312opClass=IntMult 313 314[system.cpu.executeFuncUnits.funcUnits2.timings] 315type=MinorFUTiming 316children=opClasses 317description=Mul 318eventq_index=0 319extraAssumedLat=0 320extraCommitLat=0 321extraCommitLatExpr=Null 322mask=0 323match=0 324opClasses=system.cpu.executeFuncUnits.funcUnits2.timings.opClasses 325srcRegsRelativeLats=0 326suppress=false 327 328[system.cpu.executeFuncUnits.funcUnits2.timings.opClasses] 329type=MinorOpClassSet 330eventq_index=0 331opClasses= 332 333[system.cpu.executeFuncUnits.funcUnits3] 334type=MinorFU 335children=opClasses 336cantForwardFromFUIndices= 337eventq_index=0 338issueLat=9 339opClasses=system.cpu.executeFuncUnits.funcUnits3.opClasses 340opLat=9 341timings= 342 343[system.cpu.executeFuncUnits.funcUnits3.opClasses] 344type=MinorOpClassSet 345children=opClasses 346eventq_index=0 347opClasses=system.cpu.executeFuncUnits.funcUnits3.opClasses.opClasses 348 349[system.cpu.executeFuncUnits.funcUnits3.opClasses.opClasses] 350type=MinorOpClass 351eventq_index=0 352opClass=IntDiv 353 354[system.cpu.executeFuncUnits.funcUnits4] 355type=MinorFU 356children=opClasses timings 357cantForwardFromFUIndices= 358eventq_index=0 359issueLat=1 360opClasses=system.cpu.executeFuncUnits.funcUnits4.opClasses 361opLat=6 362timings=system.cpu.executeFuncUnits.funcUnits4.timings 363 364[system.cpu.executeFuncUnits.funcUnits4.opClasses] 365type=MinorOpClassSet 366children=opClasses00 opClasses01 opClasses02 opClasses03 opClasses04 opClasses05 opClasses06 opClasses07 opClasses08 opClasses09 opClasses10 opClasses11 opClasses12 opClasses13 opClasses14 opClasses15 opClasses16 opClasses17 opClasses18 opClasses19 opClasses20 opClasses21 opClasses22 opClasses23 opClasses24 opClasses25 367eventq_index=0 368opClasses=system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses00 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses01 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses02 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses03 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses04 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses05 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses06 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses07 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses08 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses09 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses10 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses11 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses12 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses13 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses14 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses15 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses16 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses17 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses18 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses19 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses20 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses21 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses22 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses23 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses24 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses25 369 370[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses00] 371type=MinorOpClass 372eventq_index=0 373opClass=FloatAdd 374 375[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses01] 376type=MinorOpClass 377eventq_index=0 378opClass=FloatCmp 379 380[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses02] 381type=MinorOpClass 382eventq_index=0 383opClass=FloatCvt 384 385[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses03] 386type=MinorOpClass 387eventq_index=0 388opClass=FloatMult 389 390[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses04] 391type=MinorOpClass 392eventq_index=0 393opClass=FloatDiv 394 395[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses05] 396type=MinorOpClass 397eventq_index=0 398opClass=FloatSqrt 399 400[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses06] 401type=MinorOpClass 402eventq_index=0 403opClass=SimdAdd 404 405[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses07] 406type=MinorOpClass 407eventq_index=0 408opClass=SimdAddAcc 409 410[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses08] 411type=MinorOpClass 412eventq_index=0 413opClass=SimdAlu 414 415[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses09] 416type=MinorOpClass 417eventq_index=0 418opClass=SimdCmp 419 420[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses10] 421type=MinorOpClass 422eventq_index=0 423opClass=SimdCvt 424 425[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses11] 426type=MinorOpClass 427eventq_index=0 428opClass=SimdMisc 429 430[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses12] 431type=MinorOpClass 432eventq_index=0 433opClass=SimdMult 434 435[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses13] 436type=MinorOpClass 437eventq_index=0 438opClass=SimdMultAcc 439 440[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses14] 441type=MinorOpClass 442eventq_index=0 443opClass=SimdShift 444 445[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses15] 446type=MinorOpClass 447eventq_index=0 448opClass=SimdShiftAcc 449 450[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses16] 451type=MinorOpClass 452eventq_index=0 453opClass=SimdSqrt 454 455[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses17] 456type=MinorOpClass 457eventq_index=0 458opClass=SimdFloatAdd 459 460[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses18] 461type=MinorOpClass 462eventq_index=0 463opClass=SimdFloatAlu 464 465[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses19] 466type=MinorOpClass 467eventq_index=0 468opClass=SimdFloatCmp 469 470[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses20] 471type=MinorOpClass 472eventq_index=0 473opClass=SimdFloatCvt 474 475[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses21] 476type=MinorOpClass 477eventq_index=0 478opClass=SimdFloatDiv 479 480[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses22] 481type=MinorOpClass 482eventq_index=0 483opClass=SimdFloatMisc 484 485[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses23] 486type=MinorOpClass 487eventq_index=0 488opClass=SimdFloatMult 489 490[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses24] 491type=MinorOpClass 492eventq_index=0 493opClass=SimdFloatMultAcc 494 495[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses25] 496type=MinorOpClass 497eventq_index=0 498opClass=SimdFloatSqrt 499 500[system.cpu.executeFuncUnits.funcUnits4.timings] 501type=MinorFUTiming 502children=opClasses 503description=FloatSimd 504eventq_index=0 505extraAssumedLat=0 506extraCommitLat=0 507extraCommitLatExpr=Null 508mask=0 509match=0 510opClasses=system.cpu.executeFuncUnits.funcUnits4.timings.opClasses 511srcRegsRelativeLats=2 512suppress=false 513 514[system.cpu.executeFuncUnits.funcUnits4.timings.opClasses] 515type=MinorOpClassSet 516eventq_index=0 517opClasses= 518 519[system.cpu.executeFuncUnits.funcUnits5] 520type=MinorFU 521children=opClasses timings 522cantForwardFromFUIndices= 523eventq_index=0 524issueLat=1 525opClasses=system.cpu.executeFuncUnits.funcUnits5.opClasses 526opLat=1 527timings=system.cpu.executeFuncUnits.funcUnits5.timings 528 529[system.cpu.executeFuncUnits.funcUnits5.opClasses] 530type=MinorOpClassSet 531children=opClasses0 opClasses1 532eventq_index=0 533opClasses=system.cpu.executeFuncUnits.funcUnits5.opClasses.opClasses0 system.cpu.executeFuncUnits.funcUnits5.opClasses.opClasses1 534 535[system.cpu.executeFuncUnits.funcUnits5.opClasses.opClasses0] 536type=MinorOpClass 537eventq_index=0 538opClass=MemRead 539 540[system.cpu.executeFuncUnits.funcUnits5.opClasses.opClasses1] 541type=MinorOpClass 542eventq_index=0 543opClass=MemWrite 544 545[system.cpu.executeFuncUnits.funcUnits5.timings] 546type=MinorFUTiming 547children=opClasses 548description=Mem 549eventq_index=0 550extraAssumedLat=2 551extraCommitLat=0 552extraCommitLatExpr=Null 553mask=0 554match=0 555opClasses=system.cpu.executeFuncUnits.funcUnits5.timings.opClasses 556srcRegsRelativeLats=1 557suppress=false 558 559[system.cpu.executeFuncUnits.funcUnits5.timings.opClasses] 560type=MinorOpClassSet 561eventq_index=0 562opClasses= 563 564[system.cpu.executeFuncUnits.funcUnits6] 565type=MinorFU 566children=opClasses 567cantForwardFromFUIndices= 568eventq_index=0 569issueLat=1 570opClasses=system.cpu.executeFuncUnits.funcUnits6.opClasses 571opLat=1 572timings= 573 574[system.cpu.executeFuncUnits.funcUnits6.opClasses] 575type=MinorOpClassSet 576children=opClasses0 opClasses1 577eventq_index=0 578opClasses=system.cpu.executeFuncUnits.funcUnits6.opClasses.opClasses0 system.cpu.executeFuncUnits.funcUnits6.opClasses.opClasses1 579 580[system.cpu.executeFuncUnits.funcUnits6.opClasses.opClasses0] 581type=MinorOpClass 582eventq_index=0 583opClass=IprAccess 584 585[system.cpu.executeFuncUnits.funcUnits6.opClasses.opClasses1] 586type=MinorOpClass 587eventq_index=0 588opClass=InstPrefetch 589 590[system.cpu.icache] 591type=BaseCache 592children=tags 593addr_ranges=0:18446744073709551615 594assoc=2 595clk_domain=system.cpu_clk_domain 596demand_mshr_reserve=1 597eventq_index=0 598forward_snoops=true 599hit_latency=2 600is_top_level=true 601max_miss_count=0 602mshrs=4 603prefetch_on_access=false 604prefetcher=Null 605response_latency=2 606sequential_access=false 607size=131072 608system=system 609tags=system.cpu.icache.tags 610tgts_per_mshr=20 611two_queue=false 612write_buffers=8 613cpu_side=system.cpu.icache_port 614mem_side=system.cpu.toL2Bus.slave[0] 615 616[system.cpu.icache.tags] 617type=LRU 618assoc=2 619block_size=64 620clk_domain=system.cpu_clk_domain 621eventq_index=0 622hit_latency=2 623sequential_access=false 624size=131072 625 626[system.cpu.interrupts] 627type=ArmInterrupts 628eventq_index=0 629 630[system.cpu.isa] 631type=ArmISA 632eventq_index=0 633fpsid=1090793632 634id_aa64afr0_el1=0 635id_aa64afr1_el1=0 636id_aa64dfr0_el1=1052678 637id_aa64dfr1_el1=0 638id_aa64isar0_el1=0 639id_aa64isar1_el1=0 640id_aa64mmfr0_el1=15728642 641id_aa64mmfr1_el1=0 642id_aa64pfr0_el1=17 643id_aa64pfr1_el1=0 644id_isar0=34607377 645id_isar1=34677009 646id_isar2=555950401 647id_isar3=17899825 648id_isar4=268501314 649id_isar5=0 650id_mmfr0=270536963 651id_mmfr1=0 652id_mmfr2=19070976 653id_mmfr3=34611729 654id_pfr0=49 655id_pfr1=4113 656midr=1091551472 657pmu=Null 658system=system 659 660[system.cpu.istage2_mmu] 661type=ArmStage2MMU 662children=stage2_tlb 663eventq_index=0 664stage2_tlb=system.cpu.istage2_mmu.stage2_tlb 665sys=system 666tlb=system.cpu.itb 667 668[system.cpu.istage2_mmu.stage2_tlb] 669type=ArmTLB 670children=walker 671eventq_index=0 672is_stage2=true 673size=32 674walker=system.cpu.istage2_mmu.stage2_tlb.walker 675 676[system.cpu.istage2_mmu.stage2_tlb.walker] 677type=ArmTableWalker 678clk_domain=system.cpu_clk_domain 679eventq_index=0 680is_stage2=true 681num_squash_per_cycle=2 682sys=system 683 684[system.cpu.itb] 685type=ArmTLB 686children=walker 687eventq_index=0 688is_stage2=false 689size=64 690walker=system.cpu.itb.walker 691 692[system.cpu.itb.walker] 693type=ArmTableWalker 694clk_domain=system.cpu_clk_domain 695eventq_index=0 696is_stage2=false 697num_squash_per_cycle=2 698sys=system 699port=system.cpu.toL2Bus.slave[2] 700 701[system.cpu.l2cache] 702type=BaseCache 703children=tags 704addr_ranges=0:18446744073709551615 705assoc=8 706clk_domain=system.cpu_clk_domain 707demand_mshr_reserve=1 708eventq_index=0 709forward_snoops=true 710hit_latency=20 711is_top_level=false 712max_miss_count=0 713mshrs=20 714prefetch_on_access=false 715prefetcher=Null 716response_latency=20 717sequential_access=false 718size=2097152 719system=system 720tags=system.cpu.l2cache.tags 721tgts_per_mshr=12 722two_queue=false 723write_buffers=8 724cpu_side=system.cpu.toL2Bus.master[0] 725mem_side=system.membus.slave[1] 726 727[system.cpu.l2cache.tags] 728type=LRU 729assoc=8 730block_size=64 731clk_domain=system.cpu_clk_domain 732eventq_index=0 733hit_latency=20 734sequential_access=false 735size=2097152 736 737[system.cpu.toL2Bus] 738type=CoherentXBar 739clk_domain=system.cpu_clk_domain 740eventq_index=0 741forward_latency=0 742frontend_latency=1 743response_latency=1 744snoop_filter=Null 745snoop_response_latency=1 746system=system 747use_default_range=false 748width=32 749master=system.cpu.l2cache.cpu_side 750slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port 751 752[system.cpu.tracer] 753type=ExeTracer 754eventq_index=0 755 756[system.cpu.workload] 757type=LiveProcess 758cmd=mcf mcf.in 759cwd=build/ARM/tests/opt/long/se/10.mcf/arm/linux/minor-timing 760drivers= 761egid=100 762env= 763errout=cerr 764euid=100 765eventq_index=0 766executable=/dist/m5/cpu2000/binaries/arm/linux/mcf 767gid=100 768input=/dist/m5/cpu2000/data/mcf/smred/input/mcf.in 769kvmInSE=false 770max_stack_size=67108864 771output=cout 772pid=100 773ppid=99 774simpoint=55300000000 775system=system 776uid=100 777useArchPT=false 778 779[system.cpu_clk_domain] 780type=SrcClockDomain 781clock=500 782domain_id=-1 783eventq_index=0 784init_perf_level=0 785voltage_domain=system.voltage_domain 786 787[system.dvfs_handler] 788type=DVFSHandler 789domains= 790enable=false 791eventq_index=0 792sys_clk_domain=system.clk_domain 793transition_latency=100000000 794 795[system.membus] 796type=CoherentXBar 797clk_domain=system.clk_domain 798eventq_index=0 799forward_latency=4 800frontend_latency=3 801response_latency=2 802snoop_filter=Null 803snoop_response_latency=4 804system=system 805use_default_range=false 806width=16 807master=system.physmem.port 808slave=system.system_port system.cpu.l2cache.mem_side 809 810[system.physmem] 811type=DRAMCtrl 812IDD0=0.075000 813IDD02=0.000000 814IDD2N=0.050000 815IDD2N2=0.000000 816IDD2P0=0.000000 817IDD2P02=0.000000 818IDD2P1=0.000000 819IDD2P12=0.000000 820IDD3N=0.057000 821IDD3N2=0.000000 822IDD3P0=0.000000 823IDD3P02=0.000000 824IDD3P1=0.000000 825IDD3P12=0.000000 826IDD4R=0.187000 827IDD4R2=0.000000 828IDD4W=0.165000 829IDD4W2=0.000000 830IDD5=0.220000 831IDD52=0.000000 832IDD6=0.000000 833IDD62=0.000000 834VDD=1.500000 835VDD2=0.000000 836activation_limit=4 837addr_mapping=RoRaBaCoCh 838bank_groups_per_rank=0 839banks_per_rank=8 840burst_length=8 841channels=1 842clk_domain=system.clk_domain 843conf_table_reported=true 844device_bus_width=8 845device_rowbuffer_size=1024 846device_size=536870912 847devices_per_rank=8 848dll=true 849eventq_index=0 850in_addr_map=true 851max_accesses_per_row=16 852mem_sched_policy=frfcfs 853min_writes_per_switch=16 854null=false 855page_policy=open_adaptive 856range=0:268435455 857ranks_per_channel=2 858read_buffer_size=32 859static_backend_latency=10000 860static_frontend_latency=10000 861tBURST=5000 862tCCD_L=0 863tCK=1250 864tCL=13750 865tCS=2500 866tRAS=35000 867tRCD=13750 868tREFI=7800000 869tRFC=260000 870tRP=13750 871tRRD=6000 872tRRD_L=0 873tRTP=7500 874tRTW=2500 875tWR=15000 876tWTR=7500 877tXAW=30000 878tXP=0 879tXPDLL=0 880tXS=0 881tXSDLL=0 882write_buffer_size=64 883write_high_thresh_perc=85 884write_low_thresh_perc=50 885port=system.membus.master[0] 886 887[system.voltage_domain] 888type=VoltageDomain 889eventq_index=0 890voltage=1.000000 891 892