1[root]
2type=Root
3children=system
4eventq_index=0
5full_system=false
6sim_quantum=0
7time_sync_enable=false
8time_sync_period=100000000000
9time_sync_spin_threshold=100000000
10
11[system]
12type=System
13children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain
14boot_osflags=a
15cache_line_size=64
16clk_domain=system.clk_domain
17default_p_state=UNDEFINED
18eventq_index=0
19exit_on_work_items=false
20init_param=0
21kernel=
22kernel_addr_check=true
23load_addr_mask=1099511627775
24load_offset=0
25mem_mode=timing
26mem_ranges=
27memories=system.physmem
28mmap_using_noreserve=false
29multi_thread=false
30num_work_ids=16
31p_state_clk_gate_bins=20
32p_state_clk_gate_max=1000000000000
33p_state_clk_gate_min=1000
34power_model=Null
35readfile=
36symbolfile=
37thermal_components=
38thermal_model=Null
39work_begin_ckpt_count=0
40work_begin_cpu_id_exit=-1
41work_begin_exit_count=0
42work_cpus_ckpt_count=0
43work_end_ckpt_count=0
44work_end_exit_count=0
45work_item_id=-1
46system_port=system.membus.slave[0]
47
48[system.clk_domain]
49type=SrcClockDomain
50clock=1000
51domain_id=-1
52eventq_index=0
53init_perf_level=0
54voltage_domain=system.voltage_domain
55
56[system.cpu]
57type=MinorCPU
58children=branchPred dcache dstage2_mmu dtb executeFuncUnits icache interrupts isa istage2_mmu itb l2cache toL2Bus tracer workload
59branchPred=system.cpu.branchPred
60checker=Null
61clk_domain=system.cpu_clk_domain
62cpu_id=0
63decodeCycleInput=true
64decodeInputBufferSize=3
65decodeInputWidth=2
66decodeToExecuteForwardDelay=1
67default_p_state=UNDEFINED
68do_checkpoint_insts=true
69do_quiesce=true
70do_statistics_insts=true
71dstage2_mmu=system.cpu.dstage2_mmu
72dtb=system.cpu.dtb
73enableIdling=true
74eventq_index=0
75executeAllowEarlyMemoryIssue=true
76executeBranchDelay=1
77executeCommitLimit=2
78executeCycleInput=true
79executeFuncUnits=system.cpu.executeFuncUnits
80executeInputBufferSize=7
81executeInputWidth=2
82executeIssueLimit=2
83executeLSQMaxStoreBufferStoresPerCycle=2
84executeLSQRequestsQueueSize=1
85executeLSQStoreBufferSize=5
86executeLSQTransfersQueueSize=2
87executeMaxAccessesInMemory=2
88executeMemoryCommitLimit=1
89executeMemoryIssueLimit=1
90executeMemoryWidth=0
91executeSetTraceTimeOnCommit=true
92executeSetTraceTimeOnIssue=false
93fetch1FetchLimit=1
94fetch1LineSnapWidth=0
95fetch1LineWidth=0
96fetch1ToFetch2BackwardDelay=1
97fetch1ToFetch2ForwardDelay=1
98fetch2CycleInput=true
99fetch2InputBufferSize=2
100fetch2ToDecodeForwardDelay=1
101function_trace=false
102function_trace_start=0
103interrupts=system.cpu.interrupts
104isa=system.cpu.isa
105istage2_mmu=system.cpu.istage2_mmu
106itb=system.cpu.itb
107max_insts_all_threads=0
108max_insts_any_thread=0
109max_loads_all_threads=0
110max_loads_any_thread=0
111numThreads=1
112p_state_clk_gate_bins=20
113p_state_clk_gate_max=1000000000000
114p_state_clk_gate_min=1000
115power_model=Null
116profile=0
117progress_interval=0
118simpoint_start_insts=
119socket_id=0
120switched_out=false
121system=system
122threadPolicy=RoundRobin
123tracer=system.cpu.tracer
124workload=system.cpu.workload
125dcache_port=system.cpu.dcache.cpu_side
126icache_port=system.cpu.icache.cpu_side
127
128[system.cpu.branchPred]
129type=TournamentBP
130BTBEntries=4096
131BTBTagSize=16
132RASSize=16
133choiceCtrBits=2
134choicePredictorSize=8192
135eventq_index=0
136globalCtrBits=2
137globalPredictorSize=8192
138indirectHashGHR=true
139indirectHashTargets=true
140indirectPathLength=3
141indirectSets=256
142indirectTagSize=16
143indirectWays=2
144instShiftAmt=2
145localCtrBits=2
146localHistoryTableSize=2048
147localPredictorSize=2048
148numThreads=1
149useIndirect=true
150
151[system.cpu.dcache]
152type=Cache
153children=tags
154addr_ranges=0:18446744073709551615:0:0:0:0
155assoc=2
156clk_domain=system.cpu_clk_domain
157clusivity=mostly_incl
158default_p_state=UNDEFINED
159demand_mshr_reserve=1
160eventq_index=0
161hit_latency=2
162is_read_only=false
163max_miss_count=0
164mshrs=4
165p_state_clk_gate_bins=20
166p_state_clk_gate_max=1000000000000
167p_state_clk_gate_min=1000
168power_model=Null
169prefetch_on_access=false
170prefetcher=Null
171response_latency=2
172sequential_access=false
173size=262144
174system=system
175tags=system.cpu.dcache.tags
176tgts_per_mshr=20
177write_buffers=8
178writeback_clean=false
179cpu_side=system.cpu.dcache_port
180mem_side=system.cpu.toL2Bus.slave[1]
181
182[system.cpu.dcache.tags]
183type=LRU
184assoc=2
185block_size=64
186clk_domain=system.cpu_clk_domain
187default_p_state=UNDEFINED
188eventq_index=0
189hit_latency=2
190p_state_clk_gate_bins=20
191p_state_clk_gate_max=1000000000000
192p_state_clk_gate_min=1000
193power_model=Null
194sequential_access=false
195size=262144
196
197[system.cpu.dstage2_mmu]
198type=ArmStage2MMU
199children=stage2_tlb
200eventq_index=0
201stage2_tlb=system.cpu.dstage2_mmu.stage2_tlb
202sys=system
203tlb=system.cpu.dtb
204
205[system.cpu.dstage2_mmu.stage2_tlb]
206type=ArmTLB
207children=walker
208eventq_index=0
209is_stage2=true
210size=32
211walker=system.cpu.dstage2_mmu.stage2_tlb.walker
212
213[system.cpu.dstage2_mmu.stage2_tlb.walker]
214type=ArmTableWalker
215clk_domain=system.cpu_clk_domain
216default_p_state=UNDEFINED
217eventq_index=0
218is_stage2=true
219num_squash_per_cycle=2
220p_state_clk_gate_bins=20
221p_state_clk_gate_max=1000000000000
222p_state_clk_gate_min=1000
223power_model=Null
224sys=system
225
226[system.cpu.dtb]
227type=ArmTLB
228children=walker
229eventq_index=0
230is_stage2=false
231size=64
232walker=system.cpu.dtb.walker
233
234[system.cpu.dtb.walker]
235type=ArmTableWalker
236clk_domain=system.cpu_clk_domain
237default_p_state=UNDEFINED
238eventq_index=0
239is_stage2=false
240num_squash_per_cycle=2
241p_state_clk_gate_bins=20
242p_state_clk_gate_max=1000000000000
243p_state_clk_gate_min=1000
244power_model=Null
245sys=system
246port=system.cpu.toL2Bus.slave[3]
247
248[system.cpu.executeFuncUnits]
249type=MinorFUPool
250children=funcUnits0 funcUnits1 funcUnits2 funcUnits3 funcUnits4 funcUnits5 funcUnits6
251eventq_index=0
252funcUnits=system.cpu.executeFuncUnits.funcUnits0 system.cpu.executeFuncUnits.funcUnits1 system.cpu.executeFuncUnits.funcUnits2 system.cpu.executeFuncUnits.funcUnits3 system.cpu.executeFuncUnits.funcUnits4 system.cpu.executeFuncUnits.funcUnits5 system.cpu.executeFuncUnits.funcUnits6
253
254[system.cpu.executeFuncUnits.funcUnits0]
255type=MinorFU
256children=opClasses timings
257cantForwardFromFUIndices=
258eventq_index=0
259issueLat=1
260opClasses=system.cpu.executeFuncUnits.funcUnits0.opClasses
261opLat=3
262timings=system.cpu.executeFuncUnits.funcUnits0.timings
263
264[system.cpu.executeFuncUnits.funcUnits0.opClasses]
265type=MinorOpClassSet
266children=opClasses
267eventq_index=0
268opClasses=system.cpu.executeFuncUnits.funcUnits0.opClasses.opClasses
269
270[system.cpu.executeFuncUnits.funcUnits0.opClasses.opClasses]
271type=MinorOpClass
272eventq_index=0
273opClass=IntAlu
274
275[system.cpu.executeFuncUnits.funcUnits0.timings]
276type=MinorFUTiming
277children=opClasses
278description=Int
279eventq_index=0
280extraAssumedLat=0
281extraCommitLat=0
282extraCommitLatExpr=Null
283mask=0
284match=0
285opClasses=system.cpu.executeFuncUnits.funcUnits0.timings.opClasses
286srcRegsRelativeLats=2
287suppress=false
288
289[system.cpu.executeFuncUnits.funcUnits0.timings.opClasses]
290type=MinorOpClassSet
291eventq_index=0
292opClasses=
293
294[system.cpu.executeFuncUnits.funcUnits1]
295type=MinorFU
296children=opClasses timings
297cantForwardFromFUIndices=
298eventq_index=0
299issueLat=1
300opClasses=system.cpu.executeFuncUnits.funcUnits1.opClasses
301opLat=3
302timings=system.cpu.executeFuncUnits.funcUnits1.timings
303
304[system.cpu.executeFuncUnits.funcUnits1.opClasses]
305type=MinorOpClassSet
306children=opClasses
307eventq_index=0
308opClasses=system.cpu.executeFuncUnits.funcUnits1.opClasses.opClasses
309
310[system.cpu.executeFuncUnits.funcUnits1.opClasses.opClasses]
311type=MinorOpClass
312eventq_index=0
313opClass=IntAlu
314
315[system.cpu.executeFuncUnits.funcUnits1.timings]
316type=MinorFUTiming
317children=opClasses
318description=Int
319eventq_index=0
320extraAssumedLat=0
321extraCommitLat=0
322extraCommitLatExpr=Null
323mask=0
324match=0
325opClasses=system.cpu.executeFuncUnits.funcUnits1.timings.opClasses
326srcRegsRelativeLats=2
327suppress=false
328
329[system.cpu.executeFuncUnits.funcUnits1.timings.opClasses]
330type=MinorOpClassSet
331eventq_index=0
332opClasses=
333
334[system.cpu.executeFuncUnits.funcUnits2]
335type=MinorFU
336children=opClasses timings
337cantForwardFromFUIndices=
338eventq_index=0
339issueLat=1
340opClasses=system.cpu.executeFuncUnits.funcUnits2.opClasses
341opLat=3
342timings=system.cpu.executeFuncUnits.funcUnits2.timings
343
344[system.cpu.executeFuncUnits.funcUnits2.opClasses]
345type=MinorOpClassSet
346children=opClasses
347eventq_index=0
348opClasses=system.cpu.executeFuncUnits.funcUnits2.opClasses.opClasses
349
350[system.cpu.executeFuncUnits.funcUnits2.opClasses.opClasses]
351type=MinorOpClass
352eventq_index=0
353opClass=IntMult
354
355[system.cpu.executeFuncUnits.funcUnits2.timings]
356type=MinorFUTiming
357children=opClasses
358description=Mul
359eventq_index=0
360extraAssumedLat=0
361extraCommitLat=0
362extraCommitLatExpr=Null
363mask=0
364match=0
365opClasses=system.cpu.executeFuncUnits.funcUnits2.timings.opClasses
366srcRegsRelativeLats=0
367suppress=false
368
369[system.cpu.executeFuncUnits.funcUnits2.timings.opClasses]
370type=MinorOpClassSet
371eventq_index=0
372opClasses=
373
374[system.cpu.executeFuncUnits.funcUnits3]
375type=MinorFU
376children=opClasses
377cantForwardFromFUIndices=
378eventq_index=0
379issueLat=9
380opClasses=system.cpu.executeFuncUnits.funcUnits3.opClasses
381opLat=9
382timings=
383
384[system.cpu.executeFuncUnits.funcUnits3.opClasses]
385type=MinorOpClassSet
386children=opClasses
387eventq_index=0
388opClasses=system.cpu.executeFuncUnits.funcUnits3.opClasses.opClasses
389
390[system.cpu.executeFuncUnits.funcUnits3.opClasses.opClasses]
391type=MinorOpClass
392eventq_index=0
393opClass=IntDiv
394
395[system.cpu.executeFuncUnits.funcUnits4]
396type=MinorFU
397children=opClasses timings
398cantForwardFromFUIndices=
399eventq_index=0
400issueLat=1
401opClasses=system.cpu.executeFuncUnits.funcUnits4.opClasses
402opLat=6
403timings=system.cpu.executeFuncUnits.funcUnits4.timings
404
405[system.cpu.executeFuncUnits.funcUnits4.opClasses]
406type=MinorOpClassSet
407children=opClasses00 opClasses01 opClasses02 opClasses03 opClasses04 opClasses05 opClasses06 opClasses07 opClasses08 opClasses09 opClasses10 opClasses11 opClasses12 opClasses13 opClasses14 opClasses15 opClasses16 opClasses17 opClasses18 opClasses19 opClasses20 opClasses21 opClasses22 opClasses23 opClasses24 opClasses25
408eventq_index=0
409opClasses=system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses00 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses01 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses02 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses03 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses04 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses05 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses06 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses07 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses08 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses09 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses10 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses11 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses12 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses13 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses14 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses15 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses16 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses17 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses18 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses19 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses20 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses21 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses22 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses23 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses24 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses25
410
411[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses00]
412type=MinorOpClass
413eventq_index=0
414opClass=FloatAdd
415
416[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses01]
417type=MinorOpClass
418eventq_index=0
419opClass=FloatCmp
420
421[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses02]
422type=MinorOpClass
423eventq_index=0
424opClass=FloatCvt
425
426[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses03]
427type=MinorOpClass
428eventq_index=0
429opClass=FloatMult
430
431[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses04]
432type=MinorOpClass
433eventq_index=0
434opClass=FloatDiv
435
436[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses05]
437type=MinorOpClass
438eventq_index=0
439opClass=FloatSqrt
440
441[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses06]
442type=MinorOpClass
443eventq_index=0
444opClass=SimdAdd
445
446[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses07]
447type=MinorOpClass
448eventq_index=0
449opClass=SimdAddAcc
450
451[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses08]
452type=MinorOpClass
453eventq_index=0
454opClass=SimdAlu
455
456[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses09]
457type=MinorOpClass
458eventq_index=0
459opClass=SimdCmp
460
461[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses10]
462type=MinorOpClass
463eventq_index=0
464opClass=SimdCvt
465
466[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses11]
467type=MinorOpClass
468eventq_index=0
469opClass=SimdMisc
470
471[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses12]
472type=MinorOpClass
473eventq_index=0
474opClass=SimdMult
475
476[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses13]
477type=MinorOpClass
478eventq_index=0
479opClass=SimdMultAcc
480
481[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses14]
482type=MinorOpClass
483eventq_index=0
484opClass=SimdShift
485
486[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses15]
487type=MinorOpClass
488eventq_index=0
489opClass=SimdShiftAcc
490
491[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses16]
492type=MinorOpClass
493eventq_index=0
494opClass=SimdSqrt
495
496[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses17]
497type=MinorOpClass
498eventq_index=0
499opClass=SimdFloatAdd
500
501[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses18]
502type=MinorOpClass
503eventq_index=0
504opClass=SimdFloatAlu
505
506[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses19]
507type=MinorOpClass
508eventq_index=0
509opClass=SimdFloatCmp
510
511[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses20]
512type=MinorOpClass
513eventq_index=0
514opClass=SimdFloatCvt
515
516[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses21]
517type=MinorOpClass
518eventq_index=0
519opClass=SimdFloatDiv
520
521[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses22]
522type=MinorOpClass
523eventq_index=0
524opClass=SimdFloatMisc
525
526[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses23]
527type=MinorOpClass
528eventq_index=0
529opClass=SimdFloatMult
530
531[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses24]
532type=MinorOpClass
533eventq_index=0
534opClass=SimdFloatMultAcc
535
536[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses25]
537type=MinorOpClass
538eventq_index=0
539opClass=SimdFloatSqrt
540
541[system.cpu.executeFuncUnits.funcUnits4.timings]
542type=MinorFUTiming
543children=opClasses
544description=FloatSimd
545eventq_index=0
546extraAssumedLat=0
547extraCommitLat=0
548extraCommitLatExpr=Null
549mask=0
550match=0
551opClasses=system.cpu.executeFuncUnits.funcUnits4.timings.opClasses
552srcRegsRelativeLats=2
553suppress=false
554
555[system.cpu.executeFuncUnits.funcUnits4.timings.opClasses]
556type=MinorOpClassSet
557eventq_index=0
558opClasses=
559
560[system.cpu.executeFuncUnits.funcUnits5]
561type=MinorFU
562children=opClasses timings
563cantForwardFromFUIndices=
564eventq_index=0
565issueLat=1
566opClasses=system.cpu.executeFuncUnits.funcUnits5.opClasses
567opLat=1
568timings=system.cpu.executeFuncUnits.funcUnits5.timings
569
570[system.cpu.executeFuncUnits.funcUnits5.opClasses]
571type=MinorOpClassSet
572children=opClasses0 opClasses1
573eventq_index=0
574opClasses=system.cpu.executeFuncUnits.funcUnits5.opClasses.opClasses0 system.cpu.executeFuncUnits.funcUnits5.opClasses.opClasses1
575
576[system.cpu.executeFuncUnits.funcUnits5.opClasses.opClasses0]
577type=MinorOpClass
578eventq_index=0
579opClass=MemRead
580
581[system.cpu.executeFuncUnits.funcUnits5.opClasses.opClasses1]
582type=MinorOpClass
583eventq_index=0
584opClass=MemWrite
585
586[system.cpu.executeFuncUnits.funcUnits5.timings]
587type=MinorFUTiming
588children=opClasses
589description=Mem
590eventq_index=0
591extraAssumedLat=2
592extraCommitLat=0
593extraCommitLatExpr=Null
594mask=0
595match=0
596opClasses=system.cpu.executeFuncUnits.funcUnits5.timings.opClasses
597srcRegsRelativeLats=1
598suppress=false
599
600[system.cpu.executeFuncUnits.funcUnits5.timings.opClasses]
601type=MinorOpClassSet
602eventq_index=0
603opClasses=
604
605[system.cpu.executeFuncUnits.funcUnits6]
606type=MinorFU
607children=opClasses
608cantForwardFromFUIndices=
609eventq_index=0
610issueLat=1
611opClasses=system.cpu.executeFuncUnits.funcUnits6.opClasses
612opLat=1
613timings=
614
615[system.cpu.executeFuncUnits.funcUnits6.opClasses]
616type=MinorOpClassSet
617children=opClasses0 opClasses1
618eventq_index=0
619opClasses=system.cpu.executeFuncUnits.funcUnits6.opClasses.opClasses0 system.cpu.executeFuncUnits.funcUnits6.opClasses.opClasses1
620
621[system.cpu.executeFuncUnits.funcUnits6.opClasses.opClasses0]
622type=MinorOpClass
623eventq_index=0
624opClass=IprAccess
625
626[system.cpu.executeFuncUnits.funcUnits6.opClasses.opClasses1]
627type=MinorOpClass
628eventq_index=0
629opClass=InstPrefetch
630
631[system.cpu.icache]
632type=Cache
633children=tags
634addr_ranges=0:18446744073709551615:0:0:0:0
635assoc=2
636clk_domain=system.cpu_clk_domain
637clusivity=mostly_incl
638default_p_state=UNDEFINED
639demand_mshr_reserve=1
640eventq_index=0
641hit_latency=2
642is_read_only=true
643max_miss_count=0
644mshrs=4
645p_state_clk_gate_bins=20
646p_state_clk_gate_max=1000000000000
647p_state_clk_gate_min=1000
648power_model=Null
649prefetch_on_access=false
650prefetcher=Null
651response_latency=2
652sequential_access=false
653size=131072
654system=system
655tags=system.cpu.icache.tags
656tgts_per_mshr=20
657write_buffers=8
658writeback_clean=true
659cpu_side=system.cpu.icache_port
660mem_side=system.cpu.toL2Bus.slave[0]
661
662[system.cpu.icache.tags]
663type=LRU
664assoc=2
665block_size=64
666clk_domain=system.cpu_clk_domain
667default_p_state=UNDEFINED
668eventq_index=0
669hit_latency=2
670p_state_clk_gate_bins=20
671p_state_clk_gate_max=1000000000000
672p_state_clk_gate_min=1000
673power_model=Null
674sequential_access=false
675size=131072
676
677[system.cpu.interrupts]
678type=ArmInterrupts
679eventq_index=0
680
681[system.cpu.isa]
682type=ArmISA
683decoderFlavour=Generic
684eventq_index=0
685fpsid=1090793632
686id_aa64afr0_el1=0
687id_aa64afr1_el1=0
688id_aa64dfr0_el1=1052678
689id_aa64dfr1_el1=0
690id_aa64isar0_el1=0
691id_aa64isar1_el1=0
692id_aa64mmfr0_el1=15728642
693id_aa64mmfr1_el1=0
694id_aa64pfr0_el1=34
695id_aa64pfr1_el1=0
696id_isar0=34607377
697id_isar1=34677009
698id_isar2=555950401
699id_isar3=17899825
700id_isar4=268501314
701id_isar5=0
702id_mmfr0=270536963
703id_mmfr1=0
704id_mmfr2=19070976
705id_mmfr3=34611729
706id_pfr0=49
707id_pfr1=4113
708midr=1091551472
709pmu=Null
710system=system
711
712[system.cpu.istage2_mmu]
713type=ArmStage2MMU
714children=stage2_tlb
715eventq_index=0
716stage2_tlb=system.cpu.istage2_mmu.stage2_tlb
717sys=system
718tlb=system.cpu.itb
719
720[system.cpu.istage2_mmu.stage2_tlb]
721type=ArmTLB
722children=walker
723eventq_index=0
724is_stage2=true
725size=32
726walker=system.cpu.istage2_mmu.stage2_tlb.walker
727
728[system.cpu.istage2_mmu.stage2_tlb.walker]
729type=ArmTableWalker
730clk_domain=system.cpu_clk_domain
731default_p_state=UNDEFINED
732eventq_index=0
733is_stage2=true
734num_squash_per_cycle=2
735p_state_clk_gate_bins=20
736p_state_clk_gate_max=1000000000000
737p_state_clk_gate_min=1000
738power_model=Null
739sys=system
740
741[system.cpu.itb]
742type=ArmTLB
743children=walker
744eventq_index=0
745is_stage2=false
746size=64
747walker=system.cpu.itb.walker
748
749[system.cpu.itb.walker]
750type=ArmTableWalker
751clk_domain=system.cpu_clk_domain
752default_p_state=UNDEFINED
753eventq_index=0
754is_stage2=false
755num_squash_per_cycle=2
756p_state_clk_gate_bins=20
757p_state_clk_gate_max=1000000000000
758p_state_clk_gate_min=1000
759power_model=Null
760sys=system
761port=system.cpu.toL2Bus.slave[2]
762
763[system.cpu.l2cache]
764type=Cache
765children=tags
766addr_ranges=0:18446744073709551615:0:0:0:0
767assoc=8
768clk_domain=system.cpu_clk_domain
769clusivity=mostly_incl
770default_p_state=UNDEFINED
771demand_mshr_reserve=1
772eventq_index=0
773hit_latency=20
774is_read_only=false
775max_miss_count=0
776mshrs=20
777p_state_clk_gate_bins=20
778p_state_clk_gate_max=1000000000000
779p_state_clk_gate_min=1000
780power_model=Null
781prefetch_on_access=false
782prefetcher=Null
783response_latency=20
784sequential_access=false
785size=2097152
786system=system
787tags=system.cpu.l2cache.tags
788tgts_per_mshr=12
789write_buffers=8
790writeback_clean=false
791cpu_side=system.cpu.toL2Bus.master[0]
792mem_side=system.membus.slave[1]
793
794[system.cpu.l2cache.tags]
795type=LRU
796assoc=8
797block_size=64
798clk_domain=system.cpu_clk_domain
799default_p_state=UNDEFINED
800eventq_index=0
801hit_latency=20
802p_state_clk_gate_bins=20
803p_state_clk_gate_max=1000000000000
804p_state_clk_gate_min=1000
805power_model=Null
806sequential_access=false
807size=2097152
808
809[system.cpu.toL2Bus]
810type=CoherentXBar
811children=snoop_filter
812clk_domain=system.cpu_clk_domain
813default_p_state=UNDEFINED
814eventq_index=0
815forward_latency=0
816frontend_latency=1
817p_state_clk_gate_bins=20
818p_state_clk_gate_max=1000000000000
819p_state_clk_gate_min=1000
820point_of_coherency=false
821power_model=Null
822response_latency=1
823snoop_filter=system.cpu.toL2Bus.snoop_filter
824snoop_response_latency=1
825system=system
826use_default_range=false
827width=32
828master=system.cpu.l2cache.cpu_side
829slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port
830
831[system.cpu.toL2Bus.snoop_filter]
832type=SnoopFilter
833eventq_index=0
834lookup_latency=0
835max_capacity=8388608
836system=system
837
838[system.cpu.tracer]
839type=ExeTracer
840eventq_index=0
841
842[system.cpu.workload]
843type=LiveProcess
844cmd=mcf mcf.in
845cwd=build/ARM/tests/opt/long/se/10.mcf/arm/linux/minor-timing
846drivers=
847egid=100
848env=
849errout=cerr
850euid=100
851eventq_index=0
852executable=/arm/projectscratch/randd/systems/dist/cpu2000/binaries/arm/linux/mcf
853gid=100
854input=/arm/projectscratch/randd/systems/dist/cpu2000/data/mcf/smred/input/mcf.in
855kvmInSE=false
856max_stack_size=67108864
857output=cout
858pid=100
859ppid=99
860simpoint=55300000000
861system=system
862uid=100
863useArchPT=false
864
865[system.cpu_clk_domain]
866type=SrcClockDomain
867clock=500
868domain_id=-1
869eventq_index=0
870init_perf_level=0
871voltage_domain=system.voltage_domain
872
873[system.dvfs_handler]
874type=DVFSHandler
875domains=
876enable=false
877eventq_index=0
878sys_clk_domain=system.clk_domain
879transition_latency=100000000
880
881[system.membus]
882type=CoherentXBar
883children=snoop_filter
884clk_domain=system.clk_domain
885default_p_state=UNDEFINED
886eventq_index=0
887forward_latency=4
888frontend_latency=3
889p_state_clk_gate_bins=20
890p_state_clk_gate_max=1000000000000
891p_state_clk_gate_min=1000
892point_of_coherency=true
893power_model=Null
894response_latency=2
895snoop_filter=system.membus.snoop_filter
896snoop_response_latency=4
897system=system
898use_default_range=false
899width=16
900master=system.physmem.port
901slave=system.system_port system.cpu.l2cache.mem_side
902
903[system.membus.snoop_filter]
904type=SnoopFilter
905eventq_index=0
906lookup_latency=1
907max_capacity=8388608
908system=system
909
910[system.physmem]
911type=DRAMCtrl
912IDD0=0.055000
913IDD02=0.000000
914IDD2N=0.032000
915IDD2N2=0.000000
916IDD2P0=0.000000
917IDD2P02=0.000000
918IDD2P1=0.032000
919IDD2P12=0.000000
920IDD3N=0.038000
921IDD3N2=0.000000
922IDD3P0=0.000000
923IDD3P02=0.000000
924IDD3P1=0.038000
925IDD3P12=0.000000
926IDD4R=0.157000
927IDD4R2=0.000000
928IDD4W=0.125000
929IDD4W2=0.000000
930IDD5=0.235000
931IDD52=0.000000
932IDD6=0.020000
933IDD62=0.000000
934VDD=1.500000
935VDD2=0.000000
936activation_limit=4
937addr_mapping=RoRaBaCoCh
938bank_groups_per_rank=0
939banks_per_rank=8
940burst_length=8
941channels=1
942clk_domain=system.clk_domain
943conf_table_reported=true
944default_p_state=UNDEFINED
945device_bus_width=8
946device_rowbuffer_size=1024
947device_size=536870912
948devices_per_rank=8
949dll=true
950eventq_index=0
951in_addr_map=true
952kvm_map=true
953max_accesses_per_row=16
954mem_sched_policy=frfcfs
955min_writes_per_switch=16
956null=false
957p_state_clk_gate_bins=20
958p_state_clk_gate_max=1000000000000
959p_state_clk_gate_min=1000
960page_policy=open_adaptive
961power_model=Null
962range=0:268435455:0:0:0:0
963ranks_per_channel=2
964read_buffer_size=32
965static_backend_latency=10000
966static_frontend_latency=10000
967tBURST=5000
968tCCD_L=0
969tCK=1250
970tCL=13750
971tCS=2500
972tRAS=35000
973tRCD=13750
974tREFI=7800000
975tRFC=260000
976tRP=13750
977tRRD=6000
978tRRD_L=0
979tRTP=7500
980tRTW=2500
981tWR=15000
982tWTR=7500
983tXAW=30000
984tXP=6000
985tXPDLL=0
986tXS=270000
987tXSDLL=0
988write_buffer_size=64
989write_high_thresh_perc=85
990write_low_thresh_perc=50
991port=system.membus.master[0]
992
993[system.voltage_domain]
994type=VoltageDomain
995eventq_index=0
996voltage=1.000000
997
998