config.ini revision 11374:c1525cc9ec7f
1[root] 2type=Root 3children=system 4eventq_index=0 5full_system=true 6sim_quantum=0 7time_sync_enable=false 8time_sync_period=100000000000 9time_sync_spin_threshold=100000000 10 11[system] 12type=LinuxArmSystem 13children=bridge cf0 clk_domain cpu0 cpu1 cpu_clk_domain dvfs_handler intrctrl iobus iocache l2c membus physmem realview terminal toL2Bus vncserver voltage_domain 14atags_addr=134217728 15boot_loader=/home/stever/m5/aarch-system-2014-10/binaries/boot_emm.arm 16boot_osflags=earlyprintk=pl011,0x1c090000 console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=256MB root=/dev/sda1 17cache_line_size=64 18clk_domain=system.clk_domain 19dtb_filename=/home/stever/m5/aarch-system-2014-10/binaries/vexpress.aarch32.ll_20131205.0-gem5.2cpu.dtb 20early_kernel_symbols=false 21enable_context_switch_stats_dump=false 22eventq_index=0 23exit_on_work_items=false 24flags_addr=469827632 25gic_cpu_addr=738205696 26have_large_asid_64=false 27have_lpae=false 28have_security=false 29have_virtualization=false 30highest_el_is_64=false 31init_param=0 32kernel=/home/stever/m5/aarch-system-2014-10/binaries/vmlinux.aarch32.ll_20131205.0-gem5 33kernel_addr_check=true 34load_addr_mask=268435455 35load_offset=2147483648 36machine_type=VExpress_EMM 37mem_mode=timing 38mem_ranges=2147483648:2415919103 39memories=system.physmem system.realview.nvmem system.realview.vram 40mmap_using_noreserve=false 41multi_proc=true 42multi_thread=false 43num_work_ids=16 44panic_on_oops=true 45panic_on_panic=true 46phys_addr_range_64=40 47readfile=/home/stever/hg/m5sim.org/gem5/tests/halt.sh 48reset_addr_64=0 49symbolfile= 50work_begin_ckpt_count=0 51work_begin_cpu_id_exit=-1 52work_begin_exit_count=0 53work_cpus_ckpt_count=0 54work_end_ckpt_count=0 55work_end_exit_count=0 56work_item_id=-1 57system_port=system.membus.slave[1] 58 59[system.bridge] 60type=Bridge 61clk_domain=system.clk_domain 62delay=50000 63eventq_index=0 64ranges=788529152:805306367 721420288:725614591 805306368:1073741823 1073741824:1610612735 402653184:469762047 469762048:536870911 65req_size=16 66resp_size=16 67master=system.iobus.slave[0] 68slave=system.membus.master[0] 69 70[system.cf0] 71type=IdeDisk 72children=image 73delay=1000000 74driveID=master 75eventq_index=0 76image=system.cf0.image 77 78[system.cf0.image] 79type=CowDiskImage 80children=child 81child=system.cf0.image.child 82eventq_index=0 83image_file= 84read_only=false 85table_size=65536 86 87[system.cf0.image.child] 88type=RawDiskImage 89eventq_index=0 90image_file=/home/stever/m5/aarch-system-2014-10/disks/linux-aarch32-ael.img 91read_only=true 92 93[system.clk_domain] 94type=SrcClockDomain 95clock=1000 96domain_id=-1 97eventq_index=0 98init_perf_level=0 99voltage_domain=system.voltage_domain 100 101[system.cpu0] 102type=DerivO3CPU 103children=branchPred dcache dstage2_mmu dtb fuPool icache interrupts isa istage2_mmu itb l2cache toL2Bus tracer 104LFSTSize=1024 105LQEntries=16 106LSQCheckLoads=true 107LSQDepCheckShift=0 108SQEntries=16 109SSITSize=1024 110activity=0 111backComSize=5 112branchPred=system.cpu0.branchPred 113cachePorts=200 114checker=Null 115clk_domain=system.cpu_clk_domain 116commitToDecodeDelay=1 117commitToFetchDelay=1 118commitToIEWDelay=1 119commitToRenameDelay=1 120commitWidth=8 121cpu_id=0 122decodeToFetchDelay=1 123decodeToRenameDelay=2 124decodeWidth=3 125dispatchWidth=6 126do_checkpoint_insts=true 127do_quiesce=true 128do_statistics_insts=true 129dstage2_mmu=system.cpu0.dstage2_mmu 130dtb=system.cpu0.dtb 131eventq_index=0 132fetchBufferSize=16 133fetchQueueSize=32 134fetchToDecodeDelay=3 135fetchTrapLatency=1 136fetchWidth=3 137forwardComSize=5 138fuPool=system.cpu0.fuPool 139function_trace=false 140function_trace_start=0 141iewToCommitDelay=1 142iewToDecodeDelay=1 143iewToFetchDelay=1 144iewToRenameDelay=1 145interrupts=system.cpu0.interrupts 146isa=system.cpu0.isa 147issueToExecuteDelay=1 148issueWidth=8 149istage2_mmu=system.cpu0.istage2_mmu 150itb=system.cpu0.itb 151max_insts_all_threads=0 152max_insts_any_thread=0 153max_loads_all_threads=0 154max_loads_any_thread=0 155needsTSO=false 156numIQEntries=32 157numPhysCCRegs=640 158numPhysFloatRegs=192 159numPhysIntRegs=128 160numROBEntries=40 161numRobs=1 162numThreads=1 163profile=0 164progress_interval=0 165renameToDecodeDelay=1 166renameToFetchDelay=1 167renameToIEWDelay=1 168renameToROBDelay=1 169renameWidth=3 170simpoint_start_insts= 171smtCommitPolicy=RoundRobin 172smtFetchPolicy=SingleThread 173smtIQPolicy=Partitioned 174smtIQThreshold=100 175smtLSQPolicy=Partitioned 176smtLSQThreshold=100 177smtNumFetchingThreads=1 178smtROBPolicy=Partitioned 179smtROBThreshold=100 180socket_id=0 181squashWidth=8 182store_set_clear_period=250000 183switched_out=false 184system=system 185tracer=system.cpu0.tracer 186trapLatency=13 187wbWidth=8 188workload= 189dcache_port=system.cpu0.dcache.cpu_side 190icache_port=system.cpu0.icache.cpu_side 191 192[system.cpu0.branchPred] 193type=BiModeBP 194BTBEntries=2048 195BTBTagSize=18 196RASSize=16 197choiceCtrBits=2 198choicePredictorSize=8192 199eventq_index=0 200globalCtrBits=2 201globalPredictorSize=8192 202instShiftAmt=2 203numThreads=1 204 205[system.cpu0.dcache] 206type=Cache 207children=tags 208addr_ranges=0:18446744073709551615 209assoc=2 210clk_domain=system.cpu_clk_domain 211clusivity=mostly_incl 212demand_mshr_reserve=1 213eventq_index=0 214hit_latency=2 215is_read_only=false 216max_miss_count=0 217mshrs=6 218prefetch_on_access=false 219prefetcher=Null 220response_latency=2 221sequential_access=false 222size=32768 223system=system 224tags=system.cpu0.dcache.tags 225tgts_per_mshr=8 226write_buffers=16 227writeback_clean=true 228cpu_side=system.cpu0.dcache_port 229mem_side=system.cpu0.toL2Bus.slave[1] 230 231[system.cpu0.dcache.tags] 232type=LRU 233assoc=2 234block_size=64 235clk_domain=system.cpu_clk_domain 236eventq_index=0 237hit_latency=2 238sequential_access=false 239size=32768 240 241[system.cpu0.dstage2_mmu] 242type=ArmStage2MMU 243children=stage2_tlb 244eventq_index=0 245stage2_tlb=system.cpu0.dstage2_mmu.stage2_tlb 246sys=system 247tlb=system.cpu0.dtb 248 249[system.cpu0.dstage2_mmu.stage2_tlb] 250type=ArmTLB 251children=walker 252eventq_index=0 253is_stage2=true 254size=32 255walker=system.cpu0.dstage2_mmu.stage2_tlb.walker 256 257[system.cpu0.dstage2_mmu.stage2_tlb.walker] 258type=ArmTableWalker 259clk_domain=system.cpu_clk_domain 260eventq_index=0 261is_stage2=true 262num_squash_per_cycle=2 263sys=system 264 265[system.cpu0.dtb] 266type=ArmTLB 267children=walker 268eventq_index=0 269is_stage2=false 270size=64 271walker=system.cpu0.dtb.walker 272 273[system.cpu0.dtb.walker] 274type=ArmTableWalker 275clk_domain=system.cpu_clk_domain 276eventq_index=0 277is_stage2=false 278num_squash_per_cycle=2 279sys=system 280port=system.cpu0.toL2Bus.slave[3] 281 282[system.cpu0.fuPool] 283type=FUPool 284children=FUList0 FUList1 FUList2 FUList3 FUList4 285FUList=system.cpu0.fuPool.FUList0 system.cpu0.fuPool.FUList1 system.cpu0.fuPool.FUList2 system.cpu0.fuPool.FUList3 system.cpu0.fuPool.FUList4 286eventq_index=0 287 288[system.cpu0.fuPool.FUList0] 289type=FUDesc 290children=opList 291count=2 292eventq_index=0 293opList=system.cpu0.fuPool.FUList0.opList 294 295[system.cpu0.fuPool.FUList0.opList] 296type=OpDesc 297eventq_index=0 298opClass=IntAlu 299opLat=1 300pipelined=true 301 302[system.cpu0.fuPool.FUList1] 303type=FUDesc 304children=opList0 opList1 opList2 305count=1 306eventq_index=0 307opList=system.cpu0.fuPool.FUList1.opList0 system.cpu0.fuPool.FUList1.opList1 system.cpu0.fuPool.FUList1.opList2 308 309[system.cpu0.fuPool.FUList1.opList0] 310type=OpDesc 311eventq_index=0 312opClass=IntMult 313opLat=3 314pipelined=true 315 316[system.cpu0.fuPool.FUList1.opList1] 317type=OpDesc 318eventq_index=0 319opClass=IntDiv 320opLat=12 321pipelined=false 322 323[system.cpu0.fuPool.FUList1.opList2] 324type=OpDesc 325eventq_index=0 326opClass=IprAccess 327opLat=3 328pipelined=true 329 330[system.cpu0.fuPool.FUList2] 331type=FUDesc 332children=opList 333count=1 334eventq_index=0 335opList=system.cpu0.fuPool.FUList2.opList 336 337[system.cpu0.fuPool.FUList2.opList] 338type=OpDesc 339eventq_index=0 340opClass=MemRead 341opLat=2 342pipelined=true 343 344[system.cpu0.fuPool.FUList3] 345type=FUDesc 346children=opList 347count=1 348eventq_index=0 349opList=system.cpu0.fuPool.FUList3.opList 350 351[system.cpu0.fuPool.FUList3.opList] 352type=OpDesc 353eventq_index=0 354opClass=MemWrite 355opLat=2 356pipelined=true 357 358[system.cpu0.fuPool.FUList4] 359type=FUDesc 360children=opList00 opList01 opList02 opList03 opList04 opList05 opList06 opList07 opList08 opList09 opList10 opList11 opList12 opList13 opList14 opList15 opList16 opList17 opList18 opList19 opList20 opList21 opList22 opList23 opList24 opList25 361count=2 362eventq_index=0 363opList=system.cpu0.fuPool.FUList4.opList00 system.cpu0.fuPool.FUList4.opList01 system.cpu0.fuPool.FUList4.opList02 system.cpu0.fuPool.FUList4.opList03 system.cpu0.fuPool.FUList4.opList04 system.cpu0.fuPool.FUList4.opList05 system.cpu0.fuPool.FUList4.opList06 system.cpu0.fuPool.FUList4.opList07 system.cpu0.fuPool.FUList4.opList08 system.cpu0.fuPool.FUList4.opList09 system.cpu0.fuPool.FUList4.opList10 system.cpu0.fuPool.FUList4.opList11 system.cpu0.fuPool.FUList4.opList12 system.cpu0.fuPool.FUList4.opList13 system.cpu0.fuPool.FUList4.opList14 system.cpu0.fuPool.FUList4.opList15 system.cpu0.fuPool.FUList4.opList16 system.cpu0.fuPool.FUList4.opList17 system.cpu0.fuPool.FUList4.opList18 system.cpu0.fuPool.FUList4.opList19 system.cpu0.fuPool.FUList4.opList20 system.cpu0.fuPool.FUList4.opList21 system.cpu0.fuPool.FUList4.opList22 system.cpu0.fuPool.FUList4.opList23 system.cpu0.fuPool.FUList4.opList24 system.cpu0.fuPool.FUList4.opList25 364 365[system.cpu0.fuPool.FUList4.opList00] 366type=OpDesc 367eventq_index=0 368opClass=SimdAdd 369opLat=4 370pipelined=true 371 372[system.cpu0.fuPool.FUList4.opList01] 373type=OpDesc 374eventq_index=0 375opClass=SimdAddAcc 376opLat=4 377pipelined=true 378 379[system.cpu0.fuPool.FUList4.opList02] 380type=OpDesc 381eventq_index=0 382opClass=SimdAlu 383opLat=4 384pipelined=true 385 386[system.cpu0.fuPool.FUList4.opList03] 387type=OpDesc 388eventq_index=0 389opClass=SimdCmp 390opLat=4 391pipelined=true 392 393[system.cpu0.fuPool.FUList4.opList04] 394type=OpDesc 395eventq_index=0 396opClass=SimdCvt 397opLat=3 398pipelined=true 399 400[system.cpu0.fuPool.FUList4.opList05] 401type=OpDesc 402eventq_index=0 403opClass=SimdMisc 404opLat=3 405pipelined=true 406 407[system.cpu0.fuPool.FUList4.opList06] 408type=OpDesc 409eventq_index=0 410opClass=SimdMult 411opLat=5 412pipelined=true 413 414[system.cpu0.fuPool.FUList4.opList07] 415type=OpDesc 416eventq_index=0 417opClass=SimdMultAcc 418opLat=5 419pipelined=true 420 421[system.cpu0.fuPool.FUList4.opList08] 422type=OpDesc 423eventq_index=0 424opClass=SimdShift 425opLat=3 426pipelined=true 427 428[system.cpu0.fuPool.FUList4.opList09] 429type=OpDesc 430eventq_index=0 431opClass=SimdShiftAcc 432opLat=3 433pipelined=true 434 435[system.cpu0.fuPool.FUList4.opList10] 436type=OpDesc 437eventq_index=0 438opClass=SimdSqrt 439opLat=9 440pipelined=true 441 442[system.cpu0.fuPool.FUList4.opList11] 443type=OpDesc 444eventq_index=0 445opClass=SimdFloatAdd 446opLat=5 447pipelined=true 448 449[system.cpu0.fuPool.FUList4.opList12] 450type=OpDesc 451eventq_index=0 452opClass=SimdFloatAlu 453opLat=5 454pipelined=true 455 456[system.cpu0.fuPool.FUList4.opList13] 457type=OpDesc 458eventq_index=0 459opClass=SimdFloatCmp 460opLat=3 461pipelined=true 462 463[system.cpu0.fuPool.FUList4.opList14] 464type=OpDesc 465eventq_index=0 466opClass=SimdFloatCvt 467opLat=3 468pipelined=true 469 470[system.cpu0.fuPool.FUList4.opList15] 471type=OpDesc 472eventq_index=0 473opClass=SimdFloatDiv 474opLat=3 475pipelined=true 476 477[system.cpu0.fuPool.FUList4.opList16] 478type=OpDesc 479eventq_index=0 480opClass=SimdFloatMisc 481opLat=3 482pipelined=true 483 484[system.cpu0.fuPool.FUList4.opList17] 485type=OpDesc 486eventq_index=0 487opClass=SimdFloatMult 488opLat=3 489pipelined=true 490 491[system.cpu0.fuPool.FUList4.opList18] 492type=OpDesc 493eventq_index=0 494opClass=SimdFloatMultAcc 495opLat=1 496pipelined=true 497 498[system.cpu0.fuPool.FUList4.opList19] 499type=OpDesc 500eventq_index=0 501opClass=SimdFloatSqrt 502opLat=9 503pipelined=true 504 505[system.cpu0.fuPool.FUList4.opList20] 506type=OpDesc 507eventq_index=0 508opClass=FloatAdd 509opLat=5 510pipelined=true 511 512[system.cpu0.fuPool.FUList4.opList21] 513type=OpDesc 514eventq_index=0 515opClass=FloatCmp 516opLat=5 517pipelined=true 518 519[system.cpu0.fuPool.FUList4.opList22] 520type=OpDesc 521eventq_index=0 522opClass=FloatCvt 523opLat=5 524pipelined=true 525 526[system.cpu0.fuPool.FUList4.opList23] 527type=OpDesc 528eventq_index=0 529opClass=FloatDiv 530opLat=9 531pipelined=false 532 533[system.cpu0.fuPool.FUList4.opList24] 534type=OpDesc 535eventq_index=0 536opClass=FloatSqrt 537opLat=33 538pipelined=false 539 540[system.cpu0.fuPool.FUList4.opList25] 541type=OpDesc 542eventq_index=0 543opClass=FloatMult 544opLat=4 545pipelined=true 546 547[system.cpu0.icache] 548type=Cache 549children=tags 550addr_ranges=0:18446744073709551615 551assoc=2 552clk_domain=system.cpu_clk_domain 553clusivity=mostly_incl 554demand_mshr_reserve=1 555eventq_index=0 556hit_latency=1 557is_read_only=true 558max_miss_count=0 559mshrs=2 560prefetch_on_access=false 561prefetcher=Null 562response_latency=1 563sequential_access=false 564size=32768 565system=system 566tags=system.cpu0.icache.tags 567tgts_per_mshr=8 568write_buffers=8 569writeback_clean=true 570cpu_side=system.cpu0.icache_port 571mem_side=system.cpu0.toL2Bus.slave[0] 572 573[system.cpu0.icache.tags] 574type=LRU 575assoc=2 576block_size=64 577clk_domain=system.cpu_clk_domain 578eventq_index=0 579hit_latency=1 580sequential_access=false 581size=32768 582 583[system.cpu0.interrupts] 584type=ArmInterrupts 585eventq_index=0 586 587[system.cpu0.isa] 588type=ArmISA 589decoderFlavour=Generic 590eventq_index=0 591fpsid=1090793632 592id_aa64afr0_el1=0 593id_aa64afr1_el1=0 594id_aa64dfr0_el1=1052678 595id_aa64dfr1_el1=0 596id_aa64isar0_el1=0 597id_aa64isar1_el1=0 598id_aa64mmfr0_el1=15728642 599id_aa64mmfr1_el1=0 600id_aa64pfr0_el1=17 601id_aa64pfr1_el1=0 602id_isar0=34607377 603id_isar1=34677009 604id_isar2=555950401 605id_isar3=17899825 606id_isar4=268501314 607id_isar5=0 608id_mmfr0=270536963 609id_mmfr1=0 610id_mmfr2=19070976 611id_mmfr3=34611729 612id_pfr0=49 613id_pfr1=4113 614midr=1091551472 615pmu=Null 616system=system 617 618[system.cpu0.istage2_mmu] 619type=ArmStage2MMU 620children=stage2_tlb 621eventq_index=0 622stage2_tlb=system.cpu0.istage2_mmu.stage2_tlb 623sys=system 624tlb=system.cpu0.itb 625 626[system.cpu0.istage2_mmu.stage2_tlb] 627type=ArmTLB 628children=walker 629eventq_index=0 630is_stage2=true 631size=32 632walker=system.cpu0.istage2_mmu.stage2_tlb.walker 633 634[system.cpu0.istage2_mmu.stage2_tlb.walker] 635type=ArmTableWalker 636clk_domain=system.cpu_clk_domain 637eventq_index=0 638is_stage2=true 639num_squash_per_cycle=2 640sys=system 641 642[system.cpu0.itb] 643type=ArmTLB 644children=walker 645eventq_index=0 646is_stage2=false 647size=64 648walker=system.cpu0.itb.walker 649 650[system.cpu0.itb.walker] 651type=ArmTableWalker 652clk_domain=system.cpu_clk_domain 653eventq_index=0 654is_stage2=false 655num_squash_per_cycle=2 656sys=system 657port=system.cpu0.toL2Bus.slave[2] 658 659[system.cpu0.l2cache] 660type=Cache 661children=prefetcher tags 662addr_ranges=0:18446744073709551615 663assoc=16 664clk_domain=system.cpu_clk_domain 665clusivity=mostly_excl 666demand_mshr_reserve=1 667eventq_index=0 668hit_latency=12 669is_read_only=false 670max_miss_count=0 671mshrs=16 672prefetch_on_access=true 673prefetcher=system.cpu0.l2cache.prefetcher 674response_latency=12 675sequential_access=false 676size=1048576 677system=system 678tags=system.cpu0.l2cache.tags 679tgts_per_mshr=8 680write_buffers=8 681writeback_clean=false 682cpu_side=system.cpu0.toL2Bus.master[0] 683mem_side=system.toL2Bus.slave[0] 684 685[system.cpu0.l2cache.prefetcher] 686type=StridePrefetcher 687cache_snoop=false 688clk_domain=system.cpu_clk_domain 689degree=8 690eventq_index=0 691latency=1 692max_conf=7 693min_conf=0 694on_data=true 695on_inst=true 696on_miss=false 697on_read=true 698on_write=true 699queue_filter=true 700queue_size=32 701queue_squash=true 702start_conf=4 703sys=system 704table_assoc=4 705table_sets=16 706tag_prefetch=true 707thresh_conf=4 708use_master_id=true 709 710[system.cpu0.l2cache.tags] 711type=RandomRepl 712assoc=16 713block_size=64 714clk_domain=system.cpu_clk_domain 715eventq_index=0 716hit_latency=12 717sequential_access=false 718size=1048576 719 720[system.cpu0.toL2Bus] 721type=CoherentXBar 722children=snoop_filter 723clk_domain=system.cpu_clk_domain 724eventq_index=0 725forward_latency=0 726frontend_latency=1 727point_of_coherency=false 728response_latency=1 729snoop_filter=system.cpu0.toL2Bus.snoop_filter 730snoop_response_latency=1 731system=system 732use_default_range=false 733width=32 734master=system.cpu0.l2cache.cpu_side 735slave=system.cpu0.icache.mem_side system.cpu0.dcache.mem_side system.cpu0.itb.walker.port system.cpu0.dtb.walker.port 736 737[system.cpu0.toL2Bus.snoop_filter] 738type=SnoopFilter 739eventq_index=0 740lookup_latency=0 741max_capacity=8388608 742system=system 743 744[system.cpu0.tracer] 745type=ExeTracer 746eventq_index=0 747 748[system.cpu1] 749type=DerivO3CPU 750children=branchPred dcache dstage2_mmu dtb fuPool icache interrupts isa istage2_mmu itb l2cache toL2Bus tracer 751LFSTSize=1024 752LQEntries=16 753LSQCheckLoads=true 754LSQDepCheckShift=0 755SQEntries=16 756SSITSize=1024 757activity=0 758backComSize=5 759branchPred=system.cpu1.branchPred 760cachePorts=200 761checker=Null 762clk_domain=system.cpu_clk_domain 763commitToDecodeDelay=1 764commitToFetchDelay=1 765commitToIEWDelay=1 766commitToRenameDelay=1 767commitWidth=8 768cpu_id=1 769decodeToFetchDelay=1 770decodeToRenameDelay=2 771decodeWidth=3 772dispatchWidth=6 773do_checkpoint_insts=true 774do_quiesce=true 775do_statistics_insts=true 776dstage2_mmu=system.cpu1.dstage2_mmu 777dtb=system.cpu1.dtb 778eventq_index=0 779fetchBufferSize=16 780fetchQueueSize=32 781fetchToDecodeDelay=3 782fetchTrapLatency=1 783fetchWidth=3 784forwardComSize=5 785fuPool=system.cpu1.fuPool 786function_trace=false 787function_trace_start=0 788iewToCommitDelay=1 789iewToDecodeDelay=1 790iewToFetchDelay=1 791iewToRenameDelay=1 792interrupts=system.cpu1.interrupts 793isa=system.cpu1.isa 794issueToExecuteDelay=1 795issueWidth=8 796istage2_mmu=system.cpu1.istage2_mmu 797itb=system.cpu1.itb 798max_insts_all_threads=0 799max_insts_any_thread=0 800max_loads_all_threads=0 801max_loads_any_thread=0 802needsTSO=false 803numIQEntries=32 804numPhysCCRegs=640 805numPhysFloatRegs=192 806numPhysIntRegs=128 807numROBEntries=40 808numRobs=1 809numThreads=1 810profile=0 811progress_interval=0 812renameToDecodeDelay=1 813renameToFetchDelay=1 814renameToIEWDelay=1 815renameToROBDelay=1 816renameWidth=3 817simpoint_start_insts= 818smtCommitPolicy=RoundRobin 819smtFetchPolicy=SingleThread 820smtIQPolicy=Partitioned 821smtIQThreshold=100 822smtLSQPolicy=Partitioned 823smtLSQThreshold=100 824smtNumFetchingThreads=1 825smtROBPolicy=Partitioned 826smtROBThreshold=100 827socket_id=0 828squashWidth=8 829store_set_clear_period=250000 830switched_out=false 831system=system 832tracer=system.cpu1.tracer 833trapLatency=13 834wbWidth=8 835workload= 836dcache_port=system.cpu1.dcache.cpu_side 837icache_port=system.cpu1.icache.cpu_side 838 839[system.cpu1.branchPred] 840type=BiModeBP 841BTBEntries=2048 842BTBTagSize=18 843RASSize=16 844choiceCtrBits=2 845choicePredictorSize=8192 846eventq_index=0 847globalCtrBits=2 848globalPredictorSize=8192 849instShiftAmt=2 850numThreads=1 851 852[system.cpu1.dcache] 853type=Cache 854children=tags 855addr_ranges=0:18446744073709551615 856assoc=2 857clk_domain=system.cpu_clk_domain 858clusivity=mostly_incl 859demand_mshr_reserve=1 860eventq_index=0 861hit_latency=2 862is_read_only=false 863max_miss_count=0 864mshrs=6 865prefetch_on_access=false 866prefetcher=Null 867response_latency=2 868sequential_access=false 869size=32768 870system=system 871tags=system.cpu1.dcache.tags 872tgts_per_mshr=8 873write_buffers=16 874writeback_clean=true 875cpu_side=system.cpu1.dcache_port 876mem_side=system.cpu1.toL2Bus.slave[1] 877 878[system.cpu1.dcache.tags] 879type=LRU 880assoc=2 881block_size=64 882clk_domain=system.cpu_clk_domain 883eventq_index=0 884hit_latency=2 885sequential_access=false 886size=32768 887 888[system.cpu1.dstage2_mmu] 889type=ArmStage2MMU 890children=stage2_tlb 891eventq_index=0 892stage2_tlb=system.cpu1.dstage2_mmu.stage2_tlb 893sys=system 894tlb=system.cpu1.dtb 895 896[system.cpu1.dstage2_mmu.stage2_tlb] 897type=ArmTLB 898children=walker 899eventq_index=0 900is_stage2=true 901size=32 902walker=system.cpu1.dstage2_mmu.stage2_tlb.walker 903 904[system.cpu1.dstage2_mmu.stage2_tlb.walker] 905type=ArmTableWalker 906clk_domain=system.cpu_clk_domain 907eventq_index=0 908is_stage2=true 909num_squash_per_cycle=2 910sys=system 911 912[system.cpu1.dtb] 913type=ArmTLB 914children=walker 915eventq_index=0 916is_stage2=false 917size=64 918walker=system.cpu1.dtb.walker 919 920[system.cpu1.dtb.walker] 921type=ArmTableWalker 922clk_domain=system.cpu_clk_domain 923eventq_index=0 924is_stage2=false 925num_squash_per_cycle=2 926sys=system 927port=system.cpu1.toL2Bus.slave[3] 928 929[system.cpu1.fuPool] 930type=FUPool 931children=FUList0 FUList1 FUList2 FUList3 FUList4 932FUList=system.cpu1.fuPool.FUList0 system.cpu1.fuPool.FUList1 system.cpu1.fuPool.FUList2 system.cpu1.fuPool.FUList3 system.cpu1.fuPool.FUList4 933eventq_index=0 934 935[system.cpu1.fuPool.FUList0] 936type=FUDesc 937children=opList 938count=2 939eventq_index=0 940opList=system.cpu1.fuPool.FUList0.opList 941 942[system.cpu1.fuPool.FUList0.opList] 943type=OpDesc 944eventq_index=0 945opClass=IntAlu 946opLat=1 947pipelined=true 948 949[system.cpu1.fuPool.FUList1] 950type=FUDesc 951children=opList0 opList1 opList2 952count=1 953eventq_index=0 954opList=system.cpu1.fuPool.FUList1.opList0 system.cpu1.fuPool.FUList1.opList1 system.cpu1.fuPool.FUList1.opList2 955 956[system.cpu1.fuPool.FUList1.opList0] 957type=OpDesc 958eventq_index=0 959opClass=IntMult 960opLat=3 961pipelined=true 962 963[system.cpu1.fuPool.FUList1.opList1] 964type=OpDesc 965eventq_index=0 966opClass=IntDiv 967opLat=12 968pipelined=false 969 970[system.cpu1.fuPool.FUList1.opList2] 971type=OpDesc 972eventq_index=0 973opClass=IprAccess 974opLat=3 975pipelined=true 976 977[system.cpu1.fuPool.FUList2] 978type=FUDesc 979children=opList 980count=1 981eventq_index=0 982opList=system.cpu1.fuPool.FUList2.opList 983 984[system.cpu1.fuPool.FUList2.opList] 985type=OpDesc 986eventq_index=0 987opClass=MemRead 988opLat=2 989pipelined=true 990 991[system.cpu1.fuPool.FUList3] 992type=FUDesc 993children=opList 994count=1 995eventq_index=0 996opList=system.cpu1.fuPool.FUList3.opList 997 998[system.cpu1.fuPool.FUList3.opList] 999type=OpDesc 1000eventq_index=0 1001opClass=MemWrite 1002opLat=2 1003pipelined=true 1004 1005[system.cpu1.fuPool.FUList4] 1006type=FUDesc 1007children=opList00 opList01 opList02 opList03 opList04 opList05 opList06 opList07 opList08 opList09 opList10 opList11 opList12 opList13 opList14 opList15 opList16 opList17 opList18 opList19 opList20 opList21 opList22 opList23 opList24 opList25 1008count=2 1009eventq_index=0 1010opList=system.cpu1.fuPool.FUList4.opList00 system.cpu1.fuPool.FUList4.opList01 system.cpu1.fuPool.FUList4.opList02 system.cpu1.fuPool.FUList4.opList03 system.cpu1.fuPool.FUList4.opList04 system.cpu1.fuPool.FUList4.opList05 system.cpu1.fuPool.FUList4.opList06 system.cpu1.fuPool.FUList4.opList07 system.cpu1.fuPool.FUList4.opList08 system.cpu1.fuPool.FUList4.opList09 system.cpu1.fuPool.FUList4.opList10 system.cpu1.fuPool.FUList4.opList11 system.cpu1.fuPool.FUList4.opList12 system.cpu1.fuPool.FUList4.opList13 system.cpu1.fuPool.FUList4.opList14 system.cpu1.fuPool.FUList4.opList15 system.cpu1.fuPool.FUList4.opList16 system.cpu1.fuPool.FUList4.opList17 system.cpu1.fuPool.FUList4.opList18 system.cpu1.fuPool.FUList4.opList19 system.cpu1.fuPool.FUList4.opList20 system.cpu1.fuPool.FUList4.opList21 system.cpu1.fuPool.FUList4.opList22 system.cpu1.fuPool.FUList4.opList23 system.cpu1.fuPool.FUList4.opList24 system.cpu1.fuPool.FUList4.opList25 1011 1012[system.cpu1.fuPool.FUList4.opList00] 1013type=OpDesc 1014eventq_index=0 1015opClass=SimdAdd 1016opLat=4 1017pipelined=true 1018 1019[system.cpu1.fuPool.FUList4.opList01] 1020type=OpDesc 1021eventq_index=0 1022opClass=SimdAddAcc 1023opLat=4 1024pipelined=true 1025 1026[system.cpu1.fuPool.FUList4.opList02] 1027type=OpDesc 1028eventq_index=0 1029opClass=SimdAlu 1030opLat=4 1031pipelined=true 1032 1033[system.cpu1.fuPool.FUList4.opList03] 1034type=OpDesc 1035eventq_index=0 1036opClass=SimdCmp 1037opLat=4 1038pipelined=true 1039 1040[system.cpu1.fuPool.FUList4.opList04] 1041type=OpDesc 1042eventq_index=0 1043opClass=SimdCvt 1044opLat=3 1045pipelined=true 1046 1047[system.cpu1.fuPool.FUList4.opList05] 1048type=OpDesc 1049eventq_index=0 1050opClass=SimdMisc 1051opLat=3 1052pipelined=true 1053 1054[system.cpu1.fuPool.FUList4.opList06] 1055type=OpDesc 1056eventq_index=0 1057opClass=SimdMult 1058opLat=5 1059pipelined=true 1060 1061[system.cpu1.fuPool.FUList4.opList07] 1062type=OpDesc 1063eventq_index=0 1064opClass=SimdMultAcc 1065opLat=5 1066pipelined=true 1067 1068[system.cpu1.fuPool.FUList4.opList08] 1069type=OpDesc 1070eventq_index=0 1071opClass=SimdShift 1072opLat=3 1073pipelined=true 1074 1075[system.cpu1.fuPool.FUList4.opList09] 1076type=OpDesc 1077eventq_index=0 1078opClass=SimdShiftAcc 1079opLat=3 1080pipelined=true 1081 1082[system.cpu1.fuPool.FUList4.opList10] 1083type=OpDesc 1084eventq_index=0 1085opClass=SimdSqrt 1086opLat=9 1087pipelined=true 1088 1089[system.cpu1.fuPool.FUList4.opList11] 1090type=OpDesc 1091eventq_index=0 1092opClass=SimdFloatAdd 1093opLat=5 1094pipelined=true 1095 1096[system.cpu1.fuPool.FUList4.opList12] 1097type=OpDesc 1098eventq_index=0 1099opClass=SimdFloatAlu 1100opLat=5 1101pipelined=true 1102 1103[system.cpu1.fuPool.FUList4.opList13] 1104type=OpDesc 1105eventq_index=0 1106opClass=SimdFloatCmp 1107opLat=3 1108pipelined=true 1109 1110[system.cpu1.fuPool.FUList4.opList14] 1111type=OpDesc 1112eventq_index=0 1113opClass=SimdFloatCvt 1114opLat=3 1115pipelined=true 1116 1117[system.cpu1.fuPool.FUList4.opList15] 1118type=OpDesc 1119eventq_index=0 1120opClass=SimdFloatDiv 1121opLat=3 1122pipelined=true 1123 1124[system.cpu1.fuPool.FUList4.opList16] 1125type=OpDesc 1126eventq_index=0 1127opClass=SimdFloatMisc 1128opLat=3 1129pipelined=true 1130 1131[system.cpu1.fuPool.FUList4.opList17] 1132type=OpDesc 1133eventq_index=0 1134opClass=SimdFloatMult 1135opLat=3 1136pipelined=true 1137 1138[system.cpu1.fuPool.FUList4.opList18] 1139type=OpDesc 1140eventq_index=0 1141opClass=SimdFloatMultAcc 1142opLat=1 1143pipelined=true 1144 1145[system.cpu1.fuPool.FUList4.opList19] 1146type=OpDesc 1147eventq_index=0 1148opClass=SimdFloatSqrt 1149opLat=9 1150pipelined=true 1151 1152[system.cpu1.fuPool.FUList4.opList20] 1153type=OpDesc 1154eventq_index=0 1155opClass=FloatAdd 1156opLat=5 1157pipelined=true 1158 1159[system.cpu1.fuPool.FUList4.opList21] 1160type=OpDesc 1161eventq_index=0 1162opClass=FloatCmp 1163opLat=5 1164pipelined=true 1165 1166[system.cpu1.fuPool.FUList4.opList22] 1167type=OpDesc 1168eventq_index=0 1169opClass=FloatCvt 1170opLat=5 1171pipelined=true 1172 1173[system.cpu1.fuPool.FUList4.opList23] 1174type=OpDesc 1175eventq_index=0 1176opClass=FloatDiv 1177opLat=9 1178pipelined=false 1179 1180[system.cpu1.fuPool.FUList4.opList24] 1181type=OpDesc 1182eventq_index=0 1183opClass=FloatSqrt 1184opLat=33 1185pipelined=false 1186 1187[system.cpu1.fuPool.FUList4.opList25] 1188type=OpDesc 1189eventq_index=0 1190opClass=FloatMult 1191opLat=4 1192pipelined=true 1193 1194[system.cpu1.icache] 1195type=Cache 1196children=tags 1197addr_ranges=0:18446744073709551615 1198assoc=2 1199clk_domain=system.cpu_clk_domain 1200clusivity=mostly_incl 1201demand_mshr_reserve=1 1202eventq_index=0 1203hit_latency=1 1204is_read_only=true 1205max_miss_count=0 1206mshrs=2 1207prefetch_on_access=false 1208prefetcher=Null 1209response_latency=1 1210sequential_access=false 1211size=32768 1212system=system 1213tags=system.cpu1.icache.tags 1214tgts_per_mshr=8 1215write_buffers=8 1216writeback_clean=true 1217cpu_side=system.cpu1.icache_port 1218mem_side=system.cpu1.toL2Bus.slave[0] 1219 1220[system.cpu1.icache.tags] 1221type=LRU 1222assoc=2 1223block_size=64 1224clk_domain=system.cpu_clk_domain 1225eventq_index=0 1226hit_latency=1 1227sequential_access=false 1228size=32768 1229 1230[system.cpu1.interrupts] 1231type=ArmInterrupts 1232eventq_index=0 1233 1234[system.cpu1.isa] 1235type=ArmISA 1236decoderFlavour=Generic 1237eventq_index=0 1238fpsid=1090793632 1239id_aa64afr0_el1=0 1240id_aa64afr1_el1=0 1241id_aa64dfr0_el1=1052678 1242id_aa64dfr1_el1=0 1243id_aa64isar0_el1=0 1244id_aa64isar1_el1=0 1245id_aa64mmfr0_el1=15728642 1246id_aa64mmfr1_el1=0 1247id_aa64pfr0_el1=17 1248id_aa64pfr1_el1=0 1249id_isar0=34607377 1250id_isar1=34677009 1251id_isar2=555950401 1252id_isar3=17899825 1253id_isar4=268501314 1254id_isar5=0 1255id_mmfr0=270536963 1256id_mmfr1=0 1257id_mmfr2=19070976 1258id_mmfr3=34611729 1259id_pfr0=49 1260id_pfr1=4113 1261midr=1091551472 1262pmu=Null 1263system=system 1264 1265[system.cpu1.istage2_mmu] 1266type=ArmStage2MMU 1267children=stage2_tlb 1268eventq_index=0 1269stage2_tlb=system.cpu1.istage2_mmu.stage2_tlb 1270sys=system 1271tlb=system.cpu1.itb 1272 1273[system.cpu1.istage2_mmu.stage2_tlb] 1274type=ArmTLB 1275children=walker 1276eventq_index=0 1277is_stage2=true 1278size=32 1279walker=system.cpu1.istage2_mmu.stage2_tlb.walker 1280 1281[system.cpu1.istage2_mmu.stage2_tlb.walker] 1282type=ArmTableWalker 1283clk_domain=system.cpu_clk_domain 1284eventq_index=0 1285is_stage2=true 1286num_squash_per_cycle=2 1287sys=system 1288 1289[system.cpu1.itb] 1290type=ArmTLB 1291children=walker 1292eventq_index=0 1293is_stage2=false 1294size=64 1295walker=system.cpu1.itb.walker 1296 1297[system.cpu1.itb.walker] 1298type=ArmTableWalker 1299clk_domain=system.cpu_clk_domain 1300eventq_index=0 1301is_stage2=false 1302num_squash_per_cycle=2 1303sys=system 1304port=system.cpu1.toL2Bus.slave[2] 1305 1306[system.cpu1.l2cache] 1307type=Cache 1308children=prefetcher tags 1309addr_ranges=0:18446744073709551615 1310assoc=16 1311clk_domain=system.cpu_clk_domain 1312clusivity=mostly_excl 1313demand_mshr_reserve=1 1314eventq_index=0 1315hit_latency=12 1316is_read_only=false 1317max_miss_count=0 1318mshrs=16 1319prefetch_on_access=true 1320prefetcher=system.cpu1.l2cache.prefetcher 1321response_latency=12 1322sequential_access=false 1323size=1048576 1324system=system 1325tags=system.cpu1.l2cache.tags 1326tgts_per_mshr=8 1327write_buffers=8 1328writeback_clean=false 1329cpu_side=system.cpu1.toL2Bus.master[0] 1330mem_side=system.toL2Bus.slave[1] 1331 1332[system.cpu1.l2cache.prefetcher] 1333type=StridePrefetcher 1334cache_snoop=false 1335clk_domain=system.cpu_clk_domain 1336degree=8 1337eventq_index=0 1338latency=1 1339max_conf=7 1340min_conf=0 1341on_data=true 1342on_inst=true 1343on_miss=false 1344on_read=true 1345on_write=true 1346queue_filter=true 1347queue_size=32 1348queue_squash=true 1349start_conf=4 1350sys=system 1351table_assoc=4 1352table_sets=16 1353tag_prefetch=true 1354thresh_conf=4 1355use_master_id=true 1356 1357[system.cpu1.l2cache.tags] 1358type=RandomRepl 1359assoc=16 1360block_size=64 1361clk_domain=system.cpu_clk_domain 1362eventq_index=0 1363hit_latency=12 1364sequential_access=false 1365size=1048576 1366 1367[system.cpu1.toL2Bus] 1368type=CoherentXBar 1369children=snoop_filter 1370clk_domain=system.cpu_clk_domain 1371eventq_index=0 1372forward_latency=0 1373frontend_latency=1 1374point_of_coherency=false 1375response_latency=1 1376snoop_filter=system.cpu1.toL2Bus.snoop_filter 1377snoop_response_latency=1 1378system=system 1379use_default_range=false 1380width=32 1381master=system.cpu1.l2cache.cpu_side 1382slave=system.cpu1.icache.mem_side system.cpu1.dcache.mem_side system.cpu1.itb.walker.port system.cpu1.dtb.walker.port 1383 1384[system.cpu1.toL2Bus.snoop_filter] 1385type=SnoopFilter 1386eventq_index=0 1387lookup_latency=0 1388max_capacity=8388608 1389system=system 1390 1391[system.cpu1.tracer] 1392type=ExeTracer 1393eventq_index=0 1394 1395[system.cpu_clk_domain] 1396type=SrcClockDomain 1397clock=500 1398domain_id=-1 1399eventq_index=0 1400init_perf_level=0 1401voltage_domain=system.voltage_domain 1402 1403[system.dvfs_handler] 1404type=DVFSHandler 1405domains= 1406enable=false 1407eventq_index=0 1408sys_clk_domain=system.clk_domain 1409transition_latency=100000000 1410 1411[system.intrctrl] 1412type=IntrControl 1413eventq_index=0 1414sys=system 1415 1416[system.iobus] 1417type=NoncoherentXBar 1418clk_domain=system.clk_domain 1419eventq_index=0 1420forward_latency=1 1421frontend_latency=2 1422response_latency=2 1423use_default_range=false 1424width=16 1425master=system.realview.uart.pio system.realview.realview_io.pio system.realview.pci_host.pio system.realview.timer0.pio system.realview.timer1.pio system.realview.clcd.pio system.realview.hdlcd.pio system.realview.kmi0.pio system.realview.kmi1.pio system.realview.cf_ctrl.pio system.realview.rtc.pio system.realview.vram.port system.realview.l2x0_fake.pio system.realview.uart1_fake.pio system.realview.uart2_fake.pio system.realview.uart3_fake.pio system.realview.sp810_fake.pio system.realview.watchdog_fake.pio system.realview.aaci_fake.pio system.realview.lan_fake.pio system.realview.usb_fake.pio system.realview.mmc_fake.pio system.realview.energy_ctrl.pio system.realview.ide.pio system.realview.ethernet.pio system.iocache.cpu_side 1426slave=system.bridge.master system.realview.clcd.dma system.realview.cf_ctrl.dma system.realview.ide.dma system.realview.ethernet.dma 1427 1428[system.iocache] 1429type=Cache 1430children=tags 1431addr_ranges=2147483648:2415919103 1432assoc=8 1433clk_domain=system.clk_domain 1434clusivity=mostly_incl 1435demand_mshr_reserve=1 1436eventq_index=0 1437hit_latency=50 1438is_read_only=false 1439max_miss_count=0 1440mshrs=20 1441prefetch_on_access=false 1442prefetcher=Null 1443response_latency=50 1444sequential_access=false 1445size=1024 1446system=system 1447tags=system.iocache.tags 1448tgts_per_mshr=12 1449write_buffers=8 1450writeback_clean=false 1451cpu_side=system.iobus.master[25] 1452mem_side=system.membus.slave[3] 1453 1454[system.iocache.tags] 1455type=LRU 1456assoc=8 1457block_size=64 1458clk_domain=system.clk_domain 1459eventq_index=0 1460hit_latency=50 1461sequential_access=false 1462size=1024 1463 1464[system.l2c] 1465type=Cache 1466children=tags 1467addr_ranges=0:18446744073709551615 1468assoc=8 1469clk_domain=system.cpu_clk_domain 1470clusivity=mostly_incl 1471demand_mshr_reserve=1 1472eventq_index=0 1473hit_latency=20 1474is_read_only=false 1475max_miss_count=0 1476mshrs=20 1477prefetch_on_access=false 1478prefetcher=Null 1479response_latency=20 1480sequential_access=false 1481size=4194304 1482system=system 1483tags=system.l2c.tags 1484tgts_per_mshr=12 1485write_buffers=8 1486writeback_clean=false 1487cpu_side=system.toL2Bus.master[0] 1488mem_side=system.membus.slave[2] 1489 1490[system.l2c.tags] 1491type=LRU 1492assoc=8 1493block_size=64 1494clk_domain=system.cpu_clk_domain 1495eventq_index=0 1496hit_latency=20 1497sequential_access=false 1498size=4194304 1499 1500[system.membus] 1501type=CoherentXBar 1502children=badaddr_responder 1503clk_domain=system.clk_domain 1504eventq_index=0 1505forward_latency=4 1506frontend_latency=3 1507point_of_coherency=true 1508response_latency=2 1509snoop_filter=Null 1510snoop_response_latency=4 1511system=system 1512use_default_range=false 1513width=16 1514default=system.membus.badaddr_responder.pio 1515master=system.bridge.slave system.realview.nvmem.port system.realview.gic.pio system.realview.vgic.pio system.realview.local_cpu_timer.pio system.physmem.port 1516slave=system.realview.hdlcd.dma system.system_port system.l2c.mem_side system.iocache.mem_side 1517 1518[system.membus.badaddr_responder] 1519type=IsaFake 1520clk_domain=system.clk_domain 1521eventq_index=0 1522fake_mem=false 1523pio_addr=0 1524pio_latency=100000 1525pio_size=8 1526ret_bad_addr=true 1527ret_data16=65535 1528ret_data32=4294967295 1529ret_data64=18446744073709551615 1530ret_data8=255 1531system=system 1532update_data=false 1533warn_access=warn 1534pio=system.membus.default 1535 1536[system.physmem] 1537type=DRAMCtrl 1538IDD0=0.075000 1539IDD02=0.000000 1540IDD2N=0.050000 1541IDD2N2=0.000000 1542IDD2P0=0.000000 1543IDD2P02=0.000000 1544IDD2P1=0.000000 1545IDD2P12=0.000000 1546IDD3N=0.057000 1547IDD3N2=0.000000 1548IDD3P0=0.000000 1549IDD3P02=0.000000 1550IDD3P1=0.000000 1551IDD3P12=0.000000 1552IDD4R=0.187000 1553IDD4R2=0.000000 1554IDD4W=0.165000 1555IDD4W2=0.000000 1556IDD5=0.220000 1557IDD52=0.000000 1558IDD6=0.000000 1559IDD62=0.000000 1560VDD=1.500000 1561VDD2=0.000000 1562activation_limit=4 1563addr_mapping=RoRaBaCoCh 1564bank_groups_per_rank=0 1565banks_per_rank=8 1566burst_length=8 1567channels=1 1568clk_domain=system.clk_domain 1569conf_table_reported=true 1570device_bus_width=8 1571device_rowbuffer_size=1024 1572device_size=536870912 1573devices_per_rank=8 1574dll=true 1575eventq_index=0 1576in_addr_map=true 1577max_accesses_per_row=16 1578mem_sched_policy=frfcfs 1579min_writes_per_switch=16 1580null=false 1581page_policy=open_adaptive 1582range=2147483648:2415919103 1583ranks_per_channel=2 1584read_buffer_size=32 1585static_backend_latency=10000 1586static_frontend_latency=10000 1587tBURST=5000 1588tCCD_L=0 1589tCK=1250 1590tCL=13750 1591tCS=2500 1592tRAS=35000 1593tRCD=13750 1594tREFI=7800000 1595tRFC=260000 1596tRP=13750 1597tRRD=6000 1598tRRD_L=0 1599tRTP=7500 1600tRTW=2500 1601tWR=15000 1602tWTR=7500 1603tXAW=30000 1604tXP=0 1605tXPDLL=0 1606tXS=0 1607tXSDLL=0 1608write_buffer_size=64 1609write_high_thresh_perc=85 1610write_low_thresh_perc=50 1611port=system.membus.master[5] 1612 1613[system.realview] 1614type=RealView 1615children=aaci_fake cf_ctrl clcd dcc energy_ctrl ethernet generic_timer gic hdlcd ide kmi0 kmi1 l2x0_fake lan_fake local_cpu_timer mcc mmc_fake nvmem pci_host realview_io rtc sp810_fake timer0 timer1 uart uart1_fake uart2_fake uart3_fake usb_fake vgic vram watchdog_fake 1616eventq_index=0 1617intrctrl=system.intrctrl 1618system=system 1619 1620[system.realview.aaci_fake] 1621type=AmbaFake 1622amba_id=0 1623clk_domain=system.clk_domain 1624eventq_index=0 1625ignore_access=false 1626pio_addr=470024192 1627pio_latency=100000 1628system=system 1629pio=system.iobus.master[18] 1630 1631[system.realview.cf_ctrl] 1632type=IdeController 1633BAR0=471465984 1634BAR0LegacyIO=true 1635BAR0Size=256 1636BAR1=471466240 1637BAR1LegacyIO=true 1638BAR1Size=4096 1639BAR2=1 1640BAR2LegacyIO=false 1641BAR2Size=8 1642BAR3=1 1643BAR3LegacyIO=false 1644BAR3Size=4 1645BAR4=1 1646BAR4LegacyIO=false 1647BAR4Size=16 1648BAR5=1 1649BAR5LegacyIO=false 1650BAR5Size=0 1651BIST=0 1652CacheLineSize=0 1653CapabilityPtr=0 1654CardbusCIS=0 1655ClassCode=1 1656Command=1 1657DeviceID=28945 1658ExpansionROM=0 1659HeaderType=0 1660InterruptLine=31 1661InterruptPin=1 1662LatencyTimer=0 1663LegacyIOBase=0 1664MSICAPBaseOffset=0 1665MSICAPCapId=0 1666MSICAPMaskBits=0 1667MSICAPMsgAddr=0 1668MSICAPMsgCtrl=0 1669MSICAPMsgData=0 1670MSICAPMsgUpperAddr=0 1671MSICAPNextCapability=0 1672MSICAPPendingBits=0 1673MSIXCAPBaseOffset=0 1674MSIXCAPCapId=0 1675MSIXCAPNextCapability=0 1676MSIXMsgCtrl=0 1677MSIXPbaOffset=0 1678MSIXTableOffset=0 1679MaximumLatency=0 1680MinimumGrant=0 1681PMCAPBaseOffset=0 1682PMCAPCapId=0 1683PMCAPCapabilities=0 1684PMCAPCtrlStatus=0 1685PMCAPNextCapability=0 1686PXCAPBaseOffset=0 1687PXCAPCapId=0 1688PXCAPCapabilities=0 1689PXCAPDevCap2=0 1690PXCAPDevCapabilities=0 1691PXCAPDevCtrl=0 1692PXCAPDevCtrl2=0 1693PXCAPDevStatus=0 1694PXCAPLinkCap=0 1695PXCAPLinkCtrl=0 1696PXCAPLinkStatus=0 1697PXCAPNextCapability=0 1698ProgIF=133 1699Revision=0 1700Status=640 1701SubClassCode=1 1702SubsystemID=0 1703SubsystemVendorID=0 1704VendorID=32902 1705clk_domain=system.clk_domain 1706config_latency=20000 1707ctrl_offset=2 1708disks= 1709eventq_index=0 1710host=system.realview.pci_host 1711io_shift=2 1712pci_bus=2 1713pci_dev=0 1714pci_func=0 1715pio_latency=30000 1716system=system 1717dma=system.iobus.slave[2] 1718pio=system.iobus.master[9] 1719 1720[system.realview.clcd] 1721type=Pl111 1722amba_id=1315089 1723clk_domain=system.clk_domain 1724enable_capture=true 1725eventq_index=0 1726gic=system.realview.gic 1727int_num=46 1728pio_addr=471793664 1729pio_latency=10000 1730pixel_clock=41667 1731system=system 1732vnc=system.vncserver 1733dma=system.iobus.slave[1] 1734pio=system.iobus.master[5] 1735 1736[system.realview.dcc] 1737type=SubSystem 1738children=osc_cpu osc_ddr osc_hsbm osc_pxl osc_smb osc_sys 1739eventq_index=0 1740 1741[system.realview.dcc.osc_cpu] 1742type=RealViewOsc 1743dcc=0 1744device=0 1745eventq_index=0 1746freq=16667 1747parent=system.realview.realview_io 1748position=0 1749site=1 1750voltage_domain=system.voltage_domain 1751 1752[system.realview.dcc.osc_ddr] 1753type=RealViewOsc 1754dcc=0 1755device=8 1756eventq_index=0 1757freq=25000 1758parent=system.realview.realview_io 1759position=0 1760site=1 1761voltage_domain=system.voltage_domain 1762 1763[system.realview.dcc.osc_hsbm] 1764type=RealViewOsc 1765dcc=0 1766device=4 1767eventq_index=0 1768freq=25000 1769parent=system.realview.realview_io 1770position=0 1771site=1 1772voltage_domain=system.voltage_domain 1773 1774[system.realview.dcc.osc_pxl] 1775type=RealViewOsc 1776dcc=0 1777device=5 1778eventq_index=0 1779freq=42105 1780parent=system.realview.realview_io 1781position=0 1782site=1 1783voltage_domain=system.voltage_domain 1784 1785[system.realview.dcc.osc_smb] 1786type=RealViewOsc 1787dcc=0 1788device=6 1789eventq_index=0 1790freq=20000 1791parent=system.realview.realview_io 1792position=0 1793site=1 1794voltage_domain=system.voltage_domain 1795 1796[system.realview.dcc.osc_sys] 1797type=RealViewOsc 1798dcc=0 1799device=7 1800eventq_index=0 1801freq=16667 1802parent=system.realview.realview_io 1803position=0 1804site=1 1805voltage_domain=system.voltage_domain 1806 1807[system.realview.energy_ctrl] 1808type=EnergyCtrl 1809clk_domain=system.clk_domain 1810dvfs_handler=system.dvfs_handler 1811eventq_index=0 1812pio_addr=470286336 1813pio_latency=100000 1814system=system 1815pio=system.iobus.master[22] 1816 1817[system.realview.ethernet] 1818type=IGbE 1819BAR0=0 1820BAR0LegacyIO=false 1821BAR0Size=131072 1822BAR1=0 1823BAR1LegacyIO=false 1824BAR1Size=0 1825BAR2=0 1826BAR2LegacyIO=false 1827BAR2Size=0 1828BAR3=0 1829BAR3LegacyIO=false 1830BAR3Size=0 1831BAR4=0 1832BAR4LegacyIO=false 1833BAR4Size=0 1834BAR5=0 1835BAR5LegacyIO=false 1836BAR5Size=0 1837BIST=0 1838CacheLineSize=0 1839CapabilityPtr=0 1840CardbusCIS=0 1841ClassCode=2 1842Command=0 1843DeviceID=4213 1844ExpansionROM=0 1845HeaderType=0 1846InterruptLine=1 1847InterruptPin=1 1848LatencyTimer=0 1849LegacyIOBase=0 1850MSICAPBaseOffset=0 1851MSICAPCapId=0 1852MSICAPMaskBits=0 1853MSICAPMsgAddr=0 1854MSICAPMsgCtrl=0 1855MSICAPMsgData=0 1856MSICAPMsgUpperAddr=0 1857MSICAPNextCapability=0 1858MSICAPPendingBits=0 1859MSIXCAPBaseOffset=0 1860MSIXCAPCapId=0 1861MSIXCAPNextCapability=0 1862MSIXMsgCtrl=0 1863MSIXPbaOffset=0 1864MSIXTableOffset=0 1865MaximumLatency=0 1866MinimumGrant=255 1867PMCAPBaseOffset=0 1868PMCAPCapId=0 1869PMCAPCapabilities=0 1870PMCAPCtrlStatus=0 1871PMCAPNextCapability=0 1872PXCAPBaseOffset=0 1873PXCAPCapId=0 1874PXCAPCapabilities=0 1875PXCAPDevCap2=0 1876PXCAPDevCapabilities=0 1877PXCAPDevCtrl=0 1878PXCAPDevCtrl2=0 1879PXCAPDevStatus=0 1880PXCAPLinkCap=0 1881PXCAPLinkCtrl=0 1882PXCAPLinkStatus=0 1883PXCAPNextCapability=0 1884ProgIF=0 1885Revision=0 1886Status=0 1887SubClassCode=0 1888SubsystemID=4104 1889SubsystemVendorID=32902 1890VendorID=32902 1891clk_domain=system.clk_domain 1892config_latency=20000 1893eventq_index=0 1894fetch_comp_delay=10000 1895fetch_delay=10000 1896hardware_address=00:90:00:00:00:01 1897host=system.realview.pci_host 1898pci_bus=0 1899pci_dev=0 1900pci_func=0 1901phy_epid=896 1902phy_pid=680 1903pio_latency=30000 1904rx_desc_cache_size=64 1905rx_fifo_size=393216 1906rx_write_delay=0 1907system=system 1908tx_desc_cache_size=64 1909tx_fifo_size=393216 1910tx_read_delay=0 1911wb_comp_delay=10000 1912wb_delay=10000 1913dma=system.iobus.slave[4] 1914pio=system.iobus.master[24] 1915 1916[system.realview.generic_timer] 1917type=GenericTimer 1918eventq_index=0 1919gic=system.realview.gic 1920int_phys=29 1921int_virt=27 1922system=system 1923 1924[system.realview.gic] 1925type=Pl390 1926clk_domain=system.clk_domain 1927cpu_addr=738205696 1928cpu_pio_delay=10000 1929dist_addr=738201600 1930dist_pio_delay=10000 1931eventq_index=0 1932int_latency=10000 1933it_lines=128 1934platform=system.realview 1935system=system 1936pio=system.membus.master[2] 1937 1938[system.realview.hdlcd] 1939type=HDLcd 1940amba_id=1314816 1941clk_domain=system.clk_domain 1942enable_capture=true 1943eventq_index=0 1944gic=system.realview.gic 1945int_num=117 1946pio_addr=721420288 1947pio_latency=10000 1948pixel_buffer_size=2048 1949pixel_chunk=32 1950pxl_clk=system.realview.dcc.osc_pxl 1951system=system 1952vnc=system.vncserver 1953workaround_dma_line_count=true 1954workaround_swap_rb=true 1955dma=system.membus.slave[0] 1956pio=system.iobus.master[6] 1957 1958[system.realview.ide] 1959type=IdeController 1960BAR0=1 1961BAR0LegacyIO=false 1962BAR0Size=8 1963BAR1=1 1964BAR1LegacyIO=false 1965BAR1Size=4 1966BAR2=1 1967BAR2LegacyIO=false 1968BAR2Size=8 1969BAR3=1 1970BAR3LegacyIO=false 1971BAR3Size=4 1972BAR4=1 1973BAR4LegacyIO=false 1974BAR4Size=16 1975BAR5=1 1976BAR5LegacyIO=false 1977BAR5Size=0 1978BIST=0 1979CacheLineSize=0 1980CapabilityPtr=0 1981CardbusCIS=0 1982ClassCode=1 1983Command=0 1984DeviceID=28945 1985ExpansionROM=0 1986HeaderType=0 1987InterruptLine=2 1988InterruptPin=2 1989LatencyTimer=0 1990LegacyIOBase=0 1991MSICAPBaseOffset=0 1992MSICAPCapId=0 1993MSICAPMaskBits=0 1994MSICAPMsgAddr=0 1995MSICAPMsgCtrl=0 1996MSICAPMsgData=0 1997MSICAPMsgUpperAddr=0 1998MSICAPNextCapability=0 1999MSICAPPendingBits=0 2000MSIXCAPBaseOffset=0 2001MSIXCAPCapId=0 2002MSIXCAPNextCapability=0 2003MSIXMsgCtrl=0 2004MSIXPbaOffset=0 2005MSIXTableOffset=0 2006MaximumLatency=0 2007MinimumGrant=0 2008PMCAPBaseOffset=0 2009PMCAPCapId=0 2010PMCAPCapabilities=0 2011PMCAPCtrlStatus=0 2012PMCAPNextCapability=0 2013PXCAPBaseOffset=0 2014PXCAPCapId=0 2015PXCAPCapabilities=0 2016PXCAPDevCap2=0 2017PXCAPDevCapabilities=0 2018PXCAPDevCtrl=0 2019PXCAPDevCtrl2=0 2020PXCAPDevStatus=0 2021PXCAPLinkCap=0 2022PXCAPLinkCtrl=0 2023PXCAPLinkStatus=0 2024PXCAPNextCapability=0 2025ProgIF=133 2026Revision=0 2027Status=640 2028SubClassCode=1 2029SubsystemID=0 2030SubsystemVendorID=0 2031VendorID=32902 2032clk_domain=system.clk_domain 2033config_latency=20000 2034ctrl_offset=0 2035disks=system.cf0 2036eventq_index=0 2037host=system.realview.pci_host 2038io_shift=0 2039pci_bus=0 2040pci_dev=1 2041pci_func=0 2042pio_latency=30000 2043system=system 2044dma=system.iobus.slave[3] 2045pio=system.iobus.master[23] 2046 2047[system.realview.kmi0] 2048type=Pl050 2049amba_id=1314896 2050clk_domain=system.clk_domain 2051eventq_index=0 2052gic=system.realview.gic 2053int_delay=1000000 2054int_num=44 2055is_mouse=false 2056pio_addr=470155264 2057pio_latency=100000 2058system=system 2059vnc=system.vncserver 2060pio=system.iobus.master[7] 2061 2062[system.realview.kmi1] 2063type=Pl050 2064amba_id=1314896 2065clk_domain=system.clk_domain 2066eventq_index=0 2067gic=system.realview.gic 2068int_delay=1000000 2069int_num=45 2070is_mouse=true 2071pio_addr=470220800 2072pio_latency=100000 2073system=system 2074vnc=system.vncserver 2075pio=system.iobus.master[8] 2076 2077[system.realview.l2x0_fake] 2078type=IsaFake 2079clk_domain=system.clk_domain 2080eventq_index=0 2081fake_mem=false 2082pio_addr=739246080 2083pio_latency=100000 2084pio_size=4095 2085ret_bad_addr=false 2086ret_data16=65535 2087ret_data32=4294967295 2088ret_data64=18446744073709551615 2089ret_data8=255 2090system=system 2091update_data=false 2092warn_access= 2093pio=system.iobus.master[12] 2094 2095[system.realview.lan_fake] 2096type=IsaFake 2097clk_domain=system.clk_domain 2098eventq_index=0 2099fake_mem=false 2100pio_addr=436207616 2101pio_latency=100000 2102pio_size=65535 2103ret_bad_addr=false 2104ret_data16=65535 2105ret_data32=4294967295 2106ret_data64=18446744073709551615 2107ret_data8=255 2108system=system 2109update_data=false 2110warn_access= 2111pio=system.iobus.master[19] 2112 2113[system.realview.local_cpu_timer] 2114type=CpuLocalTimer 2115clk_domain=system.clk_domain 2116eventq_index=0 2117gic=system.realview.gic 2118int_num_timer=29 2119int_num_watchdog=30 2120pio_addr=738721792 2121pio_latency=100000 2122system=system 2123pio=system.membus.master[4] 2124 2125[system.realview.mcc] 2126type=SubSystem 2127children=osc_clcd osc_mcc osc_peripheral osc_system_bus 2128eventq_index=0 2129 2130[system.realview.mcc.osc_clcd] 2131type=RealViewOsc 2132dcc=0 2133device=1 2134eventq_index=0 2135freq=42105 2136parent=system.realview.realview_io 2137position=0 2138site=0 2139voltage_domain=system.voltage_domain 2140 2141[system.realview.mcc.osc_mcc] 2142type=RealViewOsc 2143dcc=0 2144device=0 2145eventq_index=0 2146freq=20000 2147parent=system.realview.realview_io 2148position=0 2149site=0 2150voltage_domain=system.voltage_domain 2151 2152[system.realview.mcc.osc_peripheral] 2153type=RealViewOsc 2154dcc=0 2155device=2 2156eventq_index=0 2157freq=41667 2158parent=system.realview.realview_io 2159position=0 2160site=0 2161voltage_domain=system.voltage_domain 2162 2163[system.realview.mcc.osc_system_bus] 2164type=RealViewOsc 2165dcc=0 2166device=4 2167eventq_index=0 2168freq=41667 2169parent=system.realview.realview_io 2170position=0 2171site=0 2172voltage_domain=system.voltage_domain 2173 2174[system.realview.mmc_fake] 2175type=AmbaFake 2176amba_id=0 2177clk_domain=system.clk_domain 2178eventq_index=0 2179ignore_access=false 2180pio_addr=470089728 2181pio_latency=100000 2182system=system 2183pio=system.iobus.master[21] 2184 2185[system.realview.nvmem] 2186type=SimpleMemory 2187bandwidth=73.000000 2188clk_domain=system.clk_domain 2189conf_table_reported=false 2190eventq_index=0 2191in_addr_map=true 2192latency=30000 2193latency_var=0 2194null=false 2195range=0:67108863 2196port=system.membus.master[1] 2197 2198[system.realview.pci_host] 2199type=GenericPciHost 2200clk_domain=system.clk_domain 2201conf_base=805306368 2202conf_device_bits=16 2203conf_size=268435456 2204eventq_index=0 2205pci_dma_base=0 2206pci_mem_base=0 2207pci_pio_base=0 2208platform=system.realview 2209system=system 2210pio=system.iobus.master[2] 2211 2212[system.realview.realview_io] 2213type=RealViewCtrl 2214clk_domain=system.clk_domain 2215eventq_index=0 2216idreg=35979264 2217pio_addr=469827584 2218pio_latency=100000 2219proc_id0=335544320 2220proc_id1=335544320 2221system=system 2222pio=system.iobus.master[1] 2223 2224[system.realview.rtc] 2225type=PL031 2226amba_id=3412017 2227clk_domain=system.clk_domain 2228eventq_index=0 2229gic=system.realview.gic 2230int_delay=100000 2231int_num=36 2232pio_addr=471269376 2233pio_latency=100000 2234system=system 2235time=Thu Jan 1 00:00:00 2009 2236pio=system.iobus.master[10] 2237 2238[system.realview.sp810_fake] 2239type=AmbaFake 2240amba_id=0 2241clk_domain=system.clk_domain 2242eventq_index=0 2243ignore_access=true 2244pio_addr=469893120 2245pio_latency=100000 2246system=system 2247pio=system.iobus.master[16] 2248 2249[system.realview.timer0] 2250type=Sp804 2251amba_id=1316868 2252clk_domain=system.clk_domain 2253clock0=1000000 2254clock1=1000000 2255eventq_index=0 2256gic=system.realview.gic 2257int_num0=34 2258int_num1=34 2259pio_addr=470876160 2260pio_latency=100000 2261system=system 2262pio=system.iobus.master[3] 2263 2264[system.realview.timer1] 2265type=Sp804 2266amba_id=1316868 2267clk_domain=system.clk_domain 2268clock0=1000000 2269clock1=1000000 2270eventq_index=0 2271gic=system.realview.gic 2272int_num0=35 2273int_num1=35 2274pio_addr=470941696 2275pio_latency=100000 2276system=system 2277pio=system.iobus.master[4] 2278 2279[system.realview.uart] 2280type=Pl011 2281clk_domain=system.clk_domain 2282end_on_eot=false 2283eventq_index=0 2284gic=system.realview.gic 2285int_delay=100000 2286int_num=37 2287pio_addr=470351872 2288pio_latency=100000 2289platform=system.realview 2290system=system 2291terminal=system.terminal 2292pio=system.iobus.master[0] 2293 2294[system.realview.uart1_fake] 2295type=AmbaFake 2296amba_id=0 2297clk_domain=system.clk_domain 2298eventq_index=0 2299ignore_access=false 2300pio_addr=470417408 2301pio_latency=100000 2302system=system 2303pio=system.iobus.master[13] 2304 2305[system.realview.uart2_fake] 2306type=AmbaFake 2307amba_id=0 2308clk_domain=system.clk_domain 2309eventq_index=0 2310ignore_access=false 2311pio_addr=470482944 2312pio_latency=100000 2313system=system 2314pio=system.iobus.master[14] 2315 2316[system.realview.uart3_fake] 2317type=AmbaFake 2318amba_id=0 2319clk_domain=system.clk_domain 2320eventq_index=0 2321ignore_access=false 2322pio_addr=470548480 2323pio_latency=100000 2324system=system 2325pio=system.iobus.master[15] 2326 2327[system.realview.usb_fake] 2328type=IsaFake 2329clk_domain=system.clk_domain 2330eventq_index=0 2331fake_mem=false 2332pio_addr=452984832 2333pio_latency=100000 2334pio_size=131071 2335ret_bad_addr=false 2336ret_data16=65535 2337ret_data32=4294967295 2338ret_data64=18446744073709551615 2339ret_data8=255 2340system=system 2341update_data=false 2342warn_access= 2343pio=system.iobus.master[20] 2344 2345[system.realview.vgic] 2346type=VGic 2347clk_domain=system.clk_domain 2348eventq_index=0 2349gic=system.realview.gic 2350hv_addr=738213888 2351pio_delay=10000 2352platform=system.realview 2353ppint=25 2354system=system 2355vcpu_addr=738222080 2356pio=system.membus.master[3] 2357 2358[system.realview.vram] 2359type=SimpleMemory 2360bandwidth=73.000000 2361clk_domain=system.clk_domain 2362conf_table_reported=false 2363eventq_index=0 2364in_addr_map=true 2365latency=30000 2366latency_var=0 2367null=false 2368range=402653184:436207615 2369port=system.iobus.master[11] 2370 2371[system.realview.watchdog_fake] 2372type=AmbaFake 2373amba_id=0 2374clk_domain=system.clk_domain 2375eventq_index=0 2376ignore_access=false 2377pio_addr=470745088 2378pio_latency=100000 2379system=system 2380pio=system.iobus.master[17] 2381 2382[system.terminal] 2383type=Terminal 2384eventq_index=0 2385intr_control=system.intrctrl 2386number=0 2387output=true 2388port=3456 2389 2390[system.toL2Bus] 2391type=CoherentXBar 2392children=snoop_filter 2393clk_domain=system.cpu_clk_domain 2394eventq_index=0 2395forward_latency=0 2396frontend_latency=1 2397point_of_coherency=false 2398response_latency=1 2399snoop_filter=system.toL2Bus.snoop_filter 2400snoop_response_latency=1 2401system=system 2402use_default_range=false 2403width=32 2404master=system.l2c.cpu_side 2405slave=system.cpu0.l2cache.mem_side system.cpu1.l2cache.mem_side 2406 2407[system.toL2Bus.snoop_filter] 2408type=SnoopFilter 2409eventq_index=0 2410lookup_latency=0 2411max_capacity=8388608 2412system=system 2413 2414[system.vncserver] 2415type=VncServer 2416eventq_index=0 2417frame_capture=false 2418number=0 2419port=5900 2420 2421[system.voltage_domain] 2422type=VoltageDomain 2423eventq_index=0 2424voltage=1.000000 2425 2426