1[root] 2type=Root 3children=system 4eventq_index=0 5full_system=true 6sim_quantum=0 7time_sync_enable=false 8time_sync_period=100000000000 9time_sync_spin_threshold=100000000 10 11[system] 12type=LinuxArmSystem 13children=bridge cf0 clk_domain cpu0 cpu1 cpu_clk_domain dvfs_handler intrctrl iobus iocache l2c membus physmem realview terminal toL2Bus vncserver voltage_domain 14atags_addr=134217728 15boot_loader=/usr/local/google/home/gabeblack/gem5/dist/m5/system/binaries/boot_emm.arm 16boot_osflags=earlyprintk=pl011,0x1c090000 console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=256MB root=/dev/sda1 17cache_line_size=64 18clk_domain=system.clk_domain 19default_p_state=UNDEFINED 20dtb_filename=/usr/local/google/home/gabeblack/gem5/dist/m5/system/binaries/vexpress.aarch32.ll_20131205.0-gem5.2cpu.dtb 21early_kernel_symbols=false 22enable_context_switch_stats_dump=false 23eventq_index=0 24exit_on_work_items=false 25flags_addr=469827632 26gic_cpu_addr=738205696 27have_large_asid_64=false 28have_lpae=true 29have_security=false 30have_virtualization=false 31highest_el_is_64=false 32init_param=0 33kernel=/usr/local/google/home/gabeblack/gem5/dist/m5/system/binaries/vmlinux.aarch32.ll_20131205.0-gem5 34kernel_addr_check=true 35load_addr_mask=268435455 36load_offset=2147483648 37machine_type=VExpress_EMM 38mem_mode=timing 39mem_ranges=2147483648:2415919103:0:0:0:0 40memories=system.physmem system.realview.nvmem system.realview.vram 41mmap_using_noreserve=false 42multi_proc=true 43multi_thread=false 44num_work_ids=16 45p_state_clk_gate_bins=20 46p_state_clk_gate_max=1000000000000 47p_state_clk_gate_min=1000 48panic_on_oops=true 49panic_on_panic=true 50phys_addr_range_64=40 51power_model=Null 52readfile=/usr/local/google/home/gabeblack/gem5/gem5-public/tests/testing/../halt.sh 53reset_addr_64=0 54symbolfile= 55thermal_components= 56thermal_model=Null 57work_begin_ckpt_count=0 58work_begin_cpu_id_exit=-1 59work_begin_exit_count=0 60work_cpus_ckpt_count=0 61work_end_ckpt_count=0 62work_end_exit_count=0 63work_item_id=-1 64system_port=system.membus.slave[1] 65 66[system.bridge] 67type=Bridge 68clk_domain=system.clk_domain 69default_p_state=UNDEFINED 70delay=50000 71eventq_index=0 72p_state_clk_gate_bins=20 73p_state_clk_gate_max=1000000000000 74p_state_clk_gate_min=1000 75power_model=Null 76ranges=788529152:805306367:0:0:0:0 721420288:725614591:0:0:0:0 805306368:1073741823:0:0:0:0 1073741824:1610612735:0:0:0:0 402653184:469762047:0:0:0:0 469762048:536870911:0:0:0:0 77req_size=16 78resp_size=16 79master=system.iobus.slave[0] 80slave=system.membus.master[0] 81 82[system.cf0] 83type=IdeDisk 84children=image 85delay=1000000 86driveID=master 87eventq_index=0 88image=system.cf0.image 89 90[system.cf0.image] 91type=CowDiskImage 92children=child 93child=system.cf0.image.child 94eventq_index=0 95image_file= 96read_only=false 97table_size=65536 98 99[system.cf0.image.child] 100type=RawDiskImage 101eventq_index=0 102image_file=/usr/local/google/home/gabeblack/gem5/dist/m5/system/disks/linux-aarch32-ael.img 103read_only=true 104 105[system.clk_domain] 106type=SrcClockDomain 107clock=1000 108domain_id=-1 109eventq_index=0 110init_perf_level=0 111voltage_domain=system.voltage_domain 112 113[system.cpu0] 114type=DerivO3CPU 115children=branchPred dcache dstage2_mmu dtb fuPool icache interrupts isa istage2_mmu itb l2cache toL2Bus tracer 116LFSTSize=1024 117LQEntries=16 118LSQCheckLoads=true 119LSQDepCheckShift=0 120SQEntries=16 121SSITSize=1024 122activity=0 123backComSize=5 124branchPred=system.cpu0.branchPred 125cacheStorePorts=200 126checker=Null 127clk_domain=system.cpu_clk_domain 128commitToDecodeDelay=1 129commitToFetchDelay=1 130commitToIEWDelay=1 131commitToRenameDelay=1 132commitWidth=8 133cpu_id=0 134decodeToFetchDelay=1 135decodeToRenameDelay=2 136decodeWidth=3 137default_p_state=UNDEFINED 138dispatchWidth=6 139do_checkpoint_insts=true 140do_quiesce=true 141do_statistics_insts=true 142dstage2_mmu=system.cpu0.dstage2_mmu 143dtb=system.cpu0.dtb 144eventq_index=0 145fetchBufferSize=16 146fetchQueueSize=32 147fetchToDecodeDelay=3 148fetchTrapLatency=1 149fetchWidth=3 150forwardComSize=5 151fuPool=system.cpu0.fuPool 152function_trace=false 153function_trace_start=0 154iewToCommitDelay=1 155iewToDecodeDelay=1 156iewToFetchDelay=1 157iewToRenameDelay=1 158interrupts=system.cpu0.interrupts 159isa=system.cpu0.isa 160issueToExecuteDelay=1 161issueWidth=8 162istage2_mmu=system.cpu0.istage2_mmu 163itb=system.cpu0.itb 164max_insts_all_threads=0 165max_insts_any_thread=0 166max_loads_all_threads=0 167max_loads_any_thread=0 168needsTSO=false 169numIQEntries=32 170numPhysCCRegs=640 171numPhysFloatRegs=192 172numPhysIntRegs=128 173numROBEntries=40 174numRobs=1 175numThreads=1 176p_state_clk_gate_bins=20 177p_state_clk_gate_max=1000000000000 178p_state_clk_gate_min=1000 179power_model=Null 180profile=0 181progress_interval=0 182renameToDecodeDelay=1 183renameToFetchDelay=1 184renameToIEWDelay=1 185renameToROBDelay=1 186renameWidth=3 187simpoint_start_insts= 188smtCommitPolicy=RoundRobin 189smtFetchPolicy=SingleThread 190smtIQPolicy=Partitioned 191smtIQThreshold=100 192smtLSQPolicy=Partitioned 193smtLSQThreshold=100 194smtNumFetchingThreads=1 195smtROBPolicy=Partitioned 196smtROBThreshold=100 197socket_id=0 198squashWidth=8 199store_set_clear_period=250000 200switched_out=false 201syscallRetryLatency=10000 202system=system 203tracer=system.cpu0.tracer 204trapLatency=13 205wbWidth=8 206workload= 207dcache_port=system.cpu0.dcache.cpu_side 208icache_port=system.cpu0.icache.cpu_side 209 210[system.cpu0.branchPred] 211type=BiModeBP 212BTBEntries=2048 213BTBTagSize=18 214RASSize=16 215choiceCtrBits=2 216choicePredictorSize=8192 217eventq_index=0 218globalCtrBits=2 219globalPredictorSize=8192 220indirectHashGHR=true 221indirectHashTargets=true 222indirectPathLength=3 223indirectSets=256 224indirectTagSize=16 225indirectWays=2 226instShiftAmt=2 227numThreads=1 228useIndirect=true 229 230[system.cpu0.dcache] 231type=Cache 232children=tags 233addr_ranges=0:18446744073709551615:0:0:0:0 234assoc=2 235clk_domain=system.cpu_clk_domain 236clusivity=mostly_incl 237data_latency=2 238default_p_state=UNDEFINED 239demand_mshr_reserve=1 240eventq_index=0 241is_read_only=false 242max_miss_count=0 243mshrs=6 244p_state_clk_gate_bins=20 245p_state_clk_gate_max=1000000000000 246p_state_clk_gate_min=1000 247power_model=Null 248prefetch_on_access=false 249prefetcher=Null 250response_latency=2 251sequential_access=false 252size=32768 253system=system 254tag_latency=2 255tags=system.cpu0.dcache.tags 256tgts_per_mshr=8 257write_buffers=16 258writeback_clean=true 259cpu_side=system.cpu0.dcache_port 260mem_side=system.cpu0.toL2Bus.slave[1] 261 262[system.cpu0.dcache.tags] 263type=LRU 264assoc=2 265block_size=64 266clk_domain=system.cpu_clk_domain 267data_latency=2 268default_p_state=UNDEFINED 269eventq_index=0 270p_state_clk_gate_bins=20 271p_state_clk_gate_max=1000000000000 272p_state_clk_gate_min=1000 273power_model=Null 274sequential_access=false 275size=32768 276tag_latency=2 277 278[system.cpu0.dstage2_mmu] 279type=ArmStage2MMU 280children=stage2_tlb 281eventq_index=0 282stage2_tlb=system.cpu0.dstage2_mmu.stage2_tlb 283sys=system 284tlb=system.cpu0.dtb 285 286[system.cpu0.dstage2_mmu.stage2_tlb] 287type=ArmTLB 288children=walker 289eventq_index=0 290is_stage2=true 291size=32 292walker=system.cpu0.dstage2_mmu.stage2_tlb.walker 293 294[system.cpu0.dstage2_mmu.stage2_tlb.walker] 295type=ArmTableWalker 296clk_domain=system.cpu_clk_domain 297default_p_state=UNDEFINED 298eventq_index=0 299is_stage2=true 300num_squash_per_cycle=2 301p_state_clk_gate_bins=20 302p_state_clk_gate_max=1000000000000 303p_state_clk_gate_min=1000 304power_model=Null 305sys=system 306 307[system.cpu0.dtb] 308type=ArmTLB 309children=walker 310eventq_index=0 311is_stage2=false 312size=64 313walker=system.cpu0.dtb.walker 314 315[system.cpu0.dtb.walker] 316type=ArmTableWalker 317clk_domain=system.cpu_clk_domain 318default_p_state=UNDEFINED 319eventq_index=0 320is_stage2=false 321num_squash_per_cycle=2 322p_state_clk_gate_bins=20 323p_state_clk_gate_max=1000000000000 324p_state_clk_gate_min=1000 325power_model=Null 326sys=system 327port=system.cpu0.toL2Bus.slave[3] 328 329[system.cpu0.fuPool] 330type=FUPool 331children=FUList0 FUList1 FUList2 FUList3 FUList4 332FUList=system.cpu0.fuPool.FUList0 system.cpu0.fuPool.FUList1 system.cpu0.fuPool.FUList2 system.cpu0.fuPool.FUList3 system.cpu0.fuPool.FUList4 333eventq_index=0 334 335[system.cpu0.fuPool.FUList0] 336type=FUDesc 337children=opList 338count=2 339eventq_index=0 340opList=system.cpu0.fuPool.FUList0.opList 341 342[system.cpu0.fuPool.FUList0.opList] 343type=OpDesc 344eventq_index=0 345opClass=IntAlu 346opLat=1 347pipelined=true 348 349[system.cpu0.fuPool.FUList1] 350type=FUDesc 351children=opList0 opList1 opList2 352count=1 353eventq_index=0 354opList=system.cpu0.fuPool.FUList1.opList0 system.cpu0.fuPool.FUList1.opList1 system.cpu0.fuPool.FUList1.opList2 355 356[system.cpu0.fuPool.FUList1.opList0] 357type=OpDesc 358eventq_index=0 359opClass=IntMult 360opLat=3 361pipelined=true 362 363[system.cpu0.fuPool.FUList1.opList1] 364type=OpDesc 365eventq_index=0 366opClass=IntDiv 367opLat=12 368pipelined=false 369 370[system.cpu0.fuPool.FUList1.opList2] 371type=OpDesc 372eventq_index=0 373opClass=IprAccess 374opLat=3 375pipelined=true 376 377[system.cpu0.fuPool.FUList2] 378type=FUDesc 379children=opList0 opList1 380count=1 381eventq_index=0 382opList=system.cpu0.fuPool.FUList2.opList0 system.cpu0.fuPool.FUList2.opList1 383 384[system.cpu0.fuPool.FUList2.opList0] 385type=OpDesc 386eventq_index=0 387opClass=MemRead 388opLat=2 389pipelined=true 390 391[system.cpu0.fuPool.FUList2.opList1] 392type=OpDesc 393eventq_index=0 394opClass=FloatMemRead 395opLat=2 396pipelined=true 397 398[system.cpu0.fuPool.FUList3] 399type=FUDesc 400children=opList0 opList1 401count=1 402eventq_index=0 403opList=system.cpu0.fuPool.FUList3.opList0 system.cpu0.fuPool.FUList3.opList1 404 405[system.cpu0.fuPool.FUList3.opList0] 406type=OpDesc 407eventq_index=0 408opClass=MemWrite 409opLat=2 410pipelined=true 411 412[system.cpu0.fuPool.FUList3.opList1] 413type=OpDesc 414eventq_index=0 415opClass=FloatMemWrite 416opLat=2 417pipelined=true 418 419[system.cpu0.fuPool.FUList4] 420type=FUDesc 421children=opList00 opList01 opList02 opList03 opList04 opList05 opList06 opList07 opList08 opList09 opList10 opList11 opList12 opList13 opList14 opList15 opList16 opList17 opList18 opList19 opList20 opList21 opList22 opList23 opList24 opList25 opList26 opList27 422count=2 423eventq_index=0 424opList=system.cpu0.fuPool.FUList4.opList00 system.cpu0.fuPool.FUList4.opList01 system.cpu0.fuPool.FUList4.opList02 system.cpu0.fuPool.FUList4.opList03 system.cpu0.fuPool.FUList4.opList04 system.cpu0.fuPool.FUList4.opList05 system.cpu0.fuPool.FUList4.opList06 system.cpu0.fuPool.FUList4.opList07 system.cpu0.fuPool.FUList4.opList08 system.cpu0.fuPool.FUList4.opList09 system.cpu0.fuPool.FUList4.opList10 system.cpu0.fuPool.FUList4.opList11 system.cpu0.fuPool.FUList4.opList12 system.cpu0.fuPool.FUList4.opList13 system.cpu0.fuPool.FUList4.opList14 system.cpu0.fuPool.FUList4.opList15 system.cpu0.fuPool.FUList4.opList16 system.cpu0.fuPool.FUList4.opList17 system.cpu0.fuPool.FUList4.opList18 system.cpu0.fuPool.FUList4.opList19 system.cpu0.fuPool.FUList4.opList20 system.cpu0.fuPool.FUList4.opList21 system.cpu0.fuPool.FUList4.opList22 system.cpu0.fuPool.FUList4.opList23 system.cpu0.fuPool.FUList4.opList24 system.cpu0.fuPool.FUList4.opList25 system.cpu0.fuPool.FUList4.opList26 system.cpu0.fuPool.FUList4.opList27 425 426[system.cpu0.fuPool.FUList4.opList00] 427type=OpDesc 428eventq_index=0 429opClass=SimdAdd 430opLat=4 431pipelined=true 432 433[system.cpu0.fuPool.FUList4.opList01] 434type=OpDesc 435eventq_index=0 436opClass=SimdAddAcc 437opLat=4 438pipelined=true 439 440[system.cpu0.fuPool.FUList4.opList02] 441type=OpDesc 442eventq_index=0 443opClass=SimdAlu 444opLat=4 445pipelined=true 446 447[system.cpu0.fuPool.FUList4.opList03] 448type=OpDesc 449eventq_index=0 450opClass=SimdCmp 451opLat=4 452pipelined=true 453 454[system.cpu0.fuPool.FUList4.opList04] 455type=OpDesc 456eventq_index=0 457opClass=SimdCvt 458opLat=3 459pipelined=true 460 461[system.cpu0.fuPool.FUList4.opList05] 462type=OpDesc 463eventq_index=0 464opClass=SimdMisc 465opLat=3 466pipelined=true 467 468[system.cpu0.fuPool.FUList4.opList06] 469type=OpDesc 470eventq_index=0 471opClass=SimdMult 472opLat=5 473pipelined=true 474 475[system.cpu0.fuPool.FUList4.opList07] 476type=OpDesc 477eventq_index=0 478opClass=SimdMultAcc 479opLat=5 480pipelined=true 481 482[system.cpu0.fuPool.FUList4.opList08] 483type=OpDesc 484eventq_index=0 485opClass=SimdShift 486opLat=3 487pipelined=true 488 489[system.cpu0.fuPool.FUList4.opList09] 490type=OpDesc 491eventq_index=0 492opClass=SimdShiftAcc 493opLat=3 494pipelined=true 495 496[system.cpu0.fuPool.FUList4.opList10] 497type=OpDesc 498eventq_index=0 499opClass=SimdSqrt 500opLat=9 501pipelined=true 502 503[system.cpu0.fuPool.FUList4.opList11] 504type=OpDesc 505eventq_index=0 506opClass=SimdFloatAdd 507opLat=5 508pipelined=true 509 510[system.cpu0.fuPool.FUList4.opList12] 511type=OpDesc 512eventq_index=0 513opClass=SimdFloatAlu 514opLat=5 515pipelined=true 516 517[system.cpu0.fuPool.FUList4.opList13] 518type=OpDesc 519eventq_index=0 520opClass=SimdFloatCmp 521opLat=3 522pipelined=true 523 524[system.cpu0.fuPool.FUList4.opList14] 525type=OpDesc 526eventq_index=0 527opClass=SimdFloatCvt 528opLat=3 529pipelined=true 530 531[system.cpu0.fuPool.FUList4.opList15] 532type=OpDesc 533eventq_index=0 534opClass=SimdFloatDiv 535opLat=3 536pipelined=true 537 538[system.cpu0.fuPool.FUList4.opList16] 539type=OpDesc 540eventq_index=0 541opClass=SimdFloatMisc 542opLat=3 543pipelined=true 544 545[system.cpu0.fuPool.FUList4.opList17] 546type=OpDesc 547eventq_index=0 548opClass=SimdFloatMult 549opLat=3 550pipelined=true 551 552[system.cpu0.fuPool.FUList4.opList18] 553type=OpDesc 554eventq_index=0 555opClass=SimdFloatMultAcc 556opLat=5 557pipelined=true 558 559[system.cpu0.fuPool.FUList4.opList19] 560type=OpDesc 561eventq_index=0 562opClass=SimdFloatSqrt 563opLat=9 564pipelined=true 565 566[system.cpu0.fuPool.FUList4.opList20] 567type=OpDesc 568eventq_index=0 569opClass=FloatAdd 570opLat=5 571pipelined=true 572 573[system.cpu0.fuPool.FUList4.opList21] 574type=OpDesc 575eventq_index=0 576opClass=FloatCmp 577opLat=5 578pipelined=true 579 580[system.cpu0.fuPool.FUList4.opList22] 581type=OpDesc 582eventq_index=0 583opClass=FloatCvt 584opLat=5 585pipelined=true 586 587[system.cpu0.fuPool.FUList4.opList23] 588type=OpDesc 589eventq_index=0 590opClass=FloatDiv 591opLat=9 592pipelined=false 593 594[system.cpu0.fuPool.FUList4.opList24] 595type=OpDesc 596eventq_index=0 597opClass=FloatSqrt 598opLat=33 599pipelined=false 600 601[system.cpu0.fuPool.FUList4.opList25] 602type=OpDesc 603eventq_index=0 604opClass=FloatMult 605opLat=4 606pipelined=true 607 608[system.cpu0.fuPool.FUList4.opList26] 609type=OpDesc 610eventq_index=0 611opClass=FloatMultAcc 612opLat=5 613pipelined=true 614 615[system.cpu0.fuPool.FUList4.opList27] 616type=OpDesc 617eventq_index=0 618opClass=FloatMisc 619opLat=3 620pipelined=true 621 622[system.cpu0.icache] 623type=Cache 624children=tags 625addr_ranges=0:18446744073709551615:0:0:0:0 626assoc=2 627clk_domain=system.cpu_clk_domain 628clusivity=mostly_incl 629data_latency=1 630default_p_state=UNDEFINED 631demand_mshr_reserve=1 632eventq_index=0 633is_read_only=true 634max_miss_count=0 635mshrs=2 636p_state_clk_gate_bins=20 637p_state_clk_gate_max=1000000000000 638p_state_clk_gate_min=1000 639power_model=Null 640prefetch_on_access=false 641prefetcher=Null 642response_latency=1 643sequential_access=false 644size=32768 645system=system 646tag_latency=1 647tags=system.cpu0.icache.tags 648tgts_per_mshr=8 649write_buffers=8 650writeback_clean=true 651cpu_side=system.cpu0.icache_port 652mem_side=system.cpu0.toL2Bus.slave[0] 653 654[system.cpu0.icache.tags] 655type=LRU 656assoc=2 657block_size=64 658clk_domain=system.cpu_clk_domain 659data_latency=1 660default_p_state=UNDEFINED 661eventq_index=0 662p_state_clk_gate_bins=20 663p_state_clk_gate_max=1000000000000 664p_state_clk_gate_min=1000 665power_model=Null 666sequential_access=false 667size=32768 668tag_latency=1 669 670[system.cpu0.interrupts] 671type=ArmInterrupts 672eventq_index=0 673 674[system.cpu0.isa] 675type=ArmISA 676decoderFlavour=Generic 677eventq_index=0 678fpsid=1090793632 679id_aa64afr0_el1=0 680id_aa64afr1_el1=0 681id_aa64dfr0_el1=1052678 682id_aa64dfr1_el1=0 683id_aa64isar0_el1=0 684id_aa64isar1_el1=0 685id_aa64mmfr0_el1=15728642 686id_aa64mmfr1_el1=0 687id_isar0=34607377 688id_isar1=34677009 689id_isar2=555950401 690id_isar3=17899825 691id_isar4=268501314 692id_isar5=0 693id_mmfr0=270536963 694id_mmfr1=0 695id_mmfr2=19070976 696id_mmfr3=34611729 697midr=1091551472 698pmu=Null 699system=system 700 701[system.cpu0.istage2_mmu] 702type=ArmStage2MMU 703children=stage2_tlb 704eventq_index=0 705stage2_tlb=system.cpu0.istage2_mmu.stage2_tlb 706sys=system 707tlb=system.cpu0.itb 708 709[system.cpu0.istage2_mmu.stage2_tlb] 710type=ArmTLB 711children=walker 712eventq_index=0 713is_stage2=true 714size=32 715walker=system.cpu0.istage2_mmu.stage2_tlb.walker 716 717[system.cpu0.istage2_mmu.stage2_tlb.walker] 718type=ArmTableWalker 719clk_domain=system.cpu_clk_domain 720default_p_state=UNDEFINED 721eventq_index=0 722is_stage2=true 723num_squash_per_cycle=2 724p_state_clk_gate_bins=20 725p_state_clk_gate_max=1000000000000 726p_state_clk_gate_min=1000 727power_model=Null 728sys=system 729 730[system.cpu0.itb] 731type=ArmTLB 732children=walker 733eventq_index=0 734is_stage2=false 735size=64 736walker=system.cpu0.itb.walker 737 738[system.cpu0.itb.walker] 739type=ArmTableWalker 740clk_domain=system.cpu_clk_domain 741default_p_state=UNDEFINED 742eventq_index=0 743is_stage2=false 744num_squash_per_cycle=2 745p_state_clk_gate_bins=20 746p_state_clk_gate_max=1000000000000 747p_state_clk_gate_min=1000 748power_model=Null 749sys=system 750port=system.cpu0.toL2Bus.slave[2] 751 752[system.cpu0.l2cache] 753type=Cache 754children=prefetcher tags 755addr_ranges=0:18446744073709551615:0:0:0:0 756assoc=16 757clk_domain=system.cpu_clk_domain 758clusivity=mostly_excl 759data_latency=12 760default_p_state=UNDEFINED 761demand_mshr_reserve=1 762eventq_index=0 763is_read_only=false 764max_miss_count=0 765mshrs=16 766p_state_clk_gate_bins=20 767p_state_clk_gate_max=1000000000000 768p_state_clk_gate_min=1000 769power_model=Null 770prefetch_on_access=true 771prefetcher=system.cpu0.l2cache.prefetcher 772response_latency=12 773sequential_access=false 774size=1048576 775system=system 776tag_latency=12 777tags=system.cpu0.l2cache.tags 778tgts_per_mshr=8 779write_buffers=8 780writeback_clean=false 781cpu_side=system.cpu0.toL2Bus.master[0] 782mem_side=system.toL2Bus.slave[0] 783 784[system.cpu0.l2cache.prefetcher] 785type=StridePrefetcher 786cache_snoop=false 787clk_domain=system.cpu_clk_domain 788default_p_state=UNDEFINED 789degree=8 790eventq_index=0 791latency=1 792max_conf=7 793min_conf=0 794on_data=true 795on_inst=true 796on_miss=false 797on_read=true 798on_write=true 799p_state_clk_gate_bins=20 800p_state_clk_gate_max=1000000000000 801p_state_clk_gate_min=1000 802power_model=Null 803queue_filter=true 804queue_size=32 805queue_squash=true 806start_conf=4 807sys=system 808table_assoc=4 809table_sets=16 810tag_prefetch=true 811thresh_conf=4 812use_master_id=true 813 814[system.cpu0.l2cache.tags] 815type=RandomRepl 816assoc=16 817block_size=64 818clk_domain=system.cpu_clk_domain 819data_latency=12 820default_p_state=UNDEFINED 821eventq_index=0 822p_state_clk_gate_bins=20 823p_state_clk_gate_max=1000000000000 824p_state_clk_gate_min=1000 825power_model=Null 826sequential_access=false 827size=1048576 828tag_latency=12 829 830[system.cpu0.toL2Bus] 831type=CoherentXBar 832children=snoop_filter 833clk_domain=system.cpu_clk_domain 834default_p_state=UNDEFINED 835eventq_index=0 836forward_latency=0 837frontend_latency=1 838p_state_clk_gate_bins=20 839p_state_clk_gate_max=1000000000000 840p_state_clk_gate_min=1000 841point_of_coherency=false 842power_model=Null 843response_latency=1 844snoop_filter=system.cpu0.toL2Bus.snoop_filter 845snoop_response_latency=1 846system=system 847use_default_range=false 848width=32 849master=system.cpu0.l2cache.cpu_side 850slave=system.cpu0.icache.mem_side system.cpu0.dcache.mem_side system.cpu0.itb.walker.port system.cpu0.dtb.walker.port 851 852[system.cpu0.toL2Bus.snoop_filter] 853type=SnoopFilter 854eventq_index=0 855lookup_latency=0 856max_capacity=8388608 857system=system 858 859[system.cpu0.tracer] 860type=ExeTracer 861eventq_index=0 862 863[system.cpu1] 864type=DerivO3CPU 865children=branchPred dcache dstage2_mmu dtb fuPool icache interrupts isa istage2_mmu itb l2cache toL2Bus tracer 866LFSTSize=1024 867LQEntries=16 868LSQCheckLoads=true 869LSQDepCheckShift=0 870SQEntries=16 871SSITSize=1024 872activity=0 873backComSize=5 874branchPred=system.cpu1.branchPred 875cacheStorePorts=200 876checker=Null 877clk_domain=system.cpu_clk_domain 878commitToDecodeDelay=1 879commitToFetchDelay=1 880commitToIEWDelay=1 881commitToRenameDelay=1 882commitWidth=8 883cpu_id=1 884decodeToFetchDelay=1 885decodeToRenameDelay=2 886decodeWidth=3 887default_p_state=UNDEFINED 888dispatchWidth=6 889do_checkpoint_insts=true 890do_quiesce=true 891do_statistics_insts=true 892dstage2_mmu=system.cpu1.dstage2_mmu 893dtb=system.cpu1.dtb 894eventq_index=0 895fetchBufferSize=16 896fetchQueueSize=32 897fetchToDecodeDelay=3 898fetchTrapLatency=1 899fetchWidth=3 900forwardComSize=5 901fuPool=system.cpu1.fuPool 902function_trace=false 903function_trace_start=0 904iewToCommitDelay=1 905iewToDecodeDelay=1 906iewToFetchDelay=1 907iewToRenameDelay=1 908interrupts=system.cpu1.interrupts 909isa=system.cpu1.isa 910issueToExecuteDelay=1 911issueWidth=8 912istage2_mmu=system.cpu1.istage2_mmu 913itb=system.cpu1.itb 914max_insts_all_threads=0 915max_insts_any_thread=0 916max_loads_all_threads=0 917max_loads_any_thread=0 918needsTSO=false 919numIQEntries=32 920numPhysCCRegs=640 921numPhysFloatRegs=192 922numPhysIntRegs=128 923numROBEntries=40 924numRobs=1 925numThreads=1 926p_state_clk_gate_bins=20 927p_state_clk_gate_max=1000000000000 928p_state_clk_gate_min=1000 929power_model=Null 930profile=0 931progress_interval=0 932renameToDecodeDelay=1 933renameToFetchDelay=1 934renameToIEWDelay=1 935renameToROBDelay=1 936renameWidth=3 937simpoint_start_insts= 938smtCommitPolicy=RoundRobin 939smtFetchPolicy=SingleThread 940smtIQPolicy=Partitioned 941smtIQThreshold=100 942smtLSQPolicy=Partitioned 943smtLSQThreshold=100 944smtNumFetchingThreads=1 945smtROBPolicy=Partitioned 946smtROBThreshold=100 947socket_id=0 948squashWidth=8 949store_set_clear_period=250000 950switched_out=false 951syscallRetryLatency=10000 952system=system 953tracer=system.cpu1.tracer 954trapLatency=13 955wbWidth=8 956workload= 957dcache_port=system.cpu1.dcache.cpu_side 958icache_port=system.cpu1.icache.cpu_side 959 960[system.cpu1.branchPred] 961type=BiModeBP 962BTBEntries=2048 963BTBTagSize=18 964RASSize=16 965choiceCtrBits=2 966choicePredictorSize=8192 967eventq_index=0 968globalCtrBits=2 969globalPredictorSize=8192 970indirectHashGHR=true 971indirectHashTargets=true 972indirectPathLength=3 973indirectSets=256 974indirectTagSize=16 975indirectWays=2 976instShiftAmt=2 977numThreads=1 978useIndirect=true 979 980[system.cpu1.dcache] 981type=Cache 982children=tags 983addr_ranges=0:18446744073709551615:0:0:0:0 984assoc=2 985clk_domain=system.cpu_clk_domain 986clusivity=mostly_incl 987data_latency=2 988default_p_state=UNDEFINED 989demand_mshr_reserve=1 990eventq_index=0 991is_read_only=false 992max_miss_count=0 993mshrs=6 994p_state_clk_gate_bins=20 995p_state_clk_gate_max=1000000000000 996p_state_clk_gate_min=1000 997power_model=Null 998prefetch_on_access=false 999prefetcher=Null 1000response_latency=2 1001sequential_access=false 1002size=32768 1003system=system 1004tag_latency=2 1005tags=system.cpu1.dcache.tags 1006tgts_per_mshr=8 1007write_buffers=16 1008writeback_clean=true 1009cpu_side=system.cpu1.dcache_port 1010mem_side=system.cpu1.toL2Bus.slave[1] 1011 1012[system.cpu1.dcache.tags] 1013type=LRU 1014assoc=2 1015block_size=64 1016clk_domain=system.cpu_clk_domain 1017data_latency=2 1018default_p_state=UNDEFINED 1019eventq_index=0 1020p_state_clk_gate_bins=20 1021p_state_clk_gate_max=1000000000000 1022p_state_clk_gate_min=1000 1023power_model=Null 1024sequential_access=false 1025size=32768 1026tag_latency=2 1027 1028[system.cpu1.dstage2_mmu] 1029type=ArmStage2MMU 1030children=stage2_tlb 1031eventq_index=0 1032stage2_tlb=system.cpu1.dstage2_mmu.stage2_tlb 1033sys=system 1034tlb=system.cpu1.dtb 1035 1036[system.cpu1.dstage2_mmu.stage2_tlb] 1037type=ArmTLB 1038children=walker 1039eventq_index=0 1040is_stage2=true 1041size=32 1042walker=system.cpu1.dstage2_mmu.stage2_tlb.walker 1043 1044[system.cpu1.dstage2_mmu.stage2_tlb.walker] 1045type=ArmTableWalker 1046clk_domain=system.cpu_clk_domain 1047default_p_state=UNDEFINED 1048eventq_index=0 1049is_stage2=true 1050num_squash_per_cycle=2 1051p_state_clk_gate_bins=20 1052p_state_clk_gate_max=1000000000000 1053p_state_clk_gate_min=1000 1054power_model=Null 1055sys=system 1056 1057[system.cpu1.dtb] 1058type=ArmTLB 1059children=walker 1060eventq_index=0 1061is_stage2=false 1062size=64 1063walker=system.cpu1.dtb.walker 1064 1065[system.cpu1.dtb.walker] 1066type=ArmTableWalker 1067clk_domain=system.cpu_clk_domain 1068default_p_state=UNDEFINED 1069eventq_index=0 1070is_stage2=false 1071num_squash_per_cycle=2 1072p_state_clk_gate_bins=20 1073p_state_clk_gate_max=1000000000000 1074p_state_clk_gate_min=1000 1075power_model=Null 1076sys=system 1077port=system.cpu1.toL2Bus.slave[3] 1078 1079[system.cpu1.fuPool] 1080type=FUPool 1081children=FUList0 FUList1 FUList2 FUList3 FUList4 1082FUList=system.cpu1.fuPool.FUList0 system.cpu1.fuPool.FUList1 system.cpu1.fuPool.FUList2 system.cpu1.fuPool.FUList3 system.cpu1.fuPool.FUList4 1083eventq_index=0 1084 1085[system.cpu1.fuPool.FUList0] 1086type=FUDesc 1087children=opList 1088count=2 1089eventq_index=0 1090opList=system.cpu1.fuPool.FUList0.opList 1091 1092[system.cpu1.fuPool.FUList0.opList] 1093type=OpDesc 1094eventq_index=0 1095opClass=IntAlu 1096opLat=1 1097pipelined=true 1098 1099[system.cpu1.fuPool.FUList1] 1100type=FUDesc 1101children=opList0 opList1 opList2 1102count=1 1103eventq_index=0 1104opList=system.cpu1.fuPool.FUList1.opList0 system.cpu1.fuPool.FUList1.opList1 system.cpu1.fuPool.FUList1.opList2 1105 1106[system.cpu1.fuPool.FUList1.opList0] 1107type=OpDesc 1108eventq_index=0 1109opClass=IntMult 1110opLat=3 1111pipelined=true 1112 1113[system.cpu1.fuPool.FUList1.opList1] 1114type=OpDesc 1115eventq_index=0 1116opClass=IntDiv 1117opLat=12 1118pipelined=false 1119 1120[system.cpu1.fuPool.FUList1.opList2] 1121type=OpDesc 1122eventq_index=0 1123opClass=IprAccess 1124opLat=3 1125pipelined=true 1126 1127[system.cpu1.fuPool.FUList2] 1128type=FUDesc 1129children=opList0 opList1 1130count=1 1131eventq_index=0 1132opList=system.cpu1.fuPool.FUList2.opList0 system.cpu1.fuPool.FUList2.opList1 1133 1134[system.cpu1.fuPool.FUList2.opList0] 1135type=OpDesc 1136eventq_index=0 1137opClass=MemRead 1138opLat=2 1139pipelined=true 1140 1141[system.cpu1.fuPool.FUList2.opList1] 1142type=OpDesc 1143eventq_index=0 1144opClass=FloatMemRead 1145opLat=2 1146pipelined=true 1147 1148[system.cpu1.fuPool.FUList3] 1149type=FUDesc 1150children=opList0 opList1 1151count=1 1152eventq_index=0 1153opList=system.cpu1.fuPool.FUList3.opList0 system.cpu1.fuPool.FUList3.opList1 1154 1155[system.cpu1.fuPool.FUList3.opList0] 1156type=OpDesc 1157eventq_index=0 1158opClass=MemWrite 1159opLat=2 1160pipelined=true 1161 1162[system.cpu1.fuPool.FUList3.opList1] 1163type=OpDesc 1164eventq_index=0 1165opClass=FloatMemWrite 1166opLat=2 1167pipelined=true 1168 1169[system.cpu1.fuPool.FUList4] 1170type=FUDesc 1171children=opList00 opList01 opList02 opList03 opList04 opList05 opList06 opList07 opList08 opList09 opList10 opList11 opList12 opList13 opList14 opList15 opList16 opList17 opList18 opList19 opList20 opList21 opList22 opList23 opList24 opList25 opList26 opList27 1172count=2 1173eventq_index=0 1174opList=system.cpu1.fuPool.FUList4.opList00 system.cpu1.fuPool.FUList4.opList01 system.cpu1.fuPool.FUList4.opList02 system.cpu1.fuPool.FUList4.opList03 system.cpu1.fuPool.FUList4.opList04 system.cpu1.fuPool.FUList4.opList05 system.cpu1.fuPool.FUList4.opList06 system.cpu1.fuPool.FUList4.opList07 system.cpu1.fuPool.FUList4.opList08 system.cpu1.fuPool.FUList4.opList09 system.cpu1.fuPool.FUList4.opList10 system.cpu1.fuPool.FUList4.opList11 system.cpu1.fuPool.FUList4.opList12 system.cpu1.fuPool.FUList4.opList13 system.cpu1.fuPool.FUList4.opList14 system.cpu1.fuPool.FUList4.opList15 system.cpu1.fuPool.FUList4.opList16 system.cpu1.fuPool.FUList4.opList17 system.cpu1.fuPool.FUList4.opList18 system.cpu1.fuPool.FUList4.opList19 system.cpu1.fuPool.FUList4.opList20 system.cpu1.fuPool.FUList4.opList21 system.cpu1.fuPool.FUList4.opList22 system.cpu1.fuPool.FUList4.opList23 system.cpu1.fuPool.FUList4.opList24 system.cpu1.fuPool.FUList4.opList25 system.cpu1.fuPool.FUList4.opList26 system.cpu1.fuPool.FUList4.opList27 1175 1176[system.cpu1.fuPool.FUList4.opList00] 1177type=OpDesc 1178eventq_index=0 1179opClass=SimdAdd 1180opLat=4 1181pipelined=true 1182 1183[system.cpu1.fuPool.FUList4.opList01] 1184type=OpDesc 1185eventq_index=0 1186opClass=SimdAddAcc 1187opLat=4 1188pipelined=true 1189 1190[system.cpu1.fuPool.FUList4.opList02] 1191type=OpDesc 1192eventq_index=0 1193opClass=SimdAlu 1194opLat=4 1195pipelined=true 1196 1197[system.cpu1.fuPool.FUList4.opList03] 1198type=OpDesc 1199eventq_index=0 1200opClass=SimdCmp 1201opLat=4 1202pipelined=true 1203 1204[system.cpu1.fuPool.FUList4.opList04] 1205type=OpDesc 1206eventq_index=0 1207opClass=SimdCvt 1208opLat=3 1209pipelined=true 1210 1211[system.cpu1.fuPool.FUList4.opList05] 1212type=OpDesc 1213eventq_index=0 1214opClass=SimdMisc 1215opLat=3 1216pipelined=true 1217 1218[system.cpu1.fuPool.FUList4.opList06] 1219type=OpDesc 1220eventq_index=0 1221opClass=SimdMult 1222opLat=5 1223pipelined=true 1224 1225[system.cpu1.fuPool.FUList4.opList07] 1226type=OpDesc 1227eventq_index=0 1228opClass=SimdMultAcc 1229opLat=5 1230pipelined=true 1231 1232[system.cpu1.fuPool.FUList4.opList08] 1233type=OpDesc 1234eventq_index=0 1235opClass=SimdShift 1236opLat=3 1237pipelined=true 1238 1239[system.cpu1.fuPool.FUList4.opList09] 1240type=OpDesc 1241eventq_index=0 1242opClass=SimdShiftAcc 1243opLat=3 1244pipelined=true 1245 1246[system.cpu1.fuPool.FUList4.opList10] 1247type=OpDesc 1248eventq_index=0 1249opClass=SimdSqrt 1250opLat=9 1251pipelined=true 1252 1253[system.cpu1.fuPool.FUList4.opList11] 1254type=OpDesc 1255eventq_index=0 1256opClass=SimdFloatAdd 1257opLat=5 1258pipelined=true 1259 1260[system.cpu1.fuPool.FUList4.opList12] 1261type=OpDesc 1262eventq_index=0 1263opClass=SimdFloatAlu 1264opLat=5 1265pipelined=true 1266 1267[system.cpu1.fuPool.FUList4.opList13] 1268type=OpDesc 1269eventq_index=0 1270opClass=SimdFloatCmp 1271opLat=3 1272pipelined=true 1273 1274[system.cpu1.fuPool.FUList4.opList14] 1275type=OpDesc 1276eventq_index=0 1277opClass=SimdFloatCvt 1278opLat=3 1279pipelined=true 1280 1281[system.cpu1.fuPool.FUList4.opList15] 1282type=OpDesc 1283eventq_index=0 1284opClass=SimdFloatDiv 1285opLat=3 1286pipelined=true 1287 1288[system.cpu1.fuPool.FUList4.opList16] 1289type=OpDesc 1290eventq_index=0 1291opClass=SimdFloatMisc 1292opLat=3 1293pipelined=true 1294 1295[system.cpu1.fuPool.FUList4.opList17] 1296type=OpDesc 1297eventq_index=0 1298opClass=SimdFloatMult 1299opLat=3 1300pipelined=true 1301 1302[system.cpu1.fuPool.FUList4.opList18] 1303type=OpDesc 1304eventq_index=0 1305opClass=SimdFloatMultAcc 1306opLat=5 1307pipelined=true 1308 1309[system.cpu1.fuPool.FUList4.opList19] 1310type=OpDesc 1311eventq_index=0 1312opClass=SimdFloatSqrt 1313opLat=9 1314pipelined=true 1315 1316[system.cpu1.fuPool.FUList4.opList20] 1317type=OpDesc 1318eventq_index=0 1319opClass=FloatAdd 1320opLat=5 1321pipelined=true 1322 1323[system.cpu1.fuPool.FUList4.opList21] 1324type=OpDesc 1325eventq_index=0 1326opClass=FloatCmp 1327opLat=5 1328pipelined=true 1329 1330[system.cpu1.fuPool.FUList4.opList22] 1331type=OpDesc 1332eventq_index=0 1333opClass=FloatCvt 1334opLat=5 1335pipelined=true 1336 1337[system.cpu1.fuPool.FUList4.opList23] 1338type=OpDesc 1339eventq_index=0 1340opClass=FloatDiv 1341opLat=9 1342pipelined=false 1343 1344[system.cpu1.fuPool.FUList4.opList24] 1345type=OpDesc 1346eventq_index=0 1347opClass=FloatSqrt 1348opLat=33 1349pipelined=false 1350 1351[system.cpu1.fuPool.FUList4.opList25] 1352type=OpDesc 1353eventq_index=0 1354opClass=FloatMult 1355opLat=4 1356pipelined=true 1357 1358[system.cpu1.fuPool.FUList4.opList26] 1359type=OpDesc 1360eventq_index=0 1361opClass=FloatMultAcc 1362opLat=5 1363pipelined=true 1364 1365[system.cpu1.fuPool.FUList4.opList27] 1366type=OpDesc 1367eventq_index=0 1368opClass=FloatMisc 1369opLat=3 1370pipelined=true 1371 1372[system.cpu1.icache] 1373type=Cache 1374children=tags 1375addr_ranges=0:18446744073709551615:0:0:0:0 1376assoc=2 1377clk_domain=system.cpu_clk_domain 1378clusivity=mostly_incl 1379data_latency=1 1380default_p_state=UNDEFINED 1381demand_mshr_reserve=1 1382eventq_index=0 1383is_read_only=true 1384max_miss_count=0 1385mshrs=2 1386p_state_clk_gate_bins=20 1387p_state_clk_gate_max=1000000000000 1388p_state_clk_gate_min=1000 1389power_model=Null 1390prefetch_on_access=false 1391prefetcher=Null 1392response_latency=1 1393sequential_access=false 1394size=32768 1395system=system 1396tag_latency=1 1397tags=system.cpu1.icache.tags 1398tgts_per_mshr=8 1399write_buffers=8 1400writeback_clean=true 1401cpu_side=system.cpu1.icache_port 1402mem_side=system.cpu1.toL2Bus.slave[0] 1403 1404[system.cpu1.icache.tags] 1405type=LRU 1406assoc=2 1407block_size=64 1408clk_domain=system.cpu_clk_domain 1409data_latency=1 1410default_p_state=UNDEFINED 1411eventq_index=0 1412p_state_clk_gate_bins=20 1413p_state_clk_gate_max=1000000000000 1414p_state_clk_gate_min=1000 1415power_model=Null 1416sequential_access=false 1417size=32768 1418tag_latency=1 1419 1420[system.cpu1.interrupts] 1421type=ArmInterrupts 1422eventq_index=0 1423 1424[system.cpu1.isa] 1425type=ArmISA 1426decoderFlavour=Generic 1427eventq_index=0 1428fpsid=1090793632 1429id_aa64afr0_el1=0 1430id_aa64afr1_el1=0 1431id_aa64dfr0_el1=1052678 1432id_aa64dfr1_el1=0 1433id_aa64isar0_el1=0 1434id_aa64isar1_el1=0 1435id_aa64mmfr0_el1=15728642 1436id_aa64mmfr1_el1=0 1437id_isar0=34607377 1438id_isar1=34677009 1439id_isar2=555950401 1440id_isar3=17899825 1441id_isar4=268501314 1442id_isar5=0 1443id_mmfr0=270536963 1444id_mmfr1=0 1445id_mmfr2=19070976 1446id_mmfr3=34611729 1447midr=1091551472 1448pmu=Null 1449system=system 1450 1451[system.cpu1.istage2_mmu] 1452type=ArmStage2MMU 1453children=stage2_tlb 1454eventq_index=0 1455stage2_tlb=system.cpu1.istage2_mmu.stage2_tlb 1456sys=system 1457tlb=system.cpu1.itb 1458 1459[system.cpu1.istage2_mmu.stage2_tlb] 1460type=ArmTLB 1461children=walker 1462eventq_index=0 1463is_stage2=true 1464size=32 1465walker=system.cpu1.istage2_mmu.stage2_tlb.walker 1466 1467[system.cpu1.istage2_mmu.stage2_tlb.walker] 1468type=ArmTableWalker 1469clk_domain=system.cpu_clk_domain 1470default_p_state=UNDEFINED 1471eventq_index=0 1472is_stage2=true 1473num_squash_per_cycle=2 1474p_state_clk_gate_bins=20 1475p_state_clk_gate_max=1000000000000 1476p_state_clk_gate_min=1000 1477power_model=Null 1478sys=system 1479 1480[system.cpu1.itb] 1481type=ArmTLB 1482children=walker 1483eventq_index=0 1484is_stage2=false 1485size=64 1486walker=system.cpu1.itb.walker 1487 1488[system.cpu1.itb.walker] 1489type=ArmTableWalker 1490clk_domain=system.cpu_clk_domain 1491default_p_state=UNDEFINED 1492eventq_index=0 1493is_stage2=false 1494num_squash_per_cycle=2 1495p_state_clk_gate_bins=20 1496p_state_clk_gate_max=1000000000000 1497p_state_clk_gate_min=1000 1498power_model=Null 1499sys=system 1500port=system.cpu1.toL2Bus.slave[2] 1501 1502[system.cpu1.l2cache] 1503type=Cache 1504children=prefetcher tags 1505addr_ranges=0:18446744073709551615:0:0:0:0 1506assoc=16 1507clk_domain=system.cpu_clk_domain 1508clusivity=mostly_excl 1509data_latency=12 1510default_p_state=UNDEFINED 1511demand_mshr_reserve=1 1512eventq_index=0 1513is_read_only=false 1514max_miss_count=0 1515mshrs=16 1516p_state_clk_gate_bins=20 1517p_state_clk_gate_max=1000000000000 1518p_state_clk_gate_min=1000 1519power_model=Null 1520prefetch_on_access=true 1521prefetcher=system.cpu1.l2cache.prefetcher 1522response_latency=12 1523sequential_access=false 1524size=1048576 1525system=system 1526tag_latency=12 1527tags=system.cpu1.l2cache.tags 1528tgts_per_mshr=8 1529write_buffers=8 1530writeback_clean=false 1531cpu_side=system.cpu1.toL2Bus.master[0] 1532mem_side=system.toL2Bus.slave[1] 1533 1534[system.cpu1.l2cache.prefetcher] 1535type=StridePrefetcher 1536cache_snoop=false 1537clk_domain=system.cpu_clk_domain 1538default_p_state=UNDEFINED 1539degree=8 1540eventq_index=0 1541latency=1 1542max_conf=7 1543min_conf=0 1544on_data=true 1545on_inst=true 1546on_miss=false 1547on_read=true 1548on_write=true 1549p_state_clk_gate_bins=20 1550p_state_clk_gate_max=1000000000000 1551p_state_clk_gate_min=1000 1552power_model=Null 1553queue_filter=true 1554queue_size=32 1555queue_squash=true 1556start_conf=4 1557sys=system 1558table_assoc=4 1559table_sets=16 1560tag_prefetch=true 1561thresh_conf=4 1562use_master_id=true 1563 1564[system.cpu1.l2cache.tags] 1565type=RandomRepl 1566assoc=16 1567block_size=64 1568clk_domain=system.cpu_clk_domain 1569data_latency=12 1570default_p_state=UNDEFINED 1571eventq_index=0 1572p_state_clk_gate_bins=20 1573p_state_clk_gate_max=1000000000000 1574p_state_clk_gate_min=1000 1575power_model=Null 1576sequential_access=false 1577size=1048576 1578tag_latency=12 1579 1580[system.cpu1.toL2Bus] 1581type=CoherentXBar 1582children=snoop_filter 1583clk_domain=system.cpu_clk_domain 1584default_p_state=UNDEFINED 1585eventq_index=0 1586forward_latency=0 1587frontend_latency=1 1588p_state_clk_gate_bins=20 1589p_state_clk_gate_max=1000000000000 1590p_state_clk_gate_min=1000 1591point_of_coherency=false 1592power_model=Null 1593response_latency=1 1594snoop_filter=system.cpu1.toL2Bus.snoop_filter 1595snoop_response_latency=1 1596system=system 1597use_default_range=false 1598width=32 1599master=system.cpu1.l2cache.cpu_side 1600slave=system.cpu1.icache.mem_side system.cpu1.dcache.mem_side system.cpu1.itb.walker.port system.cpu1.dtb.walker.port 1601 1602[system.cpu1.toL2Bus.snoop_filter] 1603type=SnoopFilter 1604eventq_index=0 1605lookup_latency=0 1606max_capacity=8388608 1607system=system 1608 1609[system.cpu1.tracer] 1610type=ExeTracer 1611eventq_index=0 1612 1613[system.cpu_clk_domain] 1614type=SrcClockDomain 1615clock=500 1616domain_id=-1 1617eventq_index=0 1618init_perf_level=0 1619voltage_domain=system.voltage_domain 1620 1621[system.dvfs_handler] 1622type=DVFSHandler 1623domains= 1624enable=false 1625eventq_index=0 1626sys_clk_domain=system.clk_domain 1627transition_latency=100000000 1628 1629[system.intrctrl] 1630type=IntrControl 1631eventq_index=0 1632sys=system 1633 1634[system.iobus] 1635type=NoncoherentXBar 1636clk_domain=system.clk_domain 1637default_p_state=UNDEFINED 1638eventq_index=0 1639forward_latency=1 1640frontend_latency=2 1641p_state_clk_gate_bins=20 1642p_state_clk_gate_max=1000000000000 1643p_state_clk_gate_min=1000 1644power_model=Null 1645response_latency=2 1646use_default_range=false 1647width=16 1648master=system.realview.uart.pio system.realview.realview_io.pio system.realview.pci_host.pio system.realview.timer0.pio system.realview.timer1.pio system.realview.clcd.pio system.realview.hdlcd.pio system.realview.kmi0.pio system.realview.kmi1.pio system.realview.cf_ctrl.pio system.realview.rtc.pio system.realview.vram.port system.realview.l2x0_fake.pio system.realview.uart1_fake.pio system.realview.uart2_fake.pio system.realview.uart3_fake.pio system.realview.sp810_fake.pio system.realview.watchdog_fake.pio system.realview.aaci_fake.pio system.realview.lan_fake.pio system.realview.usb_fake.pio system.realview.mmc_fake.pio system.realview.energy_ctrl.pio system.realview.ide.pio system.realview.ethernet.pio system.iocache.cpu_side 1649slave=system.bridge.master system.realview.clcd.dma system.realview.cf_ctrl.dma system.realview.ide.dma system.realview.ethernet.dma 1650 1651[system.iocache] 1652type=Cache 1653children=tags 1654addr_ranges=2147483648:2415919103:0:0:0:0 1655assoc=8 1656clk_domain=system.clk_domain 1657clusivity=mostly_incl 1658data_latency=50 1659default_p_state=UNDEFINED 1660demand_mshr_reserve=1 1661eventq_index=0 1662is_read_only=false 1663max_miss_count=0 1664mshrs=20 1665p_state_clk_gate_bins=20 1666p_state_clk_gate_max=1000000000000 1667p_state_clk_gate_min=1000 1668power_model=Null 1669prefetch_on_access=false 1670prefetcher=Null 1671response_latency=50 1672sequential_access=false 1673size=1024 1674system=system 1675tag_latency=50 1676tags=system.iocache.tags 1677tgts_per_mshr=12 1678write_buffers=8 1679writeback_clean=false 1680cpu_side=system.iobus.master[25] 1681mem_side=system.membus.slave[3] 1682 1683[system.iocache.tags] 1684type=LRU 1685assoc=8 1686block_size=64 1687clk_domain=system.clk_domain 1688data_latency=50 1689default_p_state=UNDEFINED 1690eventq_index=0 1691p_state_clk_gate_bins=20 1692p_state_clk_gate_max=1000000000000 1693p_state_clk_gate_min=1000 1694power_model=Null 1695sequential_access=false 1696size=1024 1697tag_latency=50 1698 1699[system.l2c] 1700type=Cache 1701children=tags 1702addr_ranges=0:18446744073709551615:0:0:0:0 1703assoc=8 1704clk_domain=system.cpu_clk_domain 1705clusivity=mostly_incl 1706data_latency=20 1707default_p_state=UNDEFINED 1708demand_mshr_reserve=1 1709eventq_index=0 1710is_read_only=false 1711max_miss_count=0 1712mshrs=20 1713p_state_clk_gate_bins=20 1714p_state_clk_gate_max=1000000000000 1715p_state_clk_gate_min=1000 1716power_model=Null 1717prefetch_on_access=false 1718prefetcher=Null 1719response_latency=20 1720sequential_access=false 1721size=4194304 1722system=system 1723tag_latency=20 1724tags=system.l2c.tags 1725tgts_per_mshr=12 1726write_buffers=8 1727writeback_clean=false 1728cpu_side=system.toL2Bus.master[0] 1729mem_side=system.membus.slave[2] 1730 1731[system.l2c.tags] 1732type=LRU 1733assoc=8 1734block_size=64 1735clk_domain=system.cpu_clk_domain 1736data_latency=20 1737default_p_state=UNDEFINED 1738eventq_index=0 1739p_state_clk_gate_bins=20 1740p_state_clk_gate_max=1000000000000 1741p_state_clk_gate_min=1000 1742power_model=Null 1743sequential_access=false 1744size=4194304 1745tag_latency=20 1746 1747[system.membus] 1748type=CoherentXBar 1749children=badaddr_responder snoop_filter 1750clk_domain=system.clk_domain 1751default_p_state=UNDEFINED 1752eventq_index=0 1753forward_latency=4 1754frontend_latency=3 1755p_state_clk_gate_bins=20 1756p_state_clk_gate_max=1000000000000 1757p_state_clk_gate_min=1000 1758point_of_coherency=true 1759power_model=Null 1760response_latency=2 1761snoop_filter=system.membus.snoop_filter 1762snoop_response_latency=4 1763system=system 1764use_default_range=false 1765width=16 1766default=system.membus.badaddr_responder.pio 1767master=system.bridge.slave system.realview.nvmem.port system.realview.gic.pio system.realview.vgic.pio system.realview.local_cpu_timer.pio system.physmem.port 1768slave=system.realview.hdlcd.dma system.system_port system.l2c.mem_side system.iocache.mem_side 1769 1770[system.membus.badaddr_responder] 1771type=IsaFake 1772clk_domain=system.clk_domain 1773default_p_state=UNDEFINED 1774eventq_index=0 1775fake_mem=false 1776p_state_clk_gate_bins=20 1777p_state_clk_gate_max=1000000000000 1778p_state_clk_gate_min=1000 1779pio_addr=0 1780pio_latency=100000 1781pio_size=8 1782power_model=Null 1783ret_bad_addr=true 1784ret_data16=65535 1785ret_data32=4294967295 1786ret_data64=18446744073709551615 1787ret_data8=255 1788system=system 1789update_data=false 1790warn_access=warn 1791pio=system.membus.default 1792 1793[system.membus.snoop_filter] 1794type=SnoopFilter 1795eventq_index=0 1796lookup_latency=1 1797max_capacity=8388608 1798system=system 1799 1800[system.physmem] 1801type=DRAMCtrl 1802IDD0=0.055000 1803IDD02=0.000000 1804IDD2N=0.032000 1805IDD2N2=0.000000 1806IDD2P0=0.000000 1807IDD2P02=0.000000 1808IDD2P1=0.032000 1809IDD2P12=0.000000 1810IDD3N=0.038000 1811IDD3N2=0.000000 1812IDD3P0=0.000000 1813IDD3P02=0.000000 1814IDD3P1=0.038000 1815IDD3P12=0.000000 1816IDD4R=0.157000 1817IDD4R2=0.000000 1818IDD4W=0.125000 1819IDD4W2=0.000000 1820IDD5=0.235000 1821IDD52=0.000000 1822IDD6=0.020000 1823IDD62=0.000000 1824VDD=1.500000 1825VDD2=0.000000 1826activation_limit=4 1827addr_mapping=RoRaBaCoCh 1828bank_groups_per_rank=0 1829banks_per_rank=8 1830burst_length=8 1831channels=1 1832clk_domain=system.clk_domain 1833conf_table_reported=true 1834default_p_state=UNDEFINED 1835device_bus_width=8 1836device_rowbuffer_size=1024 1837device_size=536870912 1838devices_per_rank=8 1839dll=true 1840eventq_index=0 1841in_addr_map=true 1842kvm_map=true 1843max_accesses_per_row=16 1844mem_sched_policy=frfcfs 1845min_writes_per_switch=16 1846null=false 1847p_state_clk_gate_bins=20 1848p_state_clk_gate_max=1000000000000 1849p_state_clk_gate_min=1000 1850page_policy=open_adaptive 1851power_model=Null 1852range=2147483648:2415919103:0:0:0:0 1853ranks_per_channel=2 1854read_buffer_size=32 1855static_backend_latency=10000 1856static_frontend_latency=10000 1857tBURST=5000 1858tCCD_L=0 1859tCK=1250 1860tCL=13750 1861tCS=2500 1862tRAS=35000 1863tRCD=13750 1864tREFI=7800000 1865tRFC=260000 1866tRP=13750 1867tRRD=6000 1868tRRD_L=0 1869tRTP=7500 1870tRTW=2500 1871tWR=15000 1872tWTR=7500 1873tXAW=30000 1874tXP=6000 1875tXPDLL=0 1876tXS=270000 1877tXSDLL=0 1878write_buffer_size=64 1879write_high_thresh_perc=85 1880write_low_thresh_perc=50 1881port=system.membus.master[5] 1882 1883[system.realview] 1884type=RealView 1885children=aaci_fake cf_ctrl clcd dcc energy_ctrl ethernet generic_timer gic hdlcd ide kmi0 kmi1 l2x0_fake lan_fake local_cpu_timer mcc mmc_fake nvmem pci_host realview_io rtc sp810_fake timer0 timer1 uart uart1_fake uart2_fake uart3_fake usb_fake vgic vram watchdog_fake 1886eventq_index=0 1887intrctrl=system.intrctrl 1888system=system 1889 1890[system.realview.aaci_fake] 1891type=AmbaFake 1892amba_id=0 1893clk_domain=system.clk_domain 1894default_p_state=UNDEFINED 1895eventq_index=0 1896ignore_access=false 1897p_state_clk_gate_bins=20 1898p_state_clk_gate_max=1000000000000 1899p_state_clk_gate_min=1000 1900pio_addr=470024192 1901pio_latency=100000 1902power_model=Null 1903system=system 1904pio=system.iobus.master[18] 1905 1906[system.realview.cf_ctrl] 1907type=IdeController 1908BAR0=471465984 1909BAR0LegacyIO=true 1910BAR0Size=256 1911BAR1=471466240 1912BAR1LegacyIO=true 1913BAR1Size=4096 1914BAR2=1 1915BAR2LegacyIO=false 1916BAR2Size=8 1917BAR3=1 1918BAR3LegacyIO=false 1919BAR3Size=4 1920BAR4=1 1921BAR4LegacyIO=false 1922BAR4Size=16 1923BAR5=1 1924BAR5LegacyIO=false 1925BAR5Size=0 1926BIST=0 1927CacheLineSize=0 1928CapabilityPtr=0 1929CardbusCIS=0 1930ClassCode=1 1931Command=1 1932DeviceID=28945 1933ExpansionROM=0 1934HeaderType=0 1935InterruptLine=31 1936InterruptPin=1 1937LatencyTimer=0 1938LegacyIOBase=0 1939MSICAPBaseOffset=0 1940MSICAPCapId=0 1941MSICAPMaskBits=0 1942MSICAPMsgAddr=0 1943MSICAPMsgCtrl=0 1944MSICAPMsgData=0 1945MSICAPMsgUpperAddr=0 1946MSICAPNextCapability=0 1947MSICAPPendingBits=0 1948MSIXCAPBaseOffset=0 1949MSIXCAPCapId=0 1950MSIXCAPNextCapability=0 1951MSIXMsgCtrl=0 1952MSIXPbaOffset=0 1953MSIXTableOffset=0 1954MaximumLatency=0 1955MinimumGrant=0 1956PMCAPBaseOffset=0 1957PMCAPCapId=0 1958PMCAPCapabilities=0 1959PMCAPCtrlStatus=0 1960PMCAPNextCapability=0 1961PXCAPBaseOffset=0 1962PXCAPCapId=0 1963PXCAPCapabilities=0 1964PXCAPDevCap2=0 1965PXCAPDevCapabilities=0 1966PXCAPDevCtrl=0 1967PXCAPDevCtrl2=0 1968PXCAPDevStatus=0 1969PXCAPLinkCap=0 1970PXCAPLinkCtrl=0 1971PXCAPLinkStatus=0 1972PXCAPNextCapability=0 1973ProgIF=133 1974Revision=0 1975Status=640 1976SubClassCode=1 1977SubsystemID=0 1978SubsystemVendorID=0 1979VendorID=32902 1980clk_domain=system.clk_domain 1981config_latency=20000 1982ctrl_offset=2 1983default_p_state=UNDEFINED 1984disks= 1985eventq_index=0 1986host=system.realview.pci_host 1987io_shift=2 1988p_state_clk_gate_bins=20 1989p_state_clk_gate_max=1000000000000 1990p_state_clk_gate_min=1000 1991pci_bus=2 1992pci_dev=0 1993pci_func=0 1994pio_latency=30000 1995power_model=Null 1996system=system 1997dma=system.iobus.slave[2] 1998pio=system.iobus.master[9] 1999 2000[system.realview.clcd] 2001type=Pl111 2002amba_id=1315089 2003clk_domain=system.clk_domain 2004default_p_state=UNDEFINED 2005enable_capture=true 2006eventq_index=0 2007gic=system.realview.gic 2008int_num=46 2009p_state_clk_gate_bins=20 2010p_state_clk_gate_max=1000000000000 2011p_state_clk_gate_min=1000 2012pio_addr=471793664 2013pio_latency=10000 2014pixel_clock=41667 2015power_model=Null 2016system=system 2017vnc=system.vncserver 2018dma=system.iobus.slave[1] 2019pio=system.iobus.master[5] 2020 2021[system.realview.dcc] 2022type=SubSystem 2023children=osc_cpu osc_ddr osc_hsbm osc_pxl osc_smb osc_sys 2024eventq_index=0 2025thermal_domain=Null 2026 2027[system.realview.dcc.osc_cpu] 2028type=RealViewOsc 2029dcc=0 2030device=0 2031eventq_index=0 2032freq=16667 2033parent=system.realview.realview_io 2034position=0 2035site=1 2036voltage_domain=system.voltage_domain 2037 2038[system.realview.dcc.osc_ddr] 2039type=RealViewOsc 2040dcc=0 2041device=8 2042eventq_index=0 2043freq=25000 2044parent=system.realview.realview_io 2045position=0 2046site=1 2047voltage_domain=system.voltage_domain 2048 2049[system.realview.dcc.osc_hsbm] 2050type=RealViewOsc 2051dcc=0 2052device=4 2053eventq_index=0 2054freq=25000 2055parent=system.realview.realview_io 2056position=0 2057site=1 2058voltage_domain=system.voltage_domain 2059 2060[system.realview.dcc.osc_pxl] 2061type=RealViewOsc 2062dcc=0 2063device=5 2064eventq_index=0 2065freq=42105 2066parent=system.realview.realview_io 2067position=0 2068site=1 2069voltage_domain=system.voltage_domain 2070 2071[system.realview.dcc.osc_smb] 2072type=RealViewOsc 2073dcc=0 2074device=6 2075eventq_index=0 2076freq=20000 2077parent=system.realview.realview_io 2078position=0 2079site=1 2080voltage_domain=system.voltage_domain 2081 2082[system.realview.dcc.osc_sys] 2083type=RealViewOsc 2084dcc=0 2085device=7 2086eventq_index=0 2087freq=16667 2088parent=system.realview.realview_io 2089position=0 2090site=1 2091voltage_domain=system.voltage_domain 2092 2093[system.realview.energy_ctrl] 2094type=EnergyCtrl 2095clk_domain=system.clk_domain 2096default_p_state=UNDEFINED 2097dvfs_handler=system.dvfs_handler 2098eventq_index=0 2099p_state_clk_gate_bins=20 2100p_state_clk_gate_max=1000000000000 2101p_state_clk_gate_min=1000 2102pio_addr=470286336 2103pio_latency=100000 2104power_model=Null 2105system=system 2106pio=system.iobus.master[22] 2107 2108[system.realview.ethernet] 2109type=IGbE 2110BAR0=0 2111BAR0LegacyIO=false 2112BAR0Size=131072 2113BAR1=0 2114BAR1LegacyIO=false 2115BAR1Size=0 2116BAR2=0 2117BAR2LegacyIO=false 2118BAR2Size=0 2119BAR3=0 2120BAR3LegacyIO=false 2121BAR3Size=0 2122BAR4=0 2123BAR4LegacyIO=false 2124BAR4Size=0 2125BAR5=0 2126BAR5LegacyIO=false 2127BAR5Size=0 2128BIST=0 2129CacheLineSize=0 2130CapabilityPtr=0 2131CardbusCIS=0 2132ClassCode=2 2133Command=0 2134DeviceID=4213 2135ExpansionROM=0 2136HeaderType=0 2137InterruptLine=1 2138InterruptPin=1 2139LatencyTimer=0 2140LegacyIOBase=0 2141MSICAPBaseOffset=0 2142MSICAPCapId=0 2143MSICAPMaskBits=0 2144MSICAPMsgAddr=0 2145MSICAPMsgCtrl=0 2146MSICAPMsgData=0 2147MSICAPMsgUpperAddr=0 2148MSICAPNextCapability=0 2149MSICAPPendingBits=0 2150MSIXCAPBaseOffset=0 2151MSIXCAPCapId=0 2152MSIXCAPNextCapability=0 2153MSIXMsgCtrl=0 2154MSIXPbaOffset=0 2155MSIXTableOffset=0 2156MaximumLatency=0 2157MinimumGrant=255 2158PMCAPBaseOffset=0 2159PMCAPCapId=0 2160PMCAPCapabilities=0 2161PMCAPCtrlStatus=0 2162PMCAPNextCapability=0 2163PXCAPBaseOffset=0 2164PXCAPCapId=0 2165PXCAPCapabilities=0 2166PXCAPDevCap2=0 2167PXCAPDevCapabilities=0 2168PXCAPDevCtrl=0 2169PXCAPDevCtrl2=0 2170PXCAPDevStatus=0 2171PXCAPLinkCap=0 2172PXCAPLinkCtrl=0 2173PXCAPLinkStatus=0 2174PXCAPNextCapability=0 2175ProgIF=0 2176Revision=0 2177Status=0 2178SubClassCode=0 2179SubsystemID=4104 2180SubsystemVendorID=32902 2181VendorID=32902 2182clk_domain=system.clk_domain 2183config_latency=20000 2184default_p_state=UNDEFINED 2185eventq_index=0 2186fetch_comp_delay=10000 2187fetch_delay=10000 2188hardware_address=00:90:00:00:00:01 2189host=system.realview.pci_host 2190p_state_clk_gate_bins=20 2191p_state_clk_gate_max=1000000000000 2192p_state_clk_gate_min=1000 2193pci_bus=0 2194pci_dev=0 2195pci_func=0 2196phy_epid=896 2197phy_pid=680 2198pio_latency=30000 2199power_model=Null 2200rx_desc_cache_size=64 2201rx_fifo_size=393216 2202rx_write_delay=0 2203system=system 2204tx_desc_cache_size=64 2205tx_fifo_size=393216 2206tx_read_delay=0 2207wb_comp_delay=10000 2208wb_delay=10000 2209dma=system.iobus.slave[4] 2210pio=system.iobus.master[24] 2211 2212[system.realview.generic_timer] 2213type=GenericTimer 2214eventq_index=0 2215gic=system.realview.gic 2216int_phys=29 2217int_virt=27 2218system=system 2219 2220[system.realview.gic] 2221type=Pl390 2222clk_domain=system.clk_domain 2223cpu_addr=738205696 2224cpu_pio_delay=10000 2225default_p_state=UNDEFINED 2226dist_addr=738201600 2227dist_pio_delay=10000 2228eventq_index=0 2229gem5_extensions=false 2230int_latency=10000 2231it_lines=128 2232p_state_clk_gate_bins=20 2233p_state_clk_gate_max=1000000000000 2234p_state_clk_gate_min=1000 2235platform=system.realview 2236power_model=Null 2237system=system 2238pio=system.membus.master[2] 2239 2240[system.realview.hdlcd] 2241type=HDLcd 2242amba_id=1314816 2243clk_domain=system.clk_domain 2244default_p_state=UNDEFINED 2245enable_capture=true 2246eventq_index=0 2247gic=system.realview.gic 2248int_num=117 2249p_state_clk_gate_bins=20 2250p_state_clk_gate_max=1000000000000 2251p_state_clk_gate_min=1000 2252pio_addr=721420288 2253pio_latency=10000 2254pixel_buffer_size=2048 2255pixel_chunk=32 2256power_model=Null 2257pxl_clk=system.realview.dcc.osc_pxl 2258system=system 2259vnc=system.vncserver 2260workaround_dma_line_count=true 2261workaround_swap_rb=true 2262dma=system.membus.slave[0] 2263pio=system.iobus.master[6] 2264 2265[system.realview.ide] 2266type=IdeController 2267BAR0=1 2268BAR0LegacyIO=false 2269BAR0Size=8 2270BAR1=1 2271BAR1LegacyIO=false 2272BAR1Size=4 2273BAR2=1 2274BAR2LegacyIO=false 2275BAR2Size=8 2276BAR3=1 2277BAR3LegacyIO=false 2278BAR3Size=4 2279BAR4=1 2280BAR4LegacyIO=false 2281BAR4Size=16 2282BAR5=1 2283BAR5LegacyIO=false 2284BAR5Size=0 2285BIST=0 2286CacheLineSize=0 2287CapabilityPtr=0 2288CardbusCIS=0 2289ClassCode=1 2290Command=0 2291DeviceID=28945 2292ExpansionROM=0 2293HeaderType=0 2294InterruptLine=2 2295InterruptPin=2 2296LatencyTimer=0 2297LegacyIOBase=0 2298MSICAPBaseOffset=0 2299MSICAPCapId=0 2300MSICAPMaskBits=0 2301MSICAPMsgAddr=0 2302MSICAPMsgCtrl=0 2303MSICAPMsgData=0 2304MSICAPMsgUpperAddr=0 2305MSICAPNextCapability=0 2306MSICAPPendingBits=0 2307MSIXCAPBaseOffset=0 2308MSIXCAPCapId=0 2309MSIXCAPNextCapability=0 2310MSIXMsgCtrl=0 2311MSIXPbaOffset=0 2312MSIXTableOffset=0 2313MaximumLatency=0 2314MinimumGrant=0 2315PMCAPBaseOffset=0 2316PMCAPCapId=0 2317PMCAPCapabilities=0 2318PMCAPCtrlStatus=0 2319PMCAPNextCapability=0 2320PXCAPBaseOffset=0 2321PXCAPCapId=0 2322PXCAPCapabilities=0 2323PXCAPDevCap2=0 2324PXCAPDevCapabilities=0 2325PXCAPDevCtrl=0 2326PXCAPDevCtrl2=0 2327PXCAPDevStatus=0 2328PXCAPLinkCap=0 2329PXCAPLinkCtrl=0 2330PXCAPLinkStatus=0 2331PXCAPNextCapability=0 2332ProgIF=133 2333Revision=0 2334Status=640 2335SubClassCode=1 2336SubsystemID=0 2337SubsystemVendorID=0 2338VendorID=32902 2339clk_domain=system.clk_domain 2340config_latency=20000 2341ctrl_offset=0 2342default_p_state=UNDEFINED 2343disks=system.cf0 2344eventq_index=0 2345host=system.realview.pci_host 2346io_shift=0 2347p_state_clk_gate_bins=20 2348p_state_clk_gate_max=1000000000000 2349p_state_clk_gate_min=1000 2350pci_bus=0 2351pci_dev=1 2352pci_func=0 2353pio_latency=30000 2354power_model=Null 2355system=system 2356dma=system.iobus.slave[3] 2357pio=system.iobus.master[23] 2358 2359[system.realview.kmi0] 2360type=Pl050 2361amba_id=1314896 2362clk_domain=system.clk_domain 2363default_p_state=UNDEFINED 2364eventq_index=0 2365gic=system.realview.gic 2366int_delay=1000000 2367int_num=44 2368is_mouse=false 2369p_state_clk_gate_bins=20 2370p_state_clk_gate_max=1000000000000 2371p_state_clk_gate_min=1000 2372pio_addr=470155264 2373pio_latency=100000 2374power_model=Null 2375system=system 2376vnc=system.vncserver 2377pio=system.iobus.master[7] 2378 2379[system.realview.kmi1] 2380type=Pl050 2381amba_id=1314896 2382clk_domain=system.clk_domain 2383default_p_state=UNDEFINED 2384eventq_index=0 2385gic=system.realview.gic 2386int_delay=1000000 2387int_num=45 2388is_mouse=true 2389p_state_clk_gate_bins=20 2390p_state_clk_gate_max=1000000000000 2391p_state_clk_gate_min=1000 2392pio_addr=470220800 2393pio_latency=100000 2394power_model=Null 2395system=system 2396vnc=system.vncserver 2397pio=system.iobus.master[8] 2398 2399[system.realview.l2x0_fake] 2400type=IsaFake 2401clk_domain=system.clk_domain 2402default_p_state=UNDEFINED 2403eventq_index=0 2404fake_mem=false 2405p_state_clk_gate_bins=20 2406p_state_clk_gate_max=1000000000000 2407p_state_clk_gate_min=1000 2408pio_addr=739246080 2409pio_latency=100000 2410pio_size=4095 2411power_model=Null 2412ret_bad_addr=false 2413ret_data16=65535 2414ret_data32=4294967295 2415ret_data64=18446744073709551615 2416ret_data8=255 2417system=system 2418update_data=false 2419warn_access= 2420pio=system.iobus.master[12] 2421 2422[system.realview.lan_fake] 2423type=IsaFake 2424clk_domain=system.clk_domain 2425default_p_state=UNDEFINED 2426eventq_index=0 2427fake_mem=false 2428p_state_clk_gate_bins=20 2429p_state_clk_gate_max=1000000000000 2430p_state_clk_gate_min=1000 2431pio_addr=436207616 2432pio_latency=100000 2433pio_size=65535 2434power_model=Null 2435ret_bad_addr=false 2436ret_data16=65535 2437ret_data32=4294967295 2438ret_data64=18446744073709551615 2439ret_data8=255 2440system=system 2441update_data=false 2442warn_access= 2443pio=system.iobus.master[19] 2444 2445[system.realview.local_cpu_timer] 2446type=CpuLocalTimer 2447clk_domain=system.clk_domain 2448default_p_state=UNDEFINED 2449eventq_index=0 2450gic=system.realview.gic 2451int_num_timer=29 2452int_num_watchdog=30 2453p_state_clk_gate_bins=20 2454p_state_clk_gate_max=1000000000000 2455p_state_clk_gate_min=1000 2456pio_addr=738721792 2457pio_latency=100000 2458power_model=Null 2459system=system 2460pio=system.membus.master[4] 2461 2462[system.realview.mcc] 2463type=SubSystem 2464children=osc_clcd osc_mcc osc_peripheral osc_system_bus temp_crtl 2465eventq_index=0 2466thermal_domain=Null 2467 2468[system.realview.mcc.osc_clcd] 2469type=RealViewOsc 2470dcc=0 2471device=1 2472eventq_index=0 2473freq=42105 2474parent=system.realview.realview_io 2475position=0 2476site=0 2477voltage_domain=system.voltage_domain 2478 2479[system.realview.mcc.osc_mcc] 2480type=RealViewOsc 2481dcc=0 2482device=0 2483eventq_index=0 2484freq=20000 2485parent=system.realview.realview_io 2486position=0 2487site=0 2488voltage_domain=system.voltage_domain 2489 2490[system.realview.mcc.osc_peripheral] 2491type=RealViewOsc 2492dcc=0 2493device=2 2494eventq_index=0 2495freq=41667 2496parent=system.realview.realview_io 2497position=0 2498site=0 2499voltage_domain=system.voltage_domain 2500 2501[system.realview.mcc.osc_system_bus] 2502type=RealViewOsc 2503dcc=0 2504device=4 2505eventq_index=0 2506freq=41667 2507parent=system.realview.realview_io 2508position=0 2509site=0 2510voltage_domain=system.voltage_domain 2511 2512[system.realview.mcc.temp_crtl] 2513type=RealViewTemperatureSensor 2514dcc=0 2515device=0 2516eventq_index=0 2517parent=system.realview.realview_io 2518position=0 2519site=0 2520system=system 2521 2522[system.realview.mmc_fake] 2523type=AmbaFake 2524amba_id=0 2525clk_domain=system.clk_domain 2526default_p_state=UNDEFINED 2527eventq_index=0 2528ignore_access=false 2529p_state_clk_gate_bins=20 2530p_state_clk_gate_max=1000000000000 2531p_state_clk_gate_min=1000 2532pio_addr=470089728 2533pio_latency=100000 2534power_model=Null 2535system=system 2536pio=system.iobus.master[21] 2537 2538[system.realview.nvmem] 2539type=SimpleMemory 2540bandwidth=73.000000 2541clk_domain=system.clk_domain 2542conf_table_reported=false 2543default_p_state=UNDEFINED 2544eventq_index=0 2545in_addr_map=true 2546kvm_map=true 2547latency=30000 2548latency_var=0 2549null=false 2550p_state_clk_gate_bins=20 2551p_state_clk_gate_max=1000000000000 2552p_state_clk_gate_min=1000 2553power_model=Null 2554range=0:67108863:0:0:0:0 2555port=system.membus.master[1] 2556 2557[system.realview.pci_host] 2558type=GenericPciHost 2559clk_domain=system.clk_domain 2560conf_base=805306368 2561conf_device_bits=16 2562conf_size=268435456 2563default_p_state=UNDEFINED 2564eventq_index=0 2565p_state_clk_gate_bins=20 2566p_state_clk_gate_max=1000000000000 2567p_state_clk_gate_min=1000 2568pci_dma_base=0 2569pci_mem_base=0 2570pci_pio_base=0 2571platform=system.realview 2572power_model=Null 2573system=system 2574pio=system.iobus.master[2] 2575 2576[system.realview.realview_io] 2577type=RealViewCtrl 2578clk_domain=system.clk_domain 2579default_p_state=UNDEFINED 2580eventq_index=0 2581idreg=35979264 2582p_state_clk_gate_bins=20 2583p_state_clk_gate_max=1000000000000 2584p_state_clk_gate_min=1000 2585pio_addr=469827584 2586pio_latency=100000 2587power_model=Null 2588proc_id0=335544320 2589proc_id1=335544320 2590system=system 2591pio=system.iobus.master[1] 2592 2593[system.realview.rtc] 2594type=PL031 2595amba_id=3412017 2596clk_domain=system.clk_domain 2597default_p_state=UNDEFINED 2598eventq_index=0 2599gic=system.realview.gic 2600int_delay=100000 2601int_num=36 2602p_state_clk_gate_bins=20 2603p_state_clk_gate_max=1000000000000 2604p_state_clk_gate_min=1000 2605pio_addr=471269376 2606pio_latency=100000 2607power_model=Null 2608system=system 2609time=Thu Jan 1 00:00:00 2009 2610pio=system.iobus.master[10] 2611 2612[system.realview.sp810_fake] 2613type=AmbaFake 2614amba_id=0 2615clk_domain=system.clk_domain 2616default_p_state=UNDEFINED 2617eventq_index=0 2618ignore_access=true 2619p_state_clk_gate_bins=20 2620p_state_clk_gate_max=1000000000000 2621p_state_clk_gate_min=1000 2622pio_addr=469893120 2623pio_latency=100000 2624power_model=Null 2625system=system 2626pio=system.iobus.master[16] 2627 2628[system.realview.timer0] 2629type=Sp804 2630amba_id=1316868 2631clk_domain=system.clk_domain 2632clock0=1000000 2633clock1=1000000 2634default_p_state=UNDEFINED 2635eventq_index=0 2636gic=system.realview.gic 2637int_num0=34 2638int_num1=34 2639p_state_clk_gate_bins=20 2640p_state_clk_gate_max=1000000000000 2641p_state_clk_gate_min=1000 2642pio_addr=470876160 2643pio_latency=100000 2644power_model=Null 2645system=system 2646pio=system.iobus.master[3] 2647 2648[system.realview.timer1] 2649type=Sp804 2650amba_id=1316868 2651clk_domain=system.clk_domain 2652clock0=1000000 2653clock1=1000000 2654default_p_state=UNDEFINED 2655eventq_index=0 2656gic=system.realview.gic 2657int_num0=35 2658int_num1=35 2659p_state_clk_gate_bins=20 2660p_state_clk_gate_max=1000000000000 2661p_state_clk_gate_min=1000 2662pio_addr=470941696 2663pio_latency=100000 2664power_model=Null 2665system=system 2666pio=system.iobus.master[4] 2667 2668[system.realview.uart] 2669type=Pl011 2670clk_domain=system.clk_domain 2671default_p_state=UNDEFINED 2672end_on_eot=false 2673eventq_index=0 2674gic=system.realview.gic 2675int_delay=100000 2676int_num=37 2677p_state_clk_gate_bins=20 2678p_state_clk_gate_max=1000000000000 2679p_state_clk_gate_min=1000 2680pio_addr=470351872 2681pio_latency=100000 2682platform=system.realview 2683power_model=Null 2684system=system 2685terminal=system.terminal 2686pio=system.iobus.master[0] 2687 2688[system.realview.uart1_fake] 2689type=AmbaFake 2690amba_id=0 2691clk_domain=system.clk_domain 2692default_p_state=UNDEFINED 2693eventq_index=0 2694ignore_access=false 2695p_state_clk_gate_bins=20 2696p_state_clk_gate_max=1000000000000 2697p_state_clk_gate_min=1000 2698pio_addr=470417408 2699pio_latency=100000 2700power_model=Null 2701system=system 2702pio=system.iobus.master[13] 2703 2704[system.realview.uart2_fake] 2705type=AmbaFake 2706amba_id=0 2707clk_domain=system.clk_domain 2708default_p_state=UNDEFINED 2709eventq_index=0 2710ignore_access=false 2711p_state_clk_gate_bins=20 2712p_state_clk_gate_max=1000000000000 2713p_state_clk_gate_min=1000 2714pio_addr=470482944 2715pio_latency=100000 2716power_model=Null 2717system=system 2718pio=system.iobus.master[14] 2719 2720[system.realview.uart3_fake] 2721type=AmbaFake 2722amba_id=0 2723clk_domain=system.clk_domain 2724default_p_state=UNDEFINED 2725eventq_index=0 2726ignore_access=false 2727p_state_clk_gate_bins=20 2728p_state_clk_gate_max=1000000000000 2729p_state_clk_gate_min=1000 2730pio_addr=470548480 2731pio_latency=100000 2732power_model=Null 2733system=system 2734pio=system.iobus.master[15] 2735 2736[system.realview.usb_fake] 2737type=IsaFake 2738clk_domain=system.clk_domain 2739default_p_state=UNDEFINED 2740eventq_index=0 2741fake_mem=false 2742p_state_clk_gate_bins=20 2743p_state_clk_gate_max=1000000000000 2744p_state_clk_gate_min=1000 2745pio_addr=452984832 2746pio_latency=100000 2747pio_size=131071 2748power_model=Null 2749ret_bad_addr=false 2750ret_data16=65535 2751ret_data32=4294967295 2752ret_data64=18446744073709551615 2753ret_data8=255 2754system=system 2755update_data=false 2756warn_access= 2757pio=system.iobus.master[20] 2758 2759[system.realview.vgic] 2760type=VGic 2761clk_domain=system.clk_domain 2762default_p_state=UNDEFINED 2763eventq_index=0 2764gic=system.realview.gic 2765hv_addr=738213888 2766p_state_clk_gate_bins=20 2767p_state_clk_gate_max=1000000000000 2768p_state_clk_gate_min=1000 2769pio_delay=10000 2770platform=system.realview 2771power_model=Null 2772ppint=25 2773system=system 2774vcpu_addr=738222080 2775pio=system.membus.master[3] 2776 2777[system.realview.vram] 2778type=SimpleMemory 2779bandwidth=73.000000 2780clk_domain=system.clk_domain 2781conf_table_reported=false 2782default_p_state=UNDEFINED 2783eventq_index=0 2784in_addr_map=true 2785kvm_map=true 2786latency=30000 2787latency_var=0 2788null=false 2789p_state_clk_gate_bins=20 2790p_state_clk_gate_max=1000000000000 2791p_state_clk_gate_min=1000 2792power_model=Null 2793range=402653184:436207615:0:0:0:0 2794port=system.iobus.master[11] 2795 2796[system.realview.watchdog_fake] 2797type=AmbaFake 2798amba_id=0 2799clk_domain=system.clk_domain 2800default_p_state=UNDEFINED 2801eventq_index=0 2802ignore_access=false 2803p_state_clk_gate_bins=20 2804p_state_clk_gate_max=1000000000000 2805p_state_clk_gate_min=1000 2806pio_addr=470745088 2807pio_latency=100000 2808power_model=Null 2809system=system 2810pio=system.iobus.master[17] 2811 2812[system.terminal] 2813type=Terminal 2814eventq_index=0 2815intr_control=system.intrctrl 2816number=0 2817output=true 2818port=3456 2819 2820[system.toL2Bus] 2821type=CoherentXBar 2822children=snoop_filter 2823clk_domain=system.cpu_clk_domain 2824default_p_state=UNDEFINED 2825eventq_index=0 2826forward_latency=0 2827frontend_latency=1 2828p_state_clk_gate_bins=20 2829p_state_clk_gate_max=1000000000000 2830p_state_clk_gate_min=1000 2831point_of_coherency=false 2832power_model=Null 2833response_latency=1 2834snoop_filter=system.toL2Bus.snoop_filter 2835snoop_response_latency=1 2836system=system 2837use_default_range=false 2838width=32 2839master=system.l2c.cpu_side 2840slave=system.cpu0.l2cache.mem_side system.cpu1.l2cache.mem_side 2841 2842[system.toL2Bus.snoop_filter] 2843type=SnoopFilter 2844eventq_index=0 2845lookup_latency=0 2846max_capacity=8388608 2847system=system 2848 2849[system.vncserver] 2850type=VncServer 2851eventq_index=0 2852frame_capture=false 2853number=0 2854port=5900 2855 2856[system.voltage_domain] 2857type=VoltageDomain 2858eventq_index=0 2859voltage=1.000000 2860 2861