config.ini revision 11281:953f7d1cc9e3
1[root] 2type=Root 3children=system 4eventq_index=0 5full_system=true 6sim_quantum=0 7time_sync_enable=false 8time_sync_period=100000000000 9time_sync_spin_threshold=100000000 10 11[system] 12type=LinuxArmSystem 13children=bridge cf0 clk_domain cpu0 cpu1 cpu_clk_domain dvfs_handler intrctrl iobus iocache l2c membus physmem realview terminal toL2Bus vncserver voltage_domain 14atags_addr=134217728 15boot_loader=/dist/m5/system/binaries/boot_emm.arm 16boot_osflags=earlyprintk=pl011,0x1c090000 console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=256MB root=/dev/sda1 17cache_line_size=64 18clk_domain=system.clk_domain 19dtb_filename=/dist/m5/system/binaries/vexpress.aarch32.ll_20131205.0-gem5.2cpu.dtb 20early_kernel_symbols=false 21enable_context_switch_stats_dump=false 22eventq_index=0 23exit_on_work_items=false 24flags_addr=469827632 25gic_cpu_addr=738205696 26have_large_asid_64=false 27have_lpae=false 28have_security=false 29have_virtualization=false 30highest_el_is_64=false 31init_param=0 32kernel=/dist/m5/system/binaries/vmlinux.aarch32.ll_20131205.0-gem5 33kernel_addr_check=true 34load_addr_mask=268435455 35load_offset=2147483648 36machine_type=VExpress_EMM 37mem_mode=timing 38mem_ranges=2147483648:2415919103 39memories=system.physmem system.realview.nvmem system.realview.vram 40mmap_using_noreserve=false 41multi_proc=true 42multi_thread=false 43num_work_ids=16 44panic_on_oops=true 45panic_on_panic=true 46phys_addr_range_64=40 47readfile=/z/stever/hg/gem5/tests/halt.sh 48reset_addr_64=0 49symbolfile= 50work_begin_ckpt_count=0 51work_begin_cpu_id_exit=-1 52work_begin_exit_count=0 53work_cpus_ckpt_count=0 54work_end_ckpt_count=0 55work_end_exit_count=0 56work_item_id=-1 57system_port=system.membus.slave[1] 58 59[system.bridge] 60type=Bridge 61clk_domain=system.clk_domain 62delay=50000 63eventq_index=0 64ranges=788529152:805306367 721420288:725614591 805306368:1073741823 1073741824:1610612735 402653184:469762047 469762048:536870911 65req_size=16 66resp_size=16 67master=system.iobus.slave[0] 68slave=system.membus.master[0] 69 70[system.cf0] 71type=IdeDisk 72children=image 73delay=1000000 74driveID=master 75eventq_index=0 76image=system.cf0.image 77 78[system.cf0.image] 79type=CowDiskImage 80children=child 81child=system.cf0.image.child 82eventq_index=0 83image_file= 84read_only=false 85table_size=65536 86 87[system.cf0.image.child] 88type=RawDiskImage 89eventq_index=0 90image_file=/dist/m5/system/disks/linux-aarch32-ael.img 91read_only=true 92 93[system.clk_domain] 94type=SrcClockDomain 95clock=1000 96domain_id=-1 97eventq_index=0 98init_perf_level=0 99voltage_domain=system.voltage_domain 100 101[system.cpu0] 102type=DerivO3CPU 103children=branchPred dcache dstage2_mmu dtb fuPool icache interrupts isa istage2_mmu itb l2cache toL2Bus tracer 104LFSTSize=1024 105LQEntries=16 106LSQCheckLoads=true 107LSQDepCheckShift=0 108SQEntries=16 109SSITSize=1024 110activity=0 111backComSize=5 112branchPred=system.cpu0.branchPred 113cachePorts=200 114checker=Null 115clk_domain=system.cpu_clk_domain 116commitToDecodeDelay=1 117commitToFetchDelay=1 118commitToIEWDelay=1 119commitToRenameDelay=1 120commitWidth=8 121cpu_id=0 122decodeToFetchDelay=1 123decodeToRenameDelay=2 124decodeWidth=3 125dispatchWidth=6 126do_checkpoint_insts=true 127do_quiesce=true 128do_statistics_insts=true 129dstage2_mmu=system.cpu0.dstage2_mmu 130dtb=system.cpu0.dtb 131eventq_index=0 132fetchBufferSize=16 133fetchQueueSize=32 134fetchToDecodeDelay=3 135fetchTrapLatency=1 136fetchWidth=3 137forwardComSize=5 138fuPool=system.cpu0.fuPool 139function_trace=false 140function_trace_start=0 141iewToCommitDelay=1 142iewToDecodeDelay=1 143iewToFetchDelay=1 144iewToRenameDelay=1 145interrupts=system.cpu0.interrupts 146isa=system.cpu0.isa 147issueToExecuteDelay=1 148issueWidth=8 149istage2_mmu=system.cpu0.istage2_mmu 150itb=system.cpu0.itb 151max_insts_all_threads=0 152max_insts_any_thread=0 153max_loads_all_threads=0 154max_loads_any_thread=0 155needsTSO=false 156numIQEntries=32 157numPhysCCRegs=640 158numPhysFloatRegs=192 159numPhysIntRegs=128 160numROBEntries=40 161numRobs=1 162numThreads=1 163profile=0 164progress_interval=0 165renameToDecodeDelay=1 166renameToFetchDelay=1 167renameToIEWDelay=1 168renameToROBDelay=1 169renameWidth=3 170simpoint_start_insts= 171smtCommitPolicy=RoundRobin 172smtFetchPolicy=SingleThread 173smtIQPolicy=Partitioned 174smtIQThreshold=100 175smtLSQPolicy=Partitioned 176smtLSQThreshold=100 177smtNumFetchingThreads=1 178smtROBPolicy=Partitioned 179smtROBThreshold=100 180socket_id=0 181squashWidth=8 182store_set_clear_period=250000 183switched_out=false 184system=system 185tracer=system.cpu0.tracer 186trapLatency=13 187wbWidth=8 188workload= 189dcache_port=system.cpu0.dcache.cpu_side 190icache_port=system.cpu0.icache.cpu_side 191 192[system.cpu0.branchPred] 193type=BiModeBP 194BTBEntries=2048 195BTBTagSize=18 196RASSize=16 197choiceCtrBits=2 198choicePredictorSize=8192 199eventq_index=0 200globalCtrBits=2 201globalPredictorSize=8192 202instShiftAmt=2 203numThreads=1 204 205[system.cpu0.dcache] 206type=Cache 207children=tags 208addr_ranges=0:18446744073709551615 209assoc=2 210clk_domain=system.cpu_clk_domain 211clusivity=mostly_incl 212demand_mshr_reserve=1 213eventq_index=0 214forward_snoops=true 215hit_latency=2 216is_read_only=false 217max_miss_count=0 218mshrs=6 219prefetch_on_access=false 220prefetcher=Null 221response_latency=2 222sequential_access=false 223size=32768 224system=system 225tags=system.cpu0.dcache.tags 226tgts_per_mshr=8 227write_buffers=16 228writeback_clean=true 229cpu_side=system.cpu0.dcache_port 230mem_side=system.cpu0.toL2Bus.slave[1] 231 232[system.cpu0.dcache.tags] 233type=LRU 234assoc=2 235block_size=64 236clk_domain=system.cpu_clk_domain 237eventq_index=0 238hit_latency=2 239sequential_access=false 240size=32768 241 242[system.cpu0.dstage2_mmu] 243type=ArmStage2MMU 244children=stage2_tlb 245eventq_index=0 246stage2_tlb=system.cpu0.dstage2_mmu.stage2_tlb 247sys=system 248tlb=system.cpu0.dtb 249 250[system.cpu0.dstage2_mmu.stage2_tlb] 251type=ArmTLB 252children=walker 253eventq_index=0 254is_stage2=true 255size=32 256walker=system.cpu0.dstage2_mmu.stage2_tlb.walker 257 258[system.cpu0.dstage2_mmu.stage2_tlb.walker] 259type=ArmTableWalker 260clk_domain=system.cpu_clk_domain 261eventq_index=0 262is_stage2=true 263num_squash_per_cycle=2 264sys=system 265 266[system.cpu0.dtb] 267type=ArmTLB 268children=walker 269eventq_index=0 270is_stage2=false 271size=64 272walker=system.cpu0.dtb.walker 273 274[system.cpu0.dtb.walker] 275type=ArmTableWalker 276clk_domain=system.cpu_clk_domain 277eventq_index=0 278is_stage2=false 279num_squash_per_cycle=2 280sys=system 281port=system.cpu0.toL2Bus.slave[3] 282 283[system.cpu0.fuPool] 284type=FUPool 285children=FUList0 FUList1 FUList2 FUList3 FUList4 286FUList=system.cpu0.fuPool.FUList0 system.cpu0.fuPool.FUList1 system.cpu0.fuPool.FUList2 system.cpu0.fuPool.FUList3 system.cpu0.fuPool.FUList4 287eventq_index=0 288 289[system.cpu0.fuPool.FUList0] 290type=FUDesc 291children=opList 292count=2 293eventq_index=0 294opList=system.cpu0.fuPool.FUList0.opList 295 296[system.cpu0.fuPool.FUList0.opList] 297type=OpDesc 298eventq_index=0 299opClass=IntAlu 300opLat=1 301pipelined=true 302 303[system.cpu0.fuPool.FUList1] 304type=FUDesc 305children=opList0 opList1 opList2 306count=1 307eventq_index=0 308opList=system.cpu0.fuPool.FUList1.opList0 system.cpu0.fuPool.FUList1.opList1 system.cpu0.fuPool.FUList1.opList2 309 310[system.cpu0.fuPool.FUList1.opList0] 311type=OpDesc 312eventq_index=0 313opClass=IntMult 314opLat=3 315pipelined=true 316 317[system.cpu0.fuPool.FUList1.opList1] 318type=OpDesc 319eventq_index=0 320opClass=IntDiv 321opLat=12 322pipelined=false 323 324[system.cpu0.fuPool.FUList1.opList2] 325type=OpDesc 326eventq_index=0 327opClass=IprAccess 328opLat=3 329pipelined=true 330 331[system.cpu0.fuPool.FUList2] 332type=FUDesc 333children=opList 334count=1 335eventq_index=0 336opList=system.cpu0.fuPool.FUList2.opList 337 338[system.cpu0.fuPool.FUList2.opList] 339type=OpDesc 340eventq_index=0 341opClass=MemRead 342opLat=2 343pipelined=true 344 345[system.cpu0.fuPool.FUList3] 346type=FUDesc 347children=opList 348count=1 349eventq_index=0 350opList=system.cpu0.fuPool.FUList3.opList 351 352[system.cpu0.fuPool.FUList3.opList] 353type=OpDesc 354eventq_index=0 355opClass=MemWrite 356opLat=2 357pipelined=true 358 359[system.cpu0.fuPool.FUList4] 360type=FUDesc 361children=opList00 opList01 opList02 opList03 opList04 opList05 opList06 opList07 opList08 opList09 opList10 opList11 opList12 opList13 opList14 opList15 opList16 opList17 opList18 opList19 opList20 opList21 opList22 opList23 opList24 opList25 362count=2 363eventq_index=0 364opList=system.cpu0.fuPool.FUList4.opList00 system.cpu0.fuPool.FUList4.opList01 system.cpu0.fuPool.FUList4.opList02 system.cpu0.fuPool.FUList4.opList03 system.cpu0.fuPool.FUList4.opList04 system.cpu0.fuPool.FUList4.opList05 system.cpu0.fuPool.FUList4.opList06 system.cpu0.fuPool.FUList4.opList07 system.cpu0.fuPool.FUList4.opList08 system.cpu0.fuPool.FUList4.opList09 system.cpu0.fuPool.FUList4.opList10 system.cpu0.fuPool.FUList4.opList11 system.cpu0.fuPool.FUList4.opList12 system.cpu0.fuPool.FUList4.opList13 system.cpu0.fuPool.FUList4.opList14 system.cpu0.fuPool.FUList4.opList15 system.cpu0.fuPool.FUList4.opList16 system.cpu0.fuPool.FUList4.opList17 system.cpu0.fuPool.FUList4.opList18 system.cpu0.fuPool.FUList4.opList19 system.cpu0.fuPool.FUList4.opList20 system.cpu0.fuPool.FUList4.opList21 system.cpu0.fuPool.FUList4.opList22 system.cpu0.fuPool.FUList4.opList23 system.cpu0.fuPool.FUList4.opList24 system.cpu0.fuPool.FUList4.opList25 365 366[system.cpu0.fuPool.FUList4.opList00] 367type=OpDesc 368eventq_index=0 369opClass=SimdAdd 370opLat=4 371pipelined=true 372 373[system.cpu0.fuPool.FUList4.opList01] 374type=OpDesc 375eventq_index=0 376opClass=SimdAddAcc 377opLat=4 378pipelined=true 379 380[system.cpu0.fuPool.FUList4.opList02] 381type=OpDesc 382eventq_index=0 383opClass=SimdAlu 384opLat=4 385pipelined=true 386 387[system.cpu0.fuPool.FUList4.opList03] 388type=OpDesc 389eventq_index=0 390opClass=SimdCmp 391opLat=4 392pipelined=true 393 394[system.cpu0.fuPool.FUList4.opList04] 395type=OpDesc 396eventq_index=0 397opClass=SimdCvt 398opLat=3 399pipelined=true 400 401[system.cpu0.fuPool.FUList4.opList05] 402type=OpDesc 403eventq_index=0 404opClass=SimdMisc 405opLat=3 406pipelined=true 407 408[system.cpu0.fuPool.FUList4.opList06] 409type=OpDesc 410eventq_index=0 411opClass=SimdMult 412opLat=5 413pipelined=true 414 415[system.cpu0.fuPool.FUList4.opList07] 416type=OpDesc 417eventq_index=0 418opClass=SimdMultAcc 419opLat=5 420pipelined=true 421 422[system.cpu0.fuPool.FUList4.opList08] 423type=OpDesc 424eventq_index=0 425opClass=SimdShift 426opLat=3 427pipelined=true 428 429[system.cpu0.fuPool.FUList4.opList09] 430type=OpDesc 431eventq_index=0 432opClass=SimdShiftAcc 433opLat=3 434pipelined=true 435 436[system.cpu0.fuPool.FUList4.opList10] 437type=OpDesc 438eventq_index=0 439opClass=SimdSqrt 440opLat=9 441pipelined=true 442 443[system.cpu0.fuPool.FUList4.opList11] 444type=OpDesc 445eventq_index=0 446opClass=SimdFloatAdd 447opLat=5 448pipelined=true 449 450[system.cpu0.fuPool.FUList4.opList12] 451type=OpDesc 452eventq_index=0 453opClass=SimdFloatAlu 454opLat=5 455pipelined=true 456 457[system.cpu0.fuPool.FUList4.opList13] 458type=OpDesc 459eventq_index=0 460opClass=SimdFloatCmp 461opLat=3 462pipelined=true 463 464[system.cpu0.fuPool.FUList4.opList14] 465type=OpDesc 466eventq_index=0 467opClass=SimdFloatCvt 468opLat=3 469pipelined=true 470 471[system.cpu0.fuPool.FUList4.opList15] 472type=OpDesc 473eventq_index=0 474opClass=SimdFloatDiv 475opLat=3 476pipelined=true 477 478[system.cpu0.fuPool.FUList4.opList16] 479type=OpDesc 480eventq_index=0 481opClass=SimdFloatMisc 482opLat=3 483pipelined=true 484 485[system.cpu0.fuPool.FUList4.opList17] 486type=OpDesc 487eventq_index=0 488opClass=SimdFloatMult 489opLat=3 490pipelined=true 491 492[system.cpu0.fuPool.FUList4.opList18] 493type=OpDesc 494eventq_index=0 495opClass=SimdFloatMultAcc 496opLat=1 497pipelined=true 498 499[system.cpu0.fuPool.FUList4.opList19] 500type=OpDesc 501eventq_index=0 502opClass=SimdFloatSqrt 503opLat=9 504pipelined=true 505 506[system.cpu0.fuPool.FUList4.opList20] 507type=OpDesc 508eventq_index=0 509opClass=FloatAdd 510opLat=5 511pipelined=true 512 513[system.cpu0.fuPool.FUList4.opList21] 514type=OpDesc 515eventq_index=0 516opClass=FloatCmp 517opLat=5 518pipelined=true 519 520[system.cpu0.fuPool.FUList4.opList22] 521type=OpDesc 522eventq_index=0 523opClass=FloatCvt 524opLat=5 525pipelined=true 526 527[system.cpu0.fuPool.FUList4.opList23] 528type=OpDesc 529eventq_index=0 530opClass=FloatDiv 531opLat=9 532pipelined=false 533 534[system.cpu0.fuPool.FUList4.opList24] 535type=OpDesc 536eventq_index=0 537opClass=FloatSqrt 538opLat=33 539pipelined=false 540 541[system.cpu0.fuPool.FUList4.opList25] 542type=OpDesc 543eventq_index=0 544opClass=FloatMult 545opLat=4 546pipelined=true 547 548[system.cpu0.icache] 549type=Cache 550children=tags 551addr_ranges=0:18446744073709551615 552assoc=2 553clk_domain=system.cpu_clk_domain 554clusivity=mostly_incl 555demand_mshr_reserve=1 556eventq_index=0 557forward_snoops=false 558hit_latency=1 559is_read_only=true 560max_miss_count=0 561mshrs=2 562prefetch_on_access=false 563prefetcher=Null 564response_latency=1 565sequential_access=false 566size=32768 567system=system 568tags=system.cpu0.icache.tags 569tgts_per_mshr=8 570write_buffers=8 571writeback_clean=true 572cpu_side=system.cpu0.icache_port 573mem_side=system.cpu0.toL2Bus.slave[0] 574 575[system.cpu0.icache.tags] 576type=LRU 577assoc=2 578block_size=64 579clk_domain=system.cpu_clk_domain 580eventq_index=0 581hit_latency=1 582sequential_access=false 583size=32768 584 585[system.cpu0.interrupts] 586type=ArmInterrupts 587eventq_index=0 588 589[system.cpu0.isa] 590type=ArmISA 591decoderFlavour=Generic 592eventq_index=0 593fpsid=1090793632 594id_aa64afr0_el1=0 595id_aa64afr1_el1=0 596id_aa64dfr0_el1=1052678 597id_aa64dfr1_el1=0 598id_aa64isar0_el1=0 599id_aa64isar1_el1=0 600id_aa64mmfr0_el1=15728642 601id_aa64mmfr1_el1=0 602id_aa64pfr0_el1=17 603id_aa64pfr1_el1=0 604id_isar0=34607377 605id_isar1=34677009 606id_isar2=555950401 607id_isar3=17899825 608id_isar4=268501314 609id_isar5=0 610id_mmfr0=270536963 611id_mmfr1=0 612id_mmfr2=19070976 613id_mmfr3=34611729 614id_pfr0=49 615id_pfr1=4113 616midr=1091551472 617pmu=Null 618system=system 619 620[system.cpu0.istage2_mmu] 621type=ArmStage2MMU 622children=stage2_tlb 623eventq_index=0 624stage2_tlb=system.cpu0.istage2_mmu.stage2_tlb 625sys=system 626tlb=system.cpu0.itb 627 628[system.cpu0.istage2_mmu.stage2_tlb] 629type=ArmTLB 630children=walker 631eventq_index=0 632is_stage2=true 633size=32 634walker=system.cpu0.istage2_mmu.stage2_tlb.walker 635 636[system.cpu0.istage2_mmu.stage2_tlb.walker] 637type=ArmTableWalker 638clk_domain=system.cpu_clk_domain 639eventq_index=0 640is_stage2=true 641num_squash_per_cycle=2 642sys=system 643 644[system.cpu0.itb] 645type=ArmTLB 646children=walker 647eventq_index=0 648is_stage2=false 649size=64 650walker=system.cpu0.itb.walker 651 652[system.cpu0.itb.walker] 653type=ArmTableWalker 654clk_domain=system.cpu_clk_domain 655eventq_index=0 656is_stage2=false 657num_squash_per_cycle=2 658sys=system 659port=system.cpu0.toL2Bus.slave[2] 660 661[system.cpu0.l2cache] 662type=Cache 663children=prefetcher tags 664addr_ranges=0:18446744073709551615 665assoc=16 666clk_domain=system.cpu_clk_domain 667clusivity=mostly_excl 668demand_mshr_reserve=1 669eventq_index=0 670forward_snoops=true 671hit_latency=12 672is_read_only=false 673max_miss_count=0 674mshrs=16 675prefetch_on_access=true 676prefetcher=system.cpu0.l2cache.prefetcher 677response_latency=12 678sequential_access=false 679size=1048576 680system=system 681tags=system.cpu0.l2cache.tags 682tgts_per_mshr=8 683write_buffers=8 684writeback_clean=false 685cpu_side=system.cpu0.toL2Bus.master[0] 686mem_side=system.toL2Bus.slave[0] 687 688[system.cpu0.l2cache.prefetcher] 689type=StridePrefetcher 690cache_snoop=false 691clk_domain=system.cpu_clk_domain 692degree=8 693eventq_index=0 694latency=1 695max_conf=7 696min_conf=0 697on_data=true 698on_inst=true 699on_miss=false 700on_read=true 701on_write=true 702queue_filter=true 703queue_size=32 704queue_squash=true 705start_conf=4 706sys=system 707table_assoc=4 708table_sets=16 709tag_prefetch=true 710thresh_conf=4 711use_master_id=true 712 713[system.cpu0.l2cache.tags] 714type=RandomRepl 715assoc=16 716block_size=64 717clk_domain=system.cpu_clk_domain 718eventq_index=0 719hit_latency=12 720sequential_access=false 721size=1048576 722 723[system.cpu0.toL2Bus] 724type=CoherentXBar 725children=snoop_filter 726clk_domain=system.cpu_clk_domain 727eventq_index=0 728forward_latency=0 729frontend_latency=1 730response_latency=1 731snoop_filter=system.cpu0.toL2Bus.snoop_filter 732snoop_response_latency=1 733system=system 734use_default_range=false 735width=32 736master=system.cpu0.l2cache.cpu_side 737slave=system.cpu0.icache.mem_side system.cpu0.dcache.mem_side system.cpu0.itb.walker.port system.cpu0.dtb.walker.port 738 739[system.cpu0.toL2Bus.snoop_filter] 740type=SnoopFilter 741eventq_index=0 742lookup_latency=0 743max_capacity=8388608 744system=system 745 746[system.cpu0.tracer] 747type=ExeTracer 748eventq_index=0 749 750[system.cpu1] 751type=DerivO3CPU 752children=branchPred dcache dstage2_mmu dtb fuPool icache interrupts isa istage2_mmu itb l2cache toL2Bus tracer 753LFSTSize=1024 754LQEntries=16 755LSQCheckLoads=true 756LSQDepCheckShift=0 757SQEntries=16 758SSITSize=1024 759activity=0 760backComSize=5 761branchPred=system.cpu1.branchPred 762cachePorts=200 763checker=Null 764clk_domain=system.cpu_clk_domain 765commitToDecodeDelay=1 766commitToFetchDelay=1 767commitToIEWDelay=1 768commitToRenameDelay=1 769commitWidth=8 770cpu_id=1 771decodeToFetchDelay=1 772decodeToRenameDelay=2 773decodeWidth=3 774dispatchWidth=6 775do_checkpoint_insts=true 776do_quiesce=true 777do_statistics_insts=true 778dstage2_mmu=system.cpu1.dstage2_mmu 779dtb=system.cpu1.dtb 780eventq_index=0 781fetchBufferSize=16 782fetchQueueSize=32 783fetchToDecodeDelay=3 784fetchTrapLatency=1 785fetchWidth=3 786forwardComSize=5 787fuPool=system.cpu1.fuPool 788function_trace=false 789function_trace_start=0 790iewToCommitDelay=1 791iewToDecodeDelay=1 792iewToFetchDelay=1 793iewToRenameDelay=1 794interrupts=system.cpu1.interrupts 795isa=system.cpu1.isa 796issueToExecuteDelay=1 797issueWidth=8 798istage2_mmu=system.cpu1.istage2_mmu 799itb=system.cpu1.itb 800max_insts_all_threads=0 801max_insts_any_thread=0 802max_loads_all_threads=0 803max_loads_any_thread=0 804needsTSO=false 805numIQEntries=32 806numPhysCCRegs=640 807numPhysFloatRegs=192 808numPhysIntRegs=128 809numROBEntries=40 810numRobs=1 811numThreads=1 812profile=0 813progress_interval=0 814renameToDecodeDelay=1 815renameToFetchDelay=1 816renameToIEWDelay=1 817renameToROBDelay=1 818renameWidth=3 819simpoint_start_insts= 820smtCommitPolicy=RoundRobin 821smtFetchPolicy=SingleThread 822smtIQPolicy=Partitioned 823smtIQThreshold=100 824smtLSQPolicy=Partitioned 825smtLSQThreshold=100 826smtNumFetchingThreads=1 827smtROBPolicy=Partitioned 828smtROBThreshold=100 829socket_id=0 830squashWidth=8 831store_set_clear_period=250000 832switched_out=false 833system=system 834tracer=system.cpu1.tracer 835trapLatency=13 836wbWidth=8 837workload= 838dcache_port=system.cpu1.dcache.cpu_side 839icache_port=system.cpu1.icache.cpu_side 840 841[system.cpu1.branchPred] 842type=BiModeBP 843BTBEntries=2048 844BTBTagSize=18 845RASSize=16 846choiceCtrBits=2 847choicePredictorSize=8192 848eventq_index=0 849globalCtrBits=2 850globalPredictorSize=8192 851instShiftAmt=2 852numThreads=1 853 854[system.cpu1.dcache] 855type=Cache 856children=tags 857addr_ranges=0:18446744073709551615 858assoc=2 859clk_domain=system.cpu_clk_domain 860clusivity=mostly_incl 861demand_mshr_reserve=1 862eventq_index=0 863forward_snoops=true 864hit_latency=2 865is_read_only=false 866max_miss_count=0 867mshrs=6 868prefetch_on_access=false 869prefetcher=Null 870response_latency=2 871sequential_access=false 872size=32768 873system=system 874tags=system.cpu1.dcache.tags 875tgts_per_mshr=8 876write_buffers=16 877writeback_clean=true 878cpu_side=system.cpu1.dcache_port 879mem_side=system.cpu1.toL2Bus.slave[1] 880 881[system.cpu1.dcache.tags] 882type=LRU 883assoc=2 884block_size=64 885clk_domain=system.cpu_clk_domain 886eventq_index=0 887hit_latency=2 888sequential_access=false 889size=32768 890 891[system.cpu1.dstage2_mmu] 892type=ArmStage2MMU 893children=stage2_tlb 894eventq_index=0 895stage2_tlb=system.cpu1.dstage2_mmu.stage2_tlb 896sys=system 897tlb=system.cpu1.dtb 898 899[system.cpu1.dstage2_mmu.stage2_tlb] 900type=ArmTLB 901children=walker 902eventq_index=0 903is_stage2=true 904size=32 905walker=system.cpu1.dstage2_mmu.stage2_tlb.walker 906 907[system.cpu1.dstage2_mmu.stage2_tlb.walker] 908type=ArmTableWalker 909clk_domain=system.cpu_clk_domain 910eventq_index=0 911is_stage2=true 912num_squash_per_cycle=2 913sys=system 914 915[system.cpu1.dtb] 916type=ArmTLB 917children=walker 918eventq_index=0 919is_stage2=false 920size=64 921walker=system.cpu1.dtb.walker 922 923[system.cpu1.dtb.walker] 924type=ArmTableWalker 925clk_domain=system.cpu_clk_domain 926eventq_index=0 927is_stage2=false 928num_squash_per_cycle=2 929sys=system 930port=system.cpu1.toL2Bus.slave[3] 931 932[system.cpu1.fuPool] 933type=FUPool 934children=FUList0 FUList1 FUList2 FUList3 FUList4 935FUList=system.cpu1.fuPool.FUList0 system.cpu1.fuPool.FUList1 system.cpu1.fuPool.FUList2 system.cpu1.fuPool.FUList3 system.cpu1.fuPool.FUList4 936eventq_index=0 937 938[system.cpu1.fuPool.FUList0] 939type=FUDesc 940children=opList 941count=2 942eventq_index=0 943opList=system.cpu1.fuPool.FUList0.opList 944 945[system.cpu1.fuPool.FUList0.opList] 946type=OpDesc 947eventq_index=0 948opClass=IntAlu 949opLat=1 950pipelined=true 951 952[system.cpu1.fuPool.FUList1] 953type=FUDesc 954children=opList0 opList1 opList2 955count=1 956eventq_index=0 957opList=system.cpu1.fuPool.FUList1.opList0 system.cpu1.fuPool.FUList1.opList1 system.cpu1.fuPool.FUList1.opList2 958 959[system.cpu1.fuPool.FUList1.opList0] 960type=OpDesc 961eventq_index=0 962opClass=IntMult 963opLat=3 964pipelined=true 965 966[system.cpu1.fuPool.FUList1.opList1] 967type=OpDesc 968eventq_index=0 969opClass=IntDiv 970opLat=12 971pipelined=false 972 973[system.cpu1.fuPool.FUList1.opList2] 974type=OpDesc 975eventq_index=0 976opClass=IprAccess 977opLat=3 978pipelined=true 979 980[system.cpu1.fuPool.FUList2] 981type=FUDesc 982children=opList 983count=1 984eventq_index=0 985opList=system.cpu1.fuPool.FUList2.opList 986 987[system.cpu1.fuPool.FUList2.opList] 988type=OpDesc 989eventq_index=0 990opClass=MemRead 991opLat=2 992pipelined=true 993 994[system.cpu1.fuPool.FUList3] 995type=FUDesc 996children=opList 997count=1 998eventq_index=0 999opList=system.cpu1.fuPool.FUList3.opList 1000 1001[system.cpu1.fuPool.FUList3.opList] 1002type=OpDesc 1003eventq_index=0 1004opClass=MemWrite 1005opLat=2 1006pipelined=true 1007 1008[system.cpu1.fuPool.FUList4] 1009type=FUDesc 1010children=opList00 opList01 opList02 opList03 opList04 opList05 opList06 opList07 opList08 opList09 opList10 opList11 opList12 opList13 opList14 opList15 opList16 opList17 opList18 opList19 opList20 opList21 opList22 opList23 opList24 opList25 1011count=2 1012eventq_index=0 1013opList=system.cpu1.fuPool.FUList4.opList00 system.cpu1.fuPool.FUList4.opList01 system.cpu1.fuPool.FUList4.opList02 system.cpu1.fuPool.FUList4.opList03 system.cpu1.fuPool.FUList4.opList04 system.cpu1.fuPool.FUList4.opList05 system.cpu1.fuPool.FUList4.opList06 system.cpu1.fuPool.FUList4.opList07 system.cpu1.fuPool.FUList4.opList08 system.cpu1.fuPool.FUList4.opList09 system.cpu1.fuPool.FUList4.opList10 system.cpu1.fuPool.FUList4.opList11 system.cpu1.fuPool.FUList4.opList12 system.cpu1.fuPool.FUList4.opList13 system.cpu1.fuPool.FUList4.opList14 system.cpu1.fuPool.FUList4.opList15 system.cpu1.fuPool.FUList4.opList16 system.cpu1.fuPool.FUList4.opList17 system.cpu1.fuPool.FUList4.opList18 system.cpu1.fuPool.FUList4.opList19 system.cpu1.fuPool.FUList4.opList20 system.cpu1.fuPool.FUList4.opList21 system.cpu1.fuPool.FUList4.opList22 system.cpu1.fuPool.FUList4.opList23 system.cpu1.fuPool.FUList4.opList24 system.cpu1.fuPool.FUList4.opList25 1014 1015[system.cpu1.fuPool.FUList4.opList00] 1016type=OpDesc 1017eventq_index=0 1018opClass=SimdAdd 1019opLat=4 1020pipelined=true 1021 1022[system.cpu1.fuPool.FUList4.opList01] 1023type=OpDesc 1024eventq_index=0 1025opClass=SimdAddAcc 1026opLat=4 1027pipelined=true 1028 1029[system.cpu1.fuPool.FUList4.opList02] 1030type=OpDesc 1031eventq_index=0 1032opClass=SimdAlu 1033opLat=4 1034pipelined=true 1035 1036[system.cpu1.fuPool.FUList4.opList03] 1037type=OpDesc 1038eventq_index=0 1039opClass=SimdCmp 1040opLat=4 1041pipelined=true 1042 1043[system.cpu1.fuPool.FUList4.opList04] 1044type=OpDesc 1045eventq_index=0 1046opClass=SimdCvt 1047opLat=3 1048pipelined=true 1049 1050[system.cpu1.fuPool.FUList4.opList05] 1051type=OpDesc 1052eventq_index=0 1053opClass=SimdMisc 1054opLat=3 1055pipelined=true 1056 1057[system.cpu1.fuPool.FUList4.opList06] 1058type=OpDesc 1059eventq_index=0 1060opClass=SimdMult 1061opLat=5 1062pipelined=true 1063 1064[system.cpu1.fuPool.FUList4.opList07] 1065type=OpDesc 1066eventq_index=0 1067opClass=SimdMultAcc 1068opLat=5 1069pipelined=true 1070 1071[system.cpu1.fuPool.FUList4.opList08] 1072type=OpDesc 1073eventq_index=0 1074opClass=SimdShift 1075opLat=3 1076pipelined=true 1077 1078[system.cpu1.fuPool.FUList4.opList09] 1079type=OpDesc 1080eventq_index=0 1081opClass=SimdShiftAcc 1082opLat=3 1083pipelined=true 1084 1085[system.cpu1.fuPool.FUList4.opList10] 1086type=OpDesc 1087eventq_index=0 1088opClass=SimdSqrt 1089opLat=9 1090pipelined=true 1091 1092[system.cpu1.fuPool.FUList4.opList11] 1093type=OpDesc 1094eventq_index=0 1095opClass=SimdFloatAdd 1096opLat=5 1097pipelined=true 1098 1099[system.cpu1.fuPool.FUList4.opList12] 1100type=OpDesc 1101eventq_index=0 1102opClass=SimdFloatAlu 1103opLat=5 1104pipelined=true 1105 1106[system.cpu1.fuPool.FUList4.opList13] 1107type=OpDesc 1108eventq_index=0 1109opClass=SimdFloatCmp 1110opLat=3 1111pipelined=true 1112 1113[system.cpu1.fuPool.FUList4.opList14] 1114type=OpDesc 1115eventq_index=0 1116opClass=SimdFloatCvt 1117opLat=3 1118pipelined=true 1119 1120[system.cpu1.fuPool.FUList4.opList15] 1121type=OpDesc 1122eventq_index=0 1123opClass=SimdFloatDiv 1124opLat=3 1125pipelined=true 1126 1127[system.cpu1.fuPool.FUList4.opList16] 1128type=OpDesc 1129eventq_index=0 1130opClass=SimdFloatMisc 1131opLat=3 1132pipelined=true 1133 1134[system.cpu1.fuPool.FUList4.opList17] 1135type=OpDesc 1136eventq_index=0 1137opClass=SimdFloatMult 1138opLat=3 1139pipelined=true 1140 1141[system.cpu1.fuPool.FUList4.opList18] 1142type=OpDesc 1143eventq_index=0 1144opClass=SimdFloatMultAcc 1145opLat=1 1146pipelined=true 1147 1148[system.cpu1.fuPool.FUList4.opList19] 1149type=OpDesc 1150eventq_index=0 1151opClass=SimdFloatSqrt 1152opLat=9 1153pipelined=true 1154 1155[system.cpu1.fuPool.FUList4.opList20] 1156type=OpDesc 1157eventq_index=0 1158opClass=FloatAdd 1159opLat=5 1160pipelined=true 1161 1162[system.cpu1.fuPool.FUList4.opList21] 1163type=OpDesc 1164eventq_index=0 1165opClass=FloatCmp 1166opLat=5 1167pipelined=true 1168 1169[system.cpu1.fuPool.FUList4.opList22] 1170type=OpDesc 1171eventq_index=0 1172opClass=FloatCvt 1173opLat=5 1174pipelined=true 1175 1176[system.cpu1.fuPool.FUList4.opList23] 1177type=OpDesc 1178eventq_index=0 1179opClass=FloatDiv 1180opLat=9 1181pipelined=false 1182 1183[system.cpu1.fuPool.FUList4.opList24] 1184type=OpDesc 1185eventq_index=0 1186opClass=FloatSqrt 1187opLat=33 1188pipelined=false 1189 1190[system.cpu1.fuPool.FUList4.opList25] 1191type=OpDesc 1192eventq_index=0 1193opClass=FloatMult 1194opLat=4 1195pipelined=true 1196 1197[system.cpu1.icache] 1198type=Cache 1199children=tags 1200addr_ranges=0:18446744073709551615 1201assoc=2 1202clk_domain=system.cpu_clk_domain 1203clusivity=mostly_incl 1204demand_mshr_reserve=1 1205eventq_index=0 1206forward_snoops=false 1207hit_latency=1 1208is_read_only=true 1209max_miss_count=0 1210mshrs=2 1211prefetch_on_access=false 1212prefetcher=Null 1213response_latency=1 1214sequential_access=false 1215size=32768 1216system=system 1217tags=system.cpu1.icache.tags 1218tgts_per_mshr=8 1219write_buffers=8 1220writeback_clean=true 1221cpu_side=system.cpu1.icache_port 1222mem_side=system.cpu1.toL2Bus.slave[0] 1223 1224[system.cpu1.icache.tags] 1225type=LRU 1226assoc=2 1227block_size=64 1228clk_domain=system.cpu_clk_domain 1229eventq_index=0 1230hit_latency=1 1231sequential_access=false 1232size=32768 1233 1234[system.cpu1.interrupts] 1235type=ArmInterrupts 1236eventq_index=0 1237 1238[system.cpu1.isa] 1239type=ArmISA 1240decoderFlavour=Generic 1241eventq_index=0 1242fpsid=1090793632 1243id_aa64afr0_el1=0 1244id_aa64afr1_el1=0 1245id_aa64dfr0_el1=1052678 1246id_aa64dfr1_el1=0 1247id_aa64isar0_el1=0 1248id_aa64isar1_el1=0 1249id_aa64mmfr0_el1=15728642 1250id_aa64mmfr1_el1=0 1251id_aa64pfr0_el1=17 1252id_aa64pfr1_el1=0 1253id_isar0=34607377 1254id_isar1=34677009 1255id_isar2=555950401 1256id_isar3=17899825 1257id_isar4=268501314 1258id_isar5=0 1259id_mmfr0=270536963 1260id_mmfr1=0 1261id_mmfr2=19070976 1262id_mmfr3=34611729 1263id_pfr0=49 1264id_pfr1=4113 1265midr=1091551472 1266pmu=Null 1267system=system 1268 1269[system.cpu1.istage2_mmu] 1270type=ArmStage2MMU 1271children=stage2_tlb 1272eventq_index=0 1273stage2_tlb=system.cpu1.istage2_mmu.stage2_tlb 1274sys=system 1275tlb=system.cpu1.itb 1276 1277[system.cpu1.istage2_mmu.stage2_tlb] 1278type=ArmTLB 1279children=walker 1280eventq_index=0 1281is_stage2=true 1282size=32 1283walker=system.cpu1.istage2_mmu.stage2_tlb.walker 1284 1285[system.cpu1.istage2_mmu.stage2_tlb.walker] 1286type=ArmTableWalker 1287clk_domain=system.cpu_clk_domain 1288eventq_index=0 1289is_stage2=true 1290num_squash_per_cycle=2 1291sys=system 1292 1293[system.cpu1.itb] 1294type=ArmTLB 1295children=walker 1296eventq_index=0 1297is_stage2=false 1298size=64 1299walker=system.cpu1.itb.walker 1300 1301[system.cpu1.itb.walker] 1302type=ArmTableWalker 1303clk_domain=system.cpu_clk_domain 1304eventq_index=0 1305is_stage2=false 1306num_squash_per_cycle=2 1307sys=system 1308port=system.cpu1.toL2Bus.slave[2] 1309 1310[system.cpu1.l2cache] 1311type=Cache 1312children=prefetcher tags 1313addr_ranges=0:18446744073709551615 1314assoc=16 1315clk_domain=system.cpu_clk_domain 1316clusivity=mostly_excl 1317demand_mshr_reserve=1 1318eventq_index=0 1319forward_snoops=true 1320hit_latency=12 1321is_read_only=false 1322max_miss_count=0 1323mshrs=16 1324prefetch_on_access=true 1325prefetcher=system.cpu1.l2cache.prefetcher 1326response_latency=12 1327sequential_access=false 1328size=1048576 1329system=system 1330tags=system.cpu1.l2cache.tags 1331tgts_per_mshr=8 1332write_buffers=8 1333writeback_clean=false 1334cpu_side=system.cpu1.toL2Bus.master[0] 1335mem_side=system.toL2Bus.slave[1] 1336 1337[system.cpu1.l2cache.prefetcher] 1338type=StridePrefetcher 1339cache_snoop=false 1340clk_domain=system.cpu_clk_domain 1341degree=8 1342eventq_index=0 1343latency=1 1344max_conf=7 1345min_conf=0 1346on_data=true 1347on_inst=true 1348on_miss=false 1349on_read=true 1350on_write=true 1351queue_filter=true 1352queue_size=32 1353queue_squash=true 1354start_conf=4 1355sys=system 1356table_assoc=4 1357table_sets=16 1358tag_prefetch=true 1359thresh_conf=4 1360use_master_id=true 1361 1362[system.cpu1.l2cache.tags] 1363type=RandomRepl 1364assoc=16 1365block_size=64 1366clk_domain=system.cpu_clk_domain 1367eventq_index=0 1368hit_latency=12 1369sequential_access=false 1370size=1048576 1371 1372[system.cpu1.toL2Bus] 1373type=CoherentXBar 1374children=snoop_filter 1375clk_domain=system.cpu_clk_domain 1376eventq_index=0 1377forward_latency=0 1378frontend_latency=1 1379response_latency=1 1380snoop_filter=system.cpu1.toL2Bus.snoop_filter 1381snoop_response_latency=1 1382system=system 1383use_default_range=false 1384width=32 1385master=system.cpu1.l2cache.cpu_side 1386slave=system.cpu1.icache.mem_side system.cpu1.dcache.mem_side system.cpu1.itb.walker.port system.cpu1.dtb.walker.port 1387 1388[system.cpu1.toL2Bus.snoop_filter] 1389type=SnoopFilter 1390eventq_index=0 1391lookup_latency=0 1392max_capacity=8388608 1393system=system 1394 1395[system.cpu1.tracer] 1396type=ExeTracer 1397eventq_index=0 1398 1399[system.cpu_clk_domain] 1400type=SrcClockDomain 1401clock=500 1402domain_id=-1 1403eventq_index=0 1404init_perf_level=0 1405voltage_domain=system.voltage_domain 1406 1407[system.dvfs_handler] 1408type=DVFSHandler 1409domains= 1410enable=false 1411eventq_index=0 1412sys_clk_domain=system.clk_domain 1413transition_latency=100000000 1414 1415[system.intrctrl] 1416type=IntrControl 1417eventq_index=0 1418sys=system 1419 1420[system.iobus] 1421type=NoncoherentXBar 1422clk_domain=system.clk_domain 1423eventq_index=0 1424forward_latency=1 1425frontend_latency=2 1426response_latency=2 1427use_default_range=false 1428width=16 1429master=system.realview.uart.pio system.realview.realview_io.pio system.realview.pci_host.pio system.realview.timer0.pio system.realview.timer1.pio system.realview.clcd.pio system.realview.hdlcd.pio system.realview.kmi0.pio system.realview.kmi1.pio system.realview.cf_ctrl.pio system.realview.rtc.pio system.realview.vram.port system.realview.l2x0_fake.pio system.realview.uart1_fake.pio system.realview.uart2_fake.pio system.realview.uart3_fake.pio system.realview.sp810_fake.pio system.realview.watchdog_fake.pio system.realview.aaci_fake.pio system.realview.lan_fake.pio system.realview.usb_fake.pio system.realview.mmc_fake.pio system.realview.energy_ctrl.pio system.realview.ide.pio system.realview.ethernet.pio system.iocache.cpu_side 1430slave=system.bridge.master system.realview.clcd.dma system.realview.cf_ctrl.dma system.realview.ide.dma system.realview.ethernet.dma 1431 1432[system.iocache] 1433type=Cache 1434children=tags 1435addr_ranges=2147483648:2415919103 1436assoc=8 1437clk_domain=system.clk_domain 1438clusivity=mostly_incl 1439demand_mshr_reserve=1 1440eventq_index=0 1441forward_snoops=false 1442hit_latency=50 1443is_read_only=false 1444max_miss_count=0 1445mshrs=20 1446prefetch_on_access=false 1447prefetcher=Null 1448response_latency=50 1449sequential_access=false 1450size=1024 1451system=system 1452tags=system.iocache.tags 1453tgts_per_mshr=12 1454write_buffers=8 1455writeback_clean=false 1456cpu_side=system.iobus.master[25] 1457mem_side=system.membus.slave[3] 1458 1459[system.iocache.tags] 1460type=LRU 1461assoc=8 1462block_size=64 1463clk_domain=system.clk_domain 1464eventq_index=0 1465hit_latency=50 1466sequential_access=false 1467size=1024 1468 1469[system.l2c] 1470type=Cache 1471children=tags 1472addr_ranges=0:18446744073709551615 1473assoc=8 1474clk_domain=system.cpu_clk_domain 1475clusivity=mostly_incl 1476demand_mshr_reserve=1 1477eventq_index=0 1478forward_snoops=true 1479hit_latency=20 1480is_read_only=false 1481max_miss_count=0 1482mshrs=20 1483prefetch_on_access=false 1484prefetcher=Null 1485response_latency=20 1486sequential_access=false 1487size=4194304 1488system=system 1489tags=system.l2c.tags 1490tgts_per_mshr=12 1491write_buffers=8 1492writeback_clean=false 1493cpu_side=system.toL2Bus.master[0] 1494mem_side=system.membus.slave[2] 1495 1496[system.l2c.tags] 1497type=LRU 1498assoc=8 1499block_size=64 1500clk_domain=system.cpu_clk_domain 1501eventq_index=0 1502hit_latency=20 1503sequential_access=false 1504size=4194304 1505 1506[system.membus] 1507type=CoherentXBar 1508children=badaddr_responder 1509clk_domain=system.clk_domain 1510eventq_index=0 1511forward_latency=4 1512frontend_latency=3 1513response_latency=2 1514snoop_filter=Null 1515snoop_response_latency=4 1516system=system 1517use_default_range=false 1518width=16 1519default=system.membus.badaddr_responder.pio 1520master=system.bridge.slave system.realview.nvmem.port system.realview.gic.pio system.realview.vgic.pio system.realview.local_cpu_timer.pio system.physmem.port 1521slave=system.realview.hdlcd.dma system.system_port system.l2c.mem_side system.iocache.mem_side 1522 1523[system.membus.badaddr_responder] 1524type=IsaFake 1525clk_domain=system.clk_domain 1526eventq_index=0 1527fake_mem=false 1528pio_addr=0 1529pio_latency=100000 1530pio_size=8 1531ret_bad_addr=true 1532ret_data16=65535 1533ret_data32=4294967295 1534ret_data64=18446744073709551615 1535ret_data8=255 1536system=system 1537update_data=false 1538warn_access=warn 1539pio=system.membus.default 1540 1541[system.physmem] 1542type=DRAMCtrl 1543IDD0=0.075000 1544IDD02=0.000000 1545IDD2N=0.050000 1546IDD2N2=0.000000 1547IDD2P0=0.000000 1548IDD2P02=0.000000 1549IDD2P1=0.000000 1550IDD2P12=0.000000 1551IDD3N=0.057000 1552IDD3N2=0.000000 1553IDD3P0=0.000000 1554IDD3P02=0.000000 1555IDD3P1=0.000000 1556IDD3P12=0.000000 1557IDD4R=0.187000 1558IDD4R2=0.000000 1559IDD4W=0.165000 1560IDD4W2=0.000000 1561IDD5=0.220000 1562IDD52=0.000000 1563IDD6=0.000000 1564IDD62=0.000000 1565VDD=1.500000 1566VDD2=0.000000 1567activation_limit=4 1568addr_mapping=RoRaBaCoCh 1569bank_groups_per_rank=0 1570banks_per_rank=8 1571burst_length=8 1572channels=1 1573clk_domain=system.clk_domain 1574conf_table_reported=true 1575device_bus_width=8 1576device_rowbuffer_size=1024 1577device_size=536870912 1578devices_per_rank=8 1579dll=true 1580eventq_index=0 1581in_addr_map=true 1582max_accesses_per_row=16 1583mem_sched_policy=frfcfs 1584min_writes_per_switch=16 1585null=false 1586page_policy=open_adaptive 1587range=2147483648:2415919103 1588ranks_per_channel=2 1589read_buffer_size=32 1590static_backend_latency=10000 1591static_frontend_latency=10000 1592tBURST=5000 1593tCCD_L=0 1594tCK=1250 1595tCL=13750 1596tCS=2500 1597tRAS=35000 1598tRCD=13750 1599tREFI=7800000 1600tRFC=260000 1601tRP=13750 1602tRRD=6000 1603tRRD_L=0 1604tRTP=7500 1605tRTW=2500 1606tWR=15000 1607tWTR=7500 1608tXAW=30000 1609tXP=0 1610tXPDLL=0 1611tXS=0 1612tXSDLL=0 1613write_buffer_size=64 1614write_high_thresh_perc=85 1615write_low_thresh_perc=50 1616port=system.membus.master[5] 1617 1618[system.realview] 1619type=RealView 1620children=aaci_fake cf_ctrl clcd dcc energy_ctrl ethernet generic_timer gic hdlcd ide kmi0 kmi1 l2x0_fake lan_fake local_cpu_timer mcc mmc_fake nvmem pci_host realview_io rtc sp810_fake timer0 timer1 uart uart1_fake uart2_fake uart3_fake usb_fake vgic vram watchdog_fake 1621eventq_index=0 1622intrctrl=system.intrctrl 1623system=system 1624 1625[system.realview.aaci_fake] 1626type=AmbaFake 1627amba_id=0 1628clk_domain=system.clk_domain 1629eventq_index=0 1630ignore_access=false 1631pio_addr=470024192 1632pio_latency=100000 1633system=system 1634pio=system.iobus.master[18] 1635 1636[system.realview.cf_ctrl] 1637type=IdeController 1638BAR0=471465984 1639BAR0LegacyIO=true 1640BAR0Size=256 1641BAR1=471466240 1642BAR1LegacyIO=true 1643BAR1Size=4096 1644BAR2=1 1645BAR2LegacyIO=false 1646BAR2Size=8 1647BAR3=1 1648BAR3LegacyIO=false 1649BAR3Size=4 1650BAR4=1 1651BAR4LegacyIO=false 1652BAR4Size=16 1653BAR5=1 1654BAR5LegacyIO=false 1655BAR5Size=0 1656BIST=0 1657CacheLineSize=0 1658CapabilityPtr=0 1659CardbusCIS=0 1660ClassCode=1 1661Command=1 1662DeviceID=28945 1663ExpansionROM=0 1664HeaderType=0 1665InterruptLine=31 1666InterruptPin=1 1667LatencyTimer=0 1668LegacyIOBase=0 1669MSICAPBaseOffset=0 1670MSICAPCapId=0 1671MSICAPMaskBits=0 1672MSICAPMsgAddr=0 1673MSICAPMsgCtrl=0 1674MSICAPMsgData=0 1675MSICAPMsgUpperAddr=0 1676MSICAPNextCapability=0 1677MSICAPPendingBits=0 1678MSIXCAPBaseOffset=0 1679MSIXCAPCapId=0 1680MSIXCAPNextCapability=0 1681MSIXMsgCtrl=0 1682MSIXPbaOffset=0 1683MSIXTableOffset=0 1684MaximumLatency=0 1685MinimumGrant=0 1686PMCAPBaseOffset=0 1687PMCAPCapId=0 1688PMCAPCapabilities=0 1689PMCAPCtrlStatus=0 1690PMCAPNextCapability=0 1691PXCAPBaseOffset=0 1692PXCAPCapId=0 1693PXCAPCapabilities=0 1694PXCAPDevCap2=0 1695PXCAPDevCapabilities=0 1696PXCAPDevCtrl=0 1697PXCAPDevCtrl2=0 1698PXCAPDevStatus=0 1699PXCAPLinkCap=0 1700PXCAPLinkCtrl=0 1701PXCAPLinkStatus=0 1702PXCAPNextCapability=0 1703ProgIF=133 1704Revision=0 1705Status=640 1706SubClassCode=1 1707SubsystemID=0 1708SubsystemVendorID=0 1709VendorID=32902 1710clk_domain=system.clk_domain 1711config_latency=20000 1712ctrl_offset=2 1713disks= 1714eventq_index=0 1715host=system.realview.pci_host 1716io_shift=2 1717pci_bus=2 1718pci_dev=0 1719pci_func=0 1720pio_latency=30000 1721system=system 1722dma=system.iobus.slave[2] 1723pio=system.iobus.master[9] 1724 1725[system.realview.clcd] 1726type=Pl111 1727amba_id=1315089 1728clk_domain=system.clk_domain 1729enable_capture=true 1730eventq_index=0 1731gic=system.realview.gic 1732int_num=46 1733pio_addr=471793664 1734pio_latency=10000 1735pixel_clock=41667 1736system=system 1737vnc=system.vncserver 1738dma=system.iobus.slave[1] 1739pio=system.iobus.master[5] 1740 1741[system.realview.dcc] 1742type=SubSystem 1743children=osc_cpu osc_ddr osc_hsbm osc_pxl osc_smb osc_sys 1744eventq_index=0 1745 1746[system.realview.dcc.osc_cpu] 1747type=RealViewOsc 1748dcc=0 1749device=0 1750eventq_index=0 1751freq=16667 1752parent=system.realview.realview_io 1753position=0 1754site=1 1755voltage_domain=system.voltage_domain 1756 1757[system.realview.dcc.osc_ddr] 1758type=RealViewOsc 1759dcc=0 1760device=8 1761eventq_index=0 1762freq=25000 1763parent=system.realview.realview_io 1764position=0 1765site=1 1766voltage_domain=system.voltage_domain 1767 1768[system.realview.dcc.osc_hsbm] 1769type=RealViewOsc 1770dcc=0 1771device=4 1772eventq_index=0 1773freq=25000 1774parent=system.realview.realview_io 1775position=0 1776site=1 1777voltage_domain=system.voltage_domain 1778 1779[system.realview.dcc.osc_pxl] 1780type=RealViewOsc 1781dcc=0 1782device=5 1783eventq_index=0 1784freq=42105 1785parent=system.realview.realview_io 1786position=0 1787site=1 1788voltage_domain=system.voltage_domain 1789 1790[system.realview.dcc.osc_smb] 1791type=RealViewOsc 1792dcc=0 1793device=6 1794eventq_index=0 1795freq=20000 1796parent=system.realview.realview_io 1797position=0 1798site=1 1799voltage_domain=system.voltage_domain 1800 1801[system.realview.dcc.osc_sys] 1802type=RealViewOsc 1803dcc=0 1804device=7 1805eventq_index=0 1806freq=16667 1807parent=system.realview.realview_io 1808position=0 1809site=1 1810voltage_domain=system.voltage_domain 1811 1812[system.realview.energy_ctrl] 1813type=EnergyCtrl 1814clk_domain=system.clk_domain 1815dvfs_handler=system.dvfs_handler 1816eventq_index=0 1817pio_addr=470286336 1818pio_latency=100000 1819system=system 1820pio=system.iobus.master[22] 1821 1822[system.realview.ethernet] 1823type=IGbE 1824BAR0=0 1825BAR0LegacyIO=false 1826BAR0Size=131072 1827BAR1=0 1828BAR1LegacyIO=false 1829BAR1Size=0 1830BAR2=0 1831BAR2LegacyIO=false 1832BAR2Size=0 1833BAR3=0 1834BAR3LegacyIO=false 1835BAR3Size=0 1836BAR4=0 1837BAR4LegacyIO=false 1838BAR4Size=0 1839BAR5=0 1840BAR5LegacyIO=false 1841BAR5Size=0 1842BIST=0 1843CacheLineSize=0 1844CapabilityPtr=0 1845CardbusCIS=0 1846ClassCode=2 1847Command=0 1848DeviceID=4213 1849ExpansionROM=0 1850HeaderType=0 1851InterruptLine=1 1852InterruptPin=1 1853LatencyTimer=0 1854LegacyIOBase=0 1855MSICAPBaseOffset=0 1856MSICAPCapId=0 1857MSICAPMaskBits=0 1858MSICAPMsgAddr=0 1859MSICAPMsgCtrl=0 1860MSICAPMsgData=0 1861MSICAPMsgUpperAddr=0 1862MSICAPNextCapability=0 1863MSICAPPendingBits=0 1864MSIXCAPBaseOffset=0 1865MSIXCAPCapId=0 1866MSIXCAPNextCapability=0 1867MSIXMsgCtrl=0 1868MSIXPbaOffset=0 1869MSIXTableOffset=0 1870MaximumLatency=0 1871MinimumGrant=255 1872PMCAPBaseOffset=0 1873PMCAPCapId=0 1874PMCAPCapabilities=0 1875PMCAPCtrlStatus=0 1876PMCAPNextCapability=0 1877PXCAPBaseOffset=0 1878PXCAPCapId=0 1879PXCAPCapabilities=0 1880PXCAPDevCap2=0 1881PXCAPDevCapabilities=0 1882PXCAPDevCtrl=0 1883PXCAPDevCtrl2=0 1884PXCAPDevStatus=0 1885PXCAPLinkCap=0 1886PXCAPLinkCtrl=0 1887PXCAPLinkStatus=0 1888PXCAPNextCapability=0 1889ProgIF=0 1890Revision=0 1891Status=0 1892SubClassCode=0 1893SubsystemID=4104 1894SubsystemVendorID=32902 1895VendorID=32902 1896clk_domain=system.clk_domain 1897config_latency=20000 1898eventq_index=0 1899fetch_comp_delay=10000 1900fetch_delay=10000 1901hardware_address=00:90:00:00:00:01 1902host=system.realview.pci_host 1903pci_bus=0 1904pci_dev=0 1905pci_func=0 1906phy_epid=896 1907phy_pid=680 1908pio_latency=30000 1909rx_desc_cache_size=64 1910rx_fifo_size=393216 1911rx_write_delay=0 1912system=system 1913tx_desc_cache_size=64 1914tx_fifo_size=393216 1915tx_read_delay=0 1916wb_comp_delay=10000 1917wb_delay=10000 1918dma=system.iobus.slave[4] 1919pio=system.iobus.master[24] 1920 1921[system.realview.generic_timer] 1922type=GenericTimer 1923eventq_index=0 1924gic=system.realview.gic 1925int_phys=29 1926int_virt=27 1927system=system 1928 1929[system.realview.gic] 1930type=Pl390 1931clk_domain=system.clk_domain 1932cpu_addr=738205696 1933cpu_pio_delay=10000 1934dist_addr=738201600 1935dist_pio_delay=10000 1936eventq_index=0 1937int_latency=10000 1938it_lines=128 1939platform=system.realview 1940system=system 1941pio=system.membus.master[2] 1942 1943[system.realview.hdlcd] 1944type=HDLcd 1945amba_id=1314816 1946clk_domain=system.clk_domain 1947enable_capture=true 1948eventq_index=0 1949gic=system.realview.gic 1950int_num=117 1951pio_addr=721420288 1952pio_latency=10000 1953pixel_buffer_size=2048 1954pixel_chunk=32 1955pxl_clk=system.realview.dcc.osc_pxl 1956system=system 1957vnc=system.vncserver 1958workaround_dma_line_count=true 1959workaround_swap_rb=true 1960dma=system.membus.slave[0] 1961pio=system.iobus.master[6] 1962 1963[system.realview.ide] 1964type=IdeController 1965BAR0=1 1966BAR0LegacyIO=false 1967BAR0Size=8 1968BAR1=1 1969BAR1LegacyIO=false 1970BAR1Size=4 1971BAR2=1 1972BAR2LegacyIO=false 1973BAR2Size=8 1974BAR3=1 1975BAR3LegacyIO=false 1976BAR3Size=4 1977BAR4=1 1978BAR4LegacyIO=false 1979BAR4Size=16 1980BAR5=1 1981BAR5LegacyIO=false 1982BAR5Size=0 1983BIST=0 1984CacheLineSize=0 1985CapabilityPtr=0 1986CardbusCIS=0 1987ClassCode=1 1988Command=0 1989DeviceID=28945 1990ExpansionROM=0 1991HeaderType=0 1992InterruptLine=2 1993InterruptPin=2 1994LatencyTimer=0 1995LegacyIOBase=0 1996MSICAPBaseOffset=0 1997MSICAPCapId=0 1998MSICAPMaskBits=0 1999MSICAPMsgAddr=0 2000MSICAPMsgCtrl=0 2001MSICAPMsgData=0 2002MSICAPMsgUpperAddr=0 2003MSICAPNextCapability=0 2004MSICAPPendingBits=0 2005MSIXCAPBaseOffset=0 2006MSIXCAPCapId=0 2007MSIXCAPNextCapability=0 2008MSIXMsgCtrl=0 2009MSIXPbaOffset=0 2010MSIXTableOffset=0 2011MaximumLatency=0 2012MinimumGrant=0 2013PMCAPBaseOffset=0 2014PMCAPCapId=0 2015PMCAPCapabilities=0 2016PMCAPCtrlStatus=0 2017PMCAPNextCapability=0 2018PXCAPBaseOffset=0 2019PXCAPCapId=0 2020PXCAPCapabilities=0 2021PXCAPDevCap2=0 2022PXCAPDevCapabilities=0 2023PXCAPDevCtrl=0 2024PXCAPDevCtrl2=0 2025PXCAPDevStatus=0 2026PXCAPLinkCap=0 2027PXCAPLinkCtrl=0 2028PXCAPLinkStatus=0 2029PXCAPNextCapability=0 2030ProgIF=133 2031Revision=0 2032Status=640 2033SubClassCode=1 2034SubsystemID=0 2035SubsystemVendorID=0 2036VendorID=32902 2037clk_domain=system.clk_domain 2038config_latency=20000 2039ctrl_offset=0 2040disks=system.cf0 2041eventq_index=0 2042host=system.realview.pci_host 2043io_shift=0 2044pci_bus=0 2045pci_dev=1 2046pci_func=0 2047pio_latency=30000 2048system=system 2049dma=system.iobus.slave[3] 2050pio=system.iobus.master[23] 2051 2052[system.realview.kmi0] 2053type=Pl050 2054amba_id=1314896 2055clk_domain=system.clk_domain 2056eventq_index=0 2057gic=system.realview.gic 2058int_delay=1000000 2059int_num=44 2060is_mouse=false 2061pio_addr=470155264 2062pio_latency=100000 2063system=system 2064vnc=system.vncserver 2065pio=system.iobus.master[7] 2066 2067[system.realview.kmi1] 2068type=Pl050 2069amba_id=1314896 2070clk_domain=system.clk_domain 2071eventq_index=0 2072gic=system.realview.gic 2073int_delay=1000000 2074int_num=45 2075is_mouse=true 2076pio_addr=470220800 2077pio_latency=100000 2078system=system 2079vnc=system.vncserver 2080pio=system.iobus.master[8] 2081 2082[system.realview.l2x0_fake] 2083type=IsaFake 2084clk_domain=system.clk_domain 2085eventq_index=0 2086fake_mem=false 2087pio_addr=739246080 2088pio_latency=100000 2089pio_size=4095 2090ret_bad_addr=false 2091ret_data16=65535 2092ret_data32=4294967295 2093ret_data64=18446744073709551615 2094ret_data8=255 2095system=system 2096update_data=false 2097warn_access= 2098pio=system.iobus.master[12] 2099 2100[system.realview.lan_fake] 2101type=IsaFake 2102clk_domain=system.clk_domain 2103eventq_index=0 2104fake_mem=false 2105pio_addr=436207616 2106pio_latency=100000 2107pio_size=65535 2108ret_bad_addr=false 2109ret_data16=65535 2110ret_data32=4294967295 2111ret_data64=18446744073709551615 2112ret_data8=255 2113system=system 2114update_data=false 2115warn_access= 2116pio=system.iobus.master[19] 2117 2118[system.realview.local_cpu_timer] 2119type=CpuLocalTimer 2120clk_domain=system.clk_domain 2121eventq_index=0 2122gic=system.realview.gic 2123int_num_timer=29 2124int_num_watchdog=30 2125pio_addr=738721792 2126pio_latency=100000 2127system=system 2128pio=system.membus.master[4] 2129 2130[system.realview.mcc] 2131type=SubSystem 2132children=osc_clcd osc_mcc osc_peripheral osc_system_bus 2133eventq_index=0 2134 2135[system.realview.mcc.osc_clcd] 2136type=RealViewOsc 2137dcc=0 2138device=1 2139eventq_index=0 2140freq=42105 2141parent=system.realview.realview_io 2142position=0 2143site=0 2144voltage_domain=system.voltage_domain 2145 2146[system.realview.mcc.osc_mcc] 2147type=RealViewOsc 2148dcc=0 2149device=0 2150eventq_index=0 2151freq=20000 2152parent=system.realview.realview_io 2153position=0 2154site=0 2155voltage_domain=system.voltage_domain 2156 2157[system.realview.mcc.osc_peripheral] 2158type=RealViewOsc 2159dcc=0 2160device=2 2161eventq_index=0 2162freq=41667 2163parent=system.realview.realview_io 2164position=0 2165site=0 2166voltage_domain=system.voltage_domain 2167 2168[system.realview.mcc.osc_system_bus] 2169type=RealViewOsc 2170dcc=0 2171device=4 2172eventq_index=0 2173freq=41667 2174parent=system.realview.realview_io 2175position=0 2176site=0 2177voltage_domain=system.voltage_domain 2178 2179[system.realview.mmc_fake] 2180type=AmbaFake 2181amba_id=0 2182clk_domain=system.clk_domain 2183eventq_index=0 2184ignore_access=false 2185pio_addr=470089728 2186pio_latency=100000 2187system=system 2188pio=system.iobus.master[21] 2189 2190[system.realview.nvmem] 2191type=SimpleMemory 2192bandwidth=73.000000 2193clk_domain=system.clk_domain 2194conf_table_reported=false 2195eventq_index=0 2196in_addr_map=true 2197latency=30000 2198latency_var=0 2199null=false 2200range=0:67108863 2201port=system.membus.master[1] 2202 2203[system.realview.pci_host] 2204type=GenericPciHost 2205clk_domain=system.clk_domain 2206conf_base=805306368 2207conf_device_bits=16 2208conf_size=268435456 2209eventq_index=0 2210pci_dma_base=0 2211pci_mem_base=0 2212pci_pio_base=0 2213platform=system.realview 2214system=system 2215pio=system.iobus.master[2] 2216 2217[system.realview.realview_io] 2218type=RealViewCtrl 2219clk_domain=system.clk_domain 2220eventq_index=0 2221idreg=35979264 2222pio_addr=469827584 2223pio_latency=100000 2224proc_id0=335544320 2225proc_id1=335544320 2226system=system 2227pio=system.iobus.master[1] 2228 2229[system.realview.rtc] 2230type=PL031 2231amba_id=3412017 2232clk_domain=system.clk_domain 2233eventq_index=0 2234gic=system.realview.gic 2235int_delay=100000 2236int_num=36 2237pio_addr=471269376 2238pio_latency=100000 2239system=system 2240time=Thu Jan 1 00:00:00 2009 2241pio=system.iobus.master[10] 2242 2243[system.realview.sp810_fake] 2244type=AmbaFake 2245amba_id=0 2246clk_domain=system.clk_domain 2247eventq_index=0 2248ignore_access=true 2249pio_addr=469893120 2250pio_latency=100000 2251system=system 2252pio=system.iobus.master[16] 2253 2254[system.realview.timer0] 2255type=Sp804 2256amba_id=1316868 2257clk_domain=system.clk_domain 2258clock0=1000000 2259clock1=1000000 2260eventq_index=0 2261gic=system.realview.gic 2262int_num0=34 2263int_num1=34 2264pio_addr=470876160 2265pio_latency=100000 2266system=system 2267pio=system.iobus.master[3] 2268 2269[system.realview.timer1] 2270type=Sp804 2271amba_id=1316868 2272clk_domain=system.clk_domain 2273clock0=1000000 2274clock1=1000000 2275eventq_index=0 2276gic=system.realview.gic 2277int_num0=35 2278int_num1=35 2279pio_addr=470941696 2280pio_latency=100000 2281system=system 2282pio=system.iobus.master[4] 2283 2284[system.realview.uart] 2285type=Pl011 2286clk_domain=system.clk_domain 2287end_on_eot=false 2288eventq_index=0 2289gic=system.realview.gic 2290int_delay=100000 2291int_num=37 2292pio_addr=470351872 2293pio_latency=100000 2294platform=system.realview 2295system=system 2296terminal=system.terminal 2297pio=system.iobus.master[0] 2298 2299[system.realview.uart1_fake] 2300type=AmbaFake 2301amba_id=0 2302clk_domain=system.clk_domain 2303eventq_index=0 2304ignore_access=false 2305pio_addr=470417408 2306pio_latency=100000 2307system=system 2308pio=system.iobus.master[13] 2309 2310[system.realview.uart2_fake] 2311type=AmbaFake 2312amba_id=0 2313clk_domain=system.clk_domain 2314eventq_index=0 2315ignore_access=false 2316pio_addr=470482944 2317pio_latency=100000 2318system=system 2319pio=system.iobus.master[14] 2320 2321[system.realview.uart3_fake] 2322type=AmbaFake 2323amba_id=0 2324clk_domain=system.clk_domain 2325eventq_index=0 2326ignore_access=false 2327pio_addr=470548480 2328pio_latency=100000 2329system=system 2330pio=system.iobus.master[15] 2331 2332[system.realview.usb_fake] 2333type=IsaFake 2334clk_domain=system.clk_domain 2335eventq_index=0 2336fake_mem=false 2337pio_addr=452984832 2338pio_latency=100000 2339pio_size=131071 2340ret_bad_addr=false 2341ret_data16=65535 2342ret_data32=4294967295 2343ret_data64=18446744073709551615 2344ret_data8=255 2345system=system 2346update_data=false 2347warn_access= 2348pio=system.iobus.master[20] 2349 2350[system.realview.vgic] 2351type=VGic 2352clk_domain=system.clk_domain 2353eventq_index=0 2354gic=system.realview.gic 2355hv_addr=738213888 2356pio_delay=10000 2357platform=system.realview 2358ppint=25 2359system=system 2360vcpu_addr=738222080 2361pio=system.membus.master[3] 2362 2363[system.realview.vram] 2364type=SimpleMemory 2365bandwidth=73.000000 2366clk_domain=system.clk_domain 2367conf_table_reported=false 2368eventq_index=0 2369in_addr_map=true 2370latency=30000 2371latency_var=0 2372null=false 2373range=402653184:436207615 2374port=system.iobus.master[11] 2375 2376[system.realview.watchdog_fake] 2377type=AmbaFake 2378amba_id=0 2379clk_domain=system.clk_domain 2380eventq_index=0 2381ignore_access=false 2382pio_addr=470745088 2383pio_latency=100000 2384system=system 2385pio=system.iobus.master[17] 2386 2387[system.terminal] 2388type=Terminal 2389eventq_index=0 2390intr_control=system.intrctrl 2391number=0 2392output=true 2393port=3456 2394 2395[system.toL2Bus] 2396type=CoherentXBar 2397children=snoop_filter 2398clk_domain=system.cpu_clk_domain 2399eventq_index=0 2400forward_latency=0 2401frontend_latency=1 2402response_latency=1 2403snoop_filter=system.toL2Bus.snoop_filter 2404snoop_response_latency=1 2405system=system 2406use_default_range=false 2407width=32 2408master=system.l2c.cpu_side 2409slave=system.cpu0.l2cache.mem_side system.cpu1.l2cache.mem_side 2410 2411[system.toL2Bus.snoop_filter] 2412type=SnoopFilter 2413eventq_index=0 2414lookup_latency=0 2415max_capacity=8388608 2416system=system 2417 2418[system.vncserver] 2419type=VncServer 2420eventq_index=0 2421frame_capture=false 2422number=0 2423port=5900 2424 2425[system.voltage_domain] 2426type=VoltageDomain 2427eventq_index=0 2428voltage=1.000000 2429 2430