config.ini revision 10036
1[root] 2type=Root 3children=system 4eventq_index=0 5full_system=true 6sim_quantum=0 7time_sync_enable=false 8time_sync_period=100000000000 9time_sync_spin_threshold=100000000 10 11[system] 12type=LinuxArmSystem 13children=bridge cf0 clk_domain cpu0 cpu1 cpu_clk_domain intrctrl iobus iocache l2c membus physmem realview terminal toL2Bus vncserver voltage_domain 14atags_addr=256 15boot_loader=/dist/binaries/boot.arm 16boot_osflags=earlyprintk console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=128MB root=/dev/sda1 17cache_line_size=64 18clk_domain=system.clk_domain 19dtb_filename= 20early_kernel_symbols=false 21enable_context_switch_stats_dump=false 22eventq_index=0 23flags_addr=268435504 24gic_cpu_addr=520093952 25init_param=0 26kernel=/dist/binaries/vmlinux.arm.smp.fb.2.6.38.8 27load_addr_mask=268435455 28machine_type=RealView_PBX 29mem_mode=timing 30mem_ranges=0:134217727 31memories=system.physmem system.realview.nvmem 32multi_proc=true 33num_work_ids=16 34panic_on_oops=true 35panic_on_panic=true 36readfile=tests/halt.sh 37symbolfile= 38work_begin_ckpt_count=0 39work_begin_cpu_id_exit=-1 40work_begin_exit_count=0 41work_cpus_ckpt_count=0 42work_end_ckpt_count=0 43work_end_exit_count=0 44work_item_id=-1 45system_port=system.membus.slave[0] 46 47[system.bridge] 48type=Bridge 49clk_domain=system.clk_domain 50delay=50000 51eventq_index=0 52ranges=268435456:520093695 1073741824:1610612735 53req_size=16 54resp_size=16 55master=system.iobus.slave[0] 56slave=system.membus.master[0] 57 58[system.cf0] 59type=IdeDisk 60children=image 61delay=1000000 62driveID=master 63eventq_index=0 64image=system.cf0.image 65 66[system.cf0.image] 67type=CowDiskImage 68children=child 69child=system.cf0.image.child 70eventq_index=0 71image_file= 72read_only=false 73table_size=65536 74 75[system.cf0.image.child] 76type=RawDiskImage 77eventq_index=0 78image_file=/dist/disks/linux-arm-ael.img 79read_only=true 80 81[system.clk_domain] 82type=SrcClockDomain 83clock=1000 84eventq_index=0 85voltage_domain=system.voltage_domain 86 87[system.cpu0] 88type=DerivO3CPU 89children=branchPred dcache dtb fuPool icache interrupts isa itb tracer 90LFSTSize=1024 91LQEntries=32 92LSQCheckLoads=true 93LSQDepCheckShift=4 94SQEntries=32 95SSITSize=1024 96activity=0 97backComSize=5 98branchPred=system.cpu0.branchPred 99cachePorts=200 100checker=Null 101clk_domain=system.cpu_clk_domain 102commitToDecodeDelay=1 103commitToFetchDelay=1 104commitToIEWDelay=1 105commitToRenameDelay=1 106commitWidth=8 107cpu_id=0 108decodeToFetchDelay=1 109decodeToRenameDelay=1 110decodeWidth=8 111dispatchWidth=8 112do_checkpoint_insts=true 113do_quiesce=true 114do_statistics_insts=true 115dtb=system.cpu0.dtb 116eventq_index=0 117fetchBufferSize=64 118fetchToDecodeDelay=1 119fetchTrapLatency=1 120fetchWidth=8 121forwardComSize=5 122fuPool=system.cpu0.fuPool 123function_trace=false 124function_trace_start=0 125iewToCommitDelay=1 126iewToDecodeDelay=1 127iewToFetchDelay=1 128iewToRenameDelay=1 129interrupts=system.cpu0.interrupts 130isa=system.cpu0.isa 131issueToExecuteDelay=1 132issueWidth=8 133itb=system.cpu0.itb 134max_insts_all_threads=0 135max_insts_any_thread=0 136max_loads_all_threads=0 137max_loads_any_thread=0 138needsTSO=false 139numIQEntries=64 140numPhysCCRegs=0 141numPhysFloatRegs=256 142numPhysIntRegs=256 143numROBEntries=192 144numRobs=1 145numThreads=1 146profile=0 147progress_interval=0 148renameToDecodeDelay=1 149renameToFetchDelay=1 150renameToIEWDelay=2 151renameToROBDelay=1 152renameWidth=8 153simpoint_start_insts= 154smtCommitPolicy=RoundRobin 155smtFetchPolicy=SingleThread 156smtIQPolicy=Partitioned 157smtIQThreshold=100 158smtLSQPolicy=Partitioned 159smtLSQThreshold=100 160smtNumFetchingThreads=1 161smtROBPolicy=Partitioned 162smtROBThreshold=100 163squashWidth=8 164store_set_clear_period=250000 165switched_out=false 166system=system 167tracer=system.cpu0.tracer 168trapLatency=13 169wbDepth=1 170wbWidth=8 171workload= 172dcache_port=system.cpu0.dcache.cpu_side 173icache_port=system.cpu0.icache.cpu_side 174 175[system.cpu0.branchPred] 176type=BranchPredictor 177BTBEntries=4096 178BTBTagSize=16 179RASSize=16 180choiceCtrBits=2 181choicePredictorSize=8192 182eventq_index=0 183globalCtrBits=2 184globalPredictorSize=8192 185instShiftAmt=2 186localCtrBits=2 187localHistoryTableSize=2048 188localPredictorSize=2048 189numThreads=1 190predType=tournament 191 192[system.cpu0.dcache] 193type=BaseCache 194children=tags 195addr_ranges=0:18446744073709551615 196assoc=4 197clk_domain=system.cpu_clk_domain 198eventq_index=0 199forward_snoops=true 200hit_latency=2 201is_top_level=true 202max_miss_count=0 203mshrs=4 204prefetch_on_access=false 205prefetcher=Null 206response_latency=2 207sequential_access=false 208size=32768 209system=system 210tags=system.cpu0.dcache.tags 211tgts_per_mshr=20 212two_queue=false 213write_buffers=8 214cpu_side=system.cpu0.dcache_port 215mem_side=system.toL2Bus.slave[1] 216 217[system.cpu0.dcache.tags] 218type=LRU 219assoc=4 220block_size=64 221clk_domain=system.cpu_clk_domain 222eventq_index=0 223hit_latency=2 224sequential_access=false 225size=32768 226 227[system.cpu0.dtb] 228type=ArmTLB 229children=walker 230eventq_index=0 231size=64 232walker=system.cpu0.dtb.walker 233 234[system.cpu0.dtb.walker] 235type=ArmTableWalker 236clk_domain=system.cpu_clk_domain 237eventq_index=0 238num_squash_per_cycle=2 239sys=system 240port=system.toL2Bus.slave[3] 241 242[system.cpu0.fuPool] 243type=FUPool 244children=FUList0 FUList1 FUList2 FUList3 FUList4 FUList5 FUList6 FUList7 FUList8 245FUList=system.cpu0.fuPool.FUList0 system.cpu0.fuPool.FUList1 system.cpu0.fuPool.FUList2 system.cpu0.fuPool.FUList3 system.cpu0.fuPool.FUList4 system.cpu0.fuPool.FUList5 system.cpu0.fuPool.FUList6 system.cpu0.fuPool.FUList7 system.cpu0.fuPool.FUList8 246eventq_index=0 247 248[system.cpu0.fuPool.FUList0] 249type=FUDesc 250children=opList 251count=6 252eventq_index=0 253opList=system.cpu0.fuPool.FUList0.opList 254 255[system.cpu0.fuPool.FUList0.opList] 256type=OpDesc 257eventq_index=0 258issueLat=1 259opClass=IntAlu 260opLat=1 261 262[system.cpu0.fuPool.FUList1] 263type=FUDesc 264children=opList0 opList1 265count=2 266eventq_index=0 267opList=system.cpu0.fuPool.FUList1.opList0 system.cpu0.fuPool.FUList1.opList1 268 269[system.cpu0.fuPool.FUList1.opList0] 270type=OpDesc 271eventq_index=0 272issueLat=1 273opClass=IntMult 274opLat=3 275 276[system.cpu0.fuPool.FUList1.opList1] 277type=OpDesc 278eventq_index=0 279issueLat=19 280opClass=IntDiv 281opLat=20 282 283[system.cpu0.fuPool.FUList2] 284type=FUDesc 285children=opList0 opList1 opList2 286count=4 287eventq_index=0 288opList=system.cpu0.fuPool.FUList2.opList0 system.cpu0.fuPool.FUList2.opList1 system.cpu0.fuPool.FUList2.opList2 289 290[system.cpu0.fuPool.FUList2.opList0] 291type=OpDesc 292eventq_index=0 293issueLat=1 294opClass=FloatAdd 295opLat=2 296 297[system.cpu0.fuPool.FUList2.opList1] 298type=OpDesc 299eventq_index=0 300issueLat=1 301opClass=FloatCmp 302opLat=2 303 304[system.cpu0.fuPool.FUList2.opList2] 305type=OpDesc 306eventq_index=0 307issueLat=1 308opClass=FloatCvt 309opLat=2 310 311[system.cpu0.fuPool.FUList3] 312type=FUDesc 313children=opList0 opList1 opList2 314count=2 315eventq_index=0 316opList=system.cpu0.fuPool.FUList3.opList0 system.cpu0.fuPool.FUList3.opList1 system.cpu0.fuPool.FUList3.opList2 317 318[system.cpu0.fuPool.FUList3.opList0] 319type=OpDesc 320eventq_index=0 321issueLat=1 322opClass=FloatMult 323opLat=4 324 325[system.cpu0.fuPool.FUList3.opList1] 326type=OpDesc 327eventq_index=0 328issueLat=12 329opClass=FloatDiv 330opLat=12 331 332[system.cpu0.fuPool.FUList3.opList2] 333type=OpDesc 334eventq_index=0 335issueLat=24 336opClass=FloatSqrt 337opLat=24 338 339[system.cpu0.fuPool.FUList4] 340type=FUDesc 341children=opList 342count=0 343eventq_index=0 344opList=system.cpu0.fuPool.FUList4.opList 345 346[system.cpu0.fuPool.FUList4.opList] 347type=OpDesc 348eventq_index=0 349issueLat=1 350opClass=MemRead 351opLat=1 352 353[system.cpu0.fuPool.FUList5] 354type=FUDesc 355children=opList00 opList01 opList02 opList03 opList04 opList05 opList06 opList07 opList08 opList09 opList10 opList11 opList12 opList13 opList14 opList15 opList16 opList17 opList18 opList19 356count=4 357eventq_index=0 358opList=system.cpu0.fuPool.FUList5.opList00 system.cpu0.fuPool.FUList5.opList01 system.cpu0.fuPool.FUList5.opList02 system.cpu0.fuPool.FUList5.opList03 system.cpu0.fuPool.FUList5.opList04 system.cpu0.fuPool.FUList5.opList05 system.cpu0.fuPool.FUList5.opList06 system.cpu0.fuPool.FUList5.opList07 system.cpu0.fuPool.FUList5.opList08 system.cpu0.fuPool.FUList5.opList09 system.cpu0.fuPool.FUList5.opList10 system.cpu0.fuPool.FUList5.opList11 system.cpu0.fuPool.FUList5.opList12 system.cpu0.fuPool.FUList5.opList13 system.cpu0.fuPool.FUList5.opList14 system.cpu0.fuPool.FUList5.opList15 system.cpu0.fuPool.FUList5.opList16 system.cpu0.fuPool.FUList5.opList17 system.cpu0.fuPool.FUList5.opList18 system.cpu0.fuPool.FUList5.opList19 359 360[system.cpu0.fuPool.FUList5.opList00] 361type=OpDesc 362eventq_index=0 363issueLat=1 364opClass=SimdAdd 365opLat=1 366 367[system.cpu0.fuPool.FUList5.opList01] 368type=OpDesc 369eventq_index=0 370issueLat=1 371opClass=SimdAddAcc 372opLat=1 373 374[system.cpu0.fuPool.FUList5.opList02] 375type=OpDesc 376eventq_index=0 377issueLat=1 378opClass=SimdAlu 379opLat=1 380 381[system.cpu0.fuPool.FUList5.opList03] 382type=OpDesc 383eventq_index=0 384issueLat=1 385opClass=SimdCmp 386opLat=1 387 388[system.cpu0.fuPool.FUList5.opList04] 389type=OpDesc 390eventq_index=0 391issueLat=1 392opClass=SimdCvt 393opLat=1 394 395[system.cpu0.fuPool.FUList5.opList05] 396type=OpDesc 397eventq_index=0 398issueLat=1 399opClass=SimdMisc 400opLat=1 401 402[system.cpu0.fuPool.FUList5.opList06] 403type=OpDesc 404eventq_index=0 405issueLat=1 406opClass=SimdMult 407opLat=1 408 409[system.cpu0.fuPool.FUList5.opList07] 410type=OpDesc 411eventq_index=0 412issueLat=1 413opClass=SimdMultAcc 414opLat=1 415 416[system.cpu0.fuPool.FUList5.opList08] 417type=OpDesc 418eventq_index=0 419issueLat=1 420opClass=SimdShift 421opLat=1 422 423[system.cpu0.fuPool.FUList5.opList09] 424type=OpDesc 425eventq_index=0 426issueLat=1 427opClass=SimdShiftAcc 428opLat=1 429 430[system.cpu0.fuPool.FUList5.opList10] 431type=OpDesc 432eventq_index=0 433issueLat=1 434opClass=SimdSqrt 435opLat=1 436 437[system.cpu0.fuPool.FUList5.opList11] 438type=OpDesc 439eventq_index=0 440issueLat=1 441opClass=SimdFloatAdd 442opLat=1 443 444[system.cpu0.fuPool.FUList5.opList12] 445type=OpDesc 446eventq_index=0 447issueLat=1 448opClass=SimdFloatAlu 449opLat=1 450 451[system.cpu0.fuPool.FUList5.opList13] 452type=OpDesc 453eventq_index=0 454issueLat=1 455opClass=SimdFloatCmp 456opLat=1 457 458[system.cpu0.fuPool.FUList5.opList14] 459type=OpDesc 460eventq_index=0 461issueLat=1 462opClass=SimdFloatCvt 463opLat=1 464 465[system.cpu0.fuPool.FUList5.opList15] 466type=OpDesc 467eventq_index=0 468issueLat=1 469opClass=SimdFloatDiv 470opLat=1 471 472[system.cpu0.fuPool.FUList5.opList16] 473type=OpDesc 474eventq_index=0 475issueLat=1 476opClass=SimdFloatMisc 477opLat=1 478 479[system.cpu0.fuPool.FUList5.opList17] 480type=OpDesc 481eventq_index=0 482issueLat=1 483opClass=SimdFloatMult 484opLat=1 485 486[system.cpu0.fuPool.FUList5.opList18] 487type=OpDesc 488eventq_index=0 489issueLat=1 490opClass=SimdFloatMultAcc 491opLat=1 492 493[system.cpu0.fuPool.FUList5.opList19] 494type=OpDesc 495eventq_index=0 496issueLat=1 497opClass=SimdFloatSqrt 498opLat=1 499 500[system.cpu0.fuPool.FUList6] 501type=FUDesc 502children=opList 503count=0 504eventq_index=0 505opList=system.cpu0.fuPool.FUList6.opList 506 507[system.cpu0.fuPool.FUList6.opList] 508type=OpDesc 509eventq_index=0 510issueLat=1 511opClass=MemWrite 512opLat=1 513 514[system.cpu0.fuPool.FUList7] 515type=FUDesc 516children=opList0 opList1 517count=4 518eventq_index=0 519opList=system.cpu0.fuPool.FUList7.opList0 system.cpu0.fuPool.FUList7.opList1 520 521[system.cpu0.fuPool.FUList7.opList0] 522type=OpDesc 523eventq_index=0 524issueLat=1 525opClass=MemRead 526opLat=1 527 528[system.cpu0.fuPool.FUList7.opList1] 529type=OpDesc 530eventq_index=0 531issueLat=1 532opClass=MemWrite 533opLat=1 534 535[system.cpu0.fuPool.FUList8] 536type=FUDesc 537children=opList 538count=1 539eventq_index=0 540opList=system.cpu0.fuPool.FUList8.opList 541 542[system.cpu0.fuPool.FUList8.opList] 543type=OpDesc 544eventq_index=0 545issueLat=3 546opClass=IprAccess 547opLat=3 548 549[system.cpu0.icache] 550type=BaseCache 551children=tags 552addr_ranges=0:18446744073709551615 553assoc=1 554clk_domain=system.cpu_clk_domain 555eventq_index=0 556forward_snoops=true 557hit_latency=2 558is_top_level=true 559max_miss_count=0 560mshrs=4 561prefetch_on_access=false 562prefetcher=Null 563response_latency=2 564sequential_access=false 565size=32768 566system=system 567tags=system.cpu0.icache.tags 568tgts_per_mshr=20 569two_queue=false 570write_buffers=8 571cpu_side=system.cpu0.icache_port 572mem_side=system.toL2Bus.slave[0] 573 574[system.cpu0.icache.tags] 575type=LRU 576assoc=1 577block_size=64 578clk_domain=system.cpu_clk_domain 579eventq_index=0 580hit_latency=2 581sequential_access=false 582size=32768 583 584[system.cpu0.interrupts] 585type=ArmInterrupts 586eventq_index=0 587 588[system.cpu0.isa] 589type=ArmISA 590eventq_index=0 591fpsid=1090793632 592id_isar0=34607377 593id_isar1=34677009 594id_isar2=555950401 595id_isar3=17899825 596id_isar4=268501314 597id_isar5=0 598id_mmfr0=3 599id_mmfr1=0 600id_mmfr2=19070976 601id_mmfr3=4027589137 602id_pfr0=49 603id_pfr1=1 604midr=890224640 605 606[system.cpu0.itb] 607type=ArmTLB 608children=walker 609eventq_index=0 610size=64 611walker=system.cpu0.itb.walker 612 613[system.cpu0.itb.walker] 614type=ArmTableWalker 615clk_domain=system.cpu_clk_domain 616eventq_index=0 617num_squash_per_cycle=2 618sys=system 619port=system.toL2Bus.slave[2] 620 621[system.cpu0.tracer] 622type=ExeTracer 623eventq_index=0 624 625[system.cpu1] 626type=DerivO3CPU 627children=branchPred dcache dtb fuPool icache interrupts isa itb tracer 628LFSTSize=1024 629LQEntries=32 630LSQCheckLoads=true 631LSQDepCheckShift=4 632SQEntries=32 633SSITSize=1024 634activity=0 635backComSize=5 636branchPred=system.cpu1.branchPred 637cachePorts=200 638checker=Null 639clk_domain=system.cpu_clk_domain 640commitToDecodeDelay=1 641commitToFetchDelay=1 642commitToIEWDelay=1 643commitToRenameDelay=1 644commitWidth=8 645cpu_id=1 646decodeToFetchDelay=1 647decodeToRenameDelay=1 648decodeWidth=8 649dispatchWidth=8 650do_checkpoint_insts=true 651do_quiesce=true 652do_statistics_insts=true 653dtb=system.cpu1.dtb 654eventq_index=0 655fetchBufferSize=64 656fetchToDecodeDelay=1 657fetchTrapLatency=1 658fetchWidth=8 659forwardComSize=5 660fuPool=system.cpu1.fuPool 661function_trace=false 662function_trace_start=0 663iewToCommitDelay=1 664iewToDecodeDelay=1 665iewToFetchDelay=1 666iewToRenameDelay=1 667interrupts=system.cpu1.interrupts 668isa=system.cpu1.isa 669issueToExecuteDelay=1 670issueWidth=8 671itb=system.cpu1.itb 672max_insts_all_threads=0 673max_insts_any_thread=0 674max_loads_all_threads=0 675max_loads_any_thread=0 676needsTSO=false 677numIQEntries=64 678numPhysCCRegs=0 679numPhysFloatRegs=256 680numPhysIntRegs=256 681numROBEntries=192 682numRobs=1 683numThreads=1 684profile=0 685progress_interval=0 686renameToDecodeDelay=1 687renameToFetchDelay=1 688renameToIEWDelay=2 689renameToROBDelay=1 690renameWidth=8 691simpoint_start_insts= 692smtCommitPolicy=RoundRobin 693smtFetchPolicy=SingleThread 694smtIQPolicy=Partitioned 695smtIQThreshold=100 696smtLSQPolicy=Partitioned 697smtLSQThreshold=100 698smtNumFetchingThreads=1 699smtROBPolicy=Partitioned 700smtROBThreshold=100 701squashWidth=8 702store_set_clear_period=250000 703switched_out=false 704system=system 705tracer=system.cpu1.tracer 706trapLatency=13 707wbDepth=1 708wbWidth=8 709workload= 710dcache_port=system.cpu1.dcache.cpu_side 711icache_port=system.cpu1.icache.cpu_side 712 713[system.cpu1.branchPred] 714type=BranchPredictor 715BTBEntries=4096 716BTBTagSize=16 717RASSize=16 718choiceCtrBits=2 719choicePredictorSize=8192 720eventq_index=0 721globalCtrBits=2 722globalPredictorSize=8192 723instShiftAmt=2 724localCtrBits=2 725localHistoryTableSize=2048 726localPredictorSize=2048 727numThreads=1 728predType=tournament 729 730[system.cpu1.dcache] 731type=BaseCache 732children=tags 733addr_ranges=0:18446744073709551615 734assoc=4 735clk_domain=system.cpu_clk_domain 736eventq_index=0 737forward_snoops=true 738hit_latency=2 739is_top_level=true 740max_miss_count=0 741mshrs=4 742prefetch_on_access=false 743prefetcher=Null 744response_latency=2 745sequential_access=false 746size=32768 747system=system 748tags=system.cpu1.dcache.tags 749tgts_per_mshr=20 750two_queue=false 751write_buffers=8 752cpu_side=system.cpu1.dcache_port 753mem_side=system.toL2Bus.slave[5] 754 755[system.cpu1.dcache.tags] 756type=LRU 757assoc=4 758block_size=64 759clk_domain=system.cpu_clk_domain 760eventq_index=0 761hit_latency=2 762sequential_access=false 763size=32768 764 765[system.cpu1.dtb] 766type=ArmTLB 767children=walker 768eventq_index=0 769size=64 770walker=system.cpu1.dtb.walker 771 772[system.cpu1.dtb.walker] 773type=ArmTableWalker 774clk_domain=system.cpu_clk_domain 775eventq_index=0 776num_squash_per_cycle=2 777sys=system 778port=system.toL2Bus.slave[7] 779 780[system.cpu1.fuPool] 781type=FUPool 782children=FUList0 FUList1 FUList2 FUList3 FUList4 FUList5 FUList6 FUList7 FUList8 783FUList=system.cpu1.fuPool.FUList0 system.cpu1.fuPool.FUList1 system.cpu1.fuPool.FUList2 system.cpu1.fuPool.FUList3 system.cpu1.fuPool.FUList4 system.cpu1.fuPool.FUList5 system.cpu1.fuPool.FUList6 system.cpu1.fuPool.FUList7 system.cpu1.fuPool.FUList8 784eventq_index=0 785 786[system.cpu1.fuPool.FUList0] 787type=FUDesc 788children=opList 789count=6 790eventq_index=0 791opList=system.cpu1.fuPool.FUList0.opList 792 793[system.cpu1.fuPool.FUList0.opList] 794type=OpDesc 795eventq_index=0 796issueLat=1 797opClass=IntAlu 798opLat=1 799 800[system.cpu1.fuPool.FUList1] 801type=FUDesc 802children=opList0 opList1 803count=2 804eventq_index=0 805opList=system.cpu1.fuPool.FUList1.opList0 system.cpu1.fuPool.FUList1.opList1 806 807[system.cpu1.fuPool.FUList1.opList0] 808type=OpDesc 809eventq_index=0 810issueLat=1 811opClass=IntMult 812opLat=3 813 814[system.cpu1.fuPool.FUList1.opList1] 815type=OpDesc 816eventq_index=0 817issueLat=19 818opClass=IntDiv 819opLat=20 820 821[system.cpu1.fuPool.FUList2] 822type=FUDesc 823children=opList0 opList1 opList2 824count=4 825eventq_index=0 826opList=system.cpu1.fuPool.FUList2.opList0 system.cpu1.fuPool.FUList2.opList1 system.cpu1.fuPool.FUList2.opList2 827 828[system.cpu1.fuPool.FUList2.opList0] 829type=OpDesc 830eventq_index=0 831issueLat=1 832opClass=FloatAdd 833opLat=2 834 835[system.cpu1.fuPool.FUList2.opList1] 836type=OpDesc 837eventq_index=0 838issueLat=1 839opClass=FloatCmp 840opLat=2 841 842[system.cpu1.fuPool.FUList2.opList2] 843type=OpDesc 844eventq_index=0 845issueLat=1 846opClass=FloatCvt 847opLat=2 848 849[system.cpu1.fuPool.FUList3] 850type=FUDesc 851children=opList0 opList1 opList2 852count=2 853eventq_index=0 854opList=system.cpu1.fuPool.FUList3.opList0 system.cpu1.fuPool.FUList3.opList1 system.cpu1.fuPool.FUList3.opList2 855 856[system.cpu1.fuPool.FUList3.opList0] 857type=OpDesc 858eventq_index=0 859issueLat=1 860opClass=FloatMult 861opLat=4 862 863[system.cpu1.fuPool.FUList3.opList1] 864type=OpDesc 865eventq_index=0 866issueLat=12 867opClass=FloatDiv 868opLat=12 869 870[system.cpu1.fuPool.FUList3.opList2] 871type=OpDesc 872eventq_index=0 873issueLat=24 874opClass=FloatSqrt 875opLat=24 876 877[system.cpu1.fuPool.FUList4] 878type=FUDesc 879children=opList 880count=0 881eventq_index=0 882opList=system.cpu1.fuPool.FUList4.opList 883 884[system.cpu1.fuPool.FUList4.opList] 885type=OpDesc 886eventq_index=0 887issueLat=1 888opClass=MemRead 889opLat=1 890 891[system.cpu1.fuPool.FUList5] 892type=FUDesc 893children=opList00 opList01 opList02 opList03 opList04 opList05 opList06 opList07 opList08 opList09 opList10 opList11 opList12 opList13 opList14 opList15 opList16 opList17 opList18 opList19 894count=4 895eventq_index=0 896opList=system.cpu1.fuPool.FUList5.opList00 system.cpu1.fuPool.FUList5.opList01 system.cpu1.fuPool.FUList5.opList02 system.cpu1.fuPool.FUList5.opList03 system.cpu1.fuPool.FUList5.opList04 system.cpu1.fuPool.FUList5.opList05 system.cpu1.fuPool.FUList5.opList06 system.cpu1.fuPool.FUList5.opList07 system.cpu1.fuPool.FUList5.opList08 system.cpu1.fuPool.FUList5.opList09 system.cpu1.fuPool.FUList5.opList10 system.cpu1.fuPool.FUList5.opList11 system.cpu1.fuPool.FUList5.opList12 system.cpu1.fuPool.FUList5.opList13 system.cpu1.fuPool.FUList5.opList14 system.cpu1.fuPool.FUList5.opList15 system.cpu1.fuPool.FUList5.opList16 system.cpu1.fuPool.FUList5.opList17 system.cpu1.fuPool.FUList5.opList18 system.cpu1.fuPool.FUList5.opList19 897 898[system.cpu1.fuPool.FUList5.opList00] 899type=OpDesc 900eventq_index=0 901issueLat=1 902opClass=SimdAdd 903opLat=1 904 905[system.cpu1.fuPool.FUList5.opList01] 906type=OpDesc 907eventq_index=0 908issueLat=1 909opClass=SimdAddAcc 910opLat=1 911 912[system.cpu1.fuPool.FUList5.opList02] 913type=OpDesc 914eventq_index=0 915issueLat=1 916opClass=SimdAlu 917opLat=1 918 919[system.cpu1.fuPool.FUList5.opList03] 920type=OpDesc 921eventq_index=0 922issueLat=1 923opClass=SimdCmp 924opLat=1 925 926[system.cpu1.fuPool.FUList5.opList04] 927type=OpDesc 928eventq_index=0 929issueLat=1 930opClass=SimdCvt 931opLat=1 932 933[system.cpu1.fuPool.FUList5.opList05] 934type=OpDesc 935eventq_index=0 936issueLat=1 937opClass=SimdMisc 938opLat=1 939 940[system.cpu1.fuPool.FUList5.opList06] 941type=OpDesc 942eventq_index=0 943issueLat=1 944opClass=SimdMult 945opLat=1 946 947[system.cpu1.fuPool.FUList5.opList07] 948type=OpDesc 949eventq_index=0 950issueLat=1 951opClass=SimdMultAcc 952opLat=1 953 954[system.cpu1.fuPool.FUList5.opList08] 955type=OpDesc 956eventq_index=0 957issueLat=1 958opClass=SimdShift 959opLat=1 960 961[system.cpu1.fuPool.FUList5.opList09] 962type=OpDesc 963eventq_index=0 964issueLat=1 965opClass=SimdShiftAcc 966opLat=1 967 968[system.cpu1.fuPool.FUList5.opList10] 969type=OpDesc 970eventq_index=0 971issueLat=1 972opClass=SimdSqrt 973opLat=1 974 975[system.cpu1.fuPool.FUList5.opList11] 976type=OpDesc 977eventq_index=0 978issueLat=1 979opClass=SimdFloatAdd 980opLat=1 981 982[system.cpu1.fuPool.FUList5.opList12] 983type=OpDesc 984eventq_index=0 985issueLat=1 986opClass=SimdFloatAlu 987opLat=1 988 989[system.cpu1.fuPool.FUList5.opList13] 990type=OpDesc 991eventq_index=0 992issueLat=1 993opClass=SimdFloatCmp 994opLat=1 995 996[system.cpu1.fuPool.FUList5.opList14] 997type=OpDesc 998eventq_index=0 999issueLat=1 1000opClass=SimdFloatCvt 1001opLat=1 1002 1003[system.cpu1.fuPool.FUList5.opList15] 1004type=OpDesc 1005eventq_index=0 1006issueLat=1 1007opClass=SimdFloatDiv 1008opLat=1 1009 1010[system.cpu1.fuPool.FUList5.opList16] 1011type=OpDesc 1012eventq_index=0 1013issueLat=1 1014opClass=SimdFloatMisc 1015opLat=1 1016 1017[system.cpu1.fuPool.FUList5.opList17] 1018type=OpDesc 1019eventq_index=0 1020issueLat=1 1021opClass=SimdFloatMult 1022opLat=1 1023 1024[system.cpu1.fuPool.FUList5.opList18] 1025type=OpDesc 1026eventq_index=0 1027issueLat=1 1028opClass=SimdFloatMultAcc 1029opLat=1 1030 1031[system.cpu1.fuPool.FUList5.opList19] 1032type=OpDesc 1033eventq_index=0 1034issueLat=1 1035opClass=SimdFloatSqrt 1036opLat=1 1037 1038[system.cpu1.fuPool.FUList6] 1039type=FUDesc 1040children=opList 1041count=0 1042eventq_index=0 1043opList=system.cpu1.fuPool.FUList6.opList 1044 1045[system.cpu1.fuPool.FUList6.opList] 1046type=OpDesc 1047eventq_index=0 1048issueLat=1 1049opClass=MemWrite 1050opLat=1 1051 1052[system.cpu1.fuPool.FUList7] 1053type=FUDesc 1054children=opList0 opList1 1055count=4 1056eventq_index=0 1057opList=system.cpu1.fuPool.FUList7.opList0 system.cpu1.fuPool.FUList7.opList1 1058 1059[system.cpu1.fuPool.FUList7.opList0] 1060type=OpDesc 1061eventq_index=0 1062issueLat=1 1063opClass=MemRead 1064opLat=1 1065 1066[system.cpu1.fuPool.FUList7.opList1] 1067type=OpDesc 1068eventq_index=0 1069issueLat=1 1070opClass=MemWrite 1071opLat=1 1072 1073[system.cpu1.fuPool.FUList8] 1074type=FUDesc 1075children=opList 1076count=1 1077eventq_index=0 1078opList=system.cpu1.fuPool.FUList8.opList 1079 1080[system.cpu1.fuPool.FUList8.opList] 1081type=OpDesc 1082eventq_index=0 1083issueLat=3 1084opClass=IprAccess 1085opLat=3 1086 1087[system.cpu1.icache] 1088type=BaseCache 1089children=tags 1090addr_ranges=0:18446744073709551615 1091assoc=1 1092clk_domain=system.cpu_clk_domain 1093eventq_index=0 1094forward_snoops=true 1095hit_latency=2 1096is_top_level=true 1097max_miss_count=0 1098mshrs=4 1099prefetch_on_access=false 1100prefetcher=Null 1101response_latency=2 1102sequential_access=false 1103size=32768 1104system=system 1105tags=system.cpu1.icache.tags 1106tgts_per_mshr=20 1107two_queue=false 1108write_buffers=8 1109cpu_side=system.cpu1.icache_port 1110mem_side=system.toL2Bus.slave[4] 1111 1112[system.cpu1.icache.tags] 1113type=LRU 1114assoc=1 1115block_size=64 1116clk_domain=system.cpu_clk_domain 1117eventq_index=0 1118hit_latency=2 1119sequential_access=false 1120size=32768 1121 1122[system.cpu1.interrupts] 1123type=ArmInterrupts 1124eventq_index=0 1125 1126[system.cpu1.isa] 1127type=ArmISA 1128eventq_index=0 1129fpsid=1090793632 1130id_isar0=34607377 1131id_isar1=34677009 1132id_isar2=555950401 1133id_isar3=17899825 1134id_isar4=268501314 1135id_isar5=0 1136id_mmfr0=3 1137id_mmfr1=0 1138id_mmfr2=19070976 1139id_mmfr3=4027589137 1140id_pfr0=49 1141id_pfr1=1 1142midr=890224640 1143 1144[system.cpu1.itb] 1145type=ArmTLB 1146children=walker 1147eventq_index=0 1148size=64 1149walker=system.cpu1.itb.walker 1150 1151[system.cpu1.itb.walker] 1152type=ArmTableWalker 1153clk_domain=system.cpu_clk_domain 1154eventq_index=0 1155num_squash_per_cycle=2 1156sys=system 1157port=system.toL2Bus.slave[6] 1158 1159[system.cpu1.tracer] 1160type=ExeTracer 1161eventq_index=0 1162 1163[system.cpu_clk_domain] 1164type=SrcClockDomain 1165clock=500 1166eventq_index=0 1167voltage_domain=system.voltage_domain 1168 1169[system.intrctrl] 1170type=IntrControl 1171eventq_index=0 1172sys=system 1173 1174[system.iobus] 1175type=NoncoherentBus 1176clk_domain=system.clk_domain 1177eventq_index=0 1178header_cycles=1 1179use_default_range=false 1180width=8 1181master=system.realview.uart.pio system.realview.realview_io.pio system.realview.timer0.pio system.realview.timer1.pio system.realview.clcd.pio system.realview.kmi0.pio system.realview.kmi1.pio system.realview.cf_ctrl.pio system.realview.cf_ctrl.config system.realview.dmac_fake.pio system.realview.uart1_fake.pio system.realview.uart2_fake.pio system.realview.uart3_fake.pio system.realview.smc_fake.pio system.realview.sp810_fake.pio system.realview.watchdog_fake.pio system.realview.gpio0_fake.pio system.realview.gpio1_fake.pio system.realview.gpio2_fake.pio system.realview.ssp_fake.pio system.realview.sci_fake.pio system.realview.aaci_fake.pio system.realview.mmc_fake.pio system.realview.rtc.pio system.realview.flash_fake.pio system.iocache.cpu_side 1182slave=system.bridge.master system.realview.clcd.dma system.realview.cf_ctrl.dma 1183 1184[system.iocache] 1185type=BaseCache 1186children=tags 1187addr_ranges=0:134217727 1188assoc=8 1189clk_domain=system.clk_domain 1190eventq_index=0 1191forward_snoops=false 1192hit_latency=50 1193is_top_level=true 1194max_miss_count=0 1195mshrs=20 1196prefetch_on_access=false 1197prefetcher=Null 1198response_latency=50 1199sequential_access=false 1200size=1024 1201system=system 1202tags=system.iocache.tags 1203tgts_per_mshr=12 1204two_queue=false 1205write_buffers=8 1206cpu_side=system.iobus.master[25] 1207mem_side=system.membus.slave[2] 1208 1209[system.iocache.tags] 1210type=LRU 1211assoc=8 1212block_size=64 1213clk_domain=system.clk_domain 1214eventq_index=0 1215hit_latency=50 1216sequential_access=false 1217size=1024 1218 1219[system.l2c] 1220type=BaseCache 1221children=tags 1222addr_ranges=0:18446744073709551615 1223assoc=8 1224clk_domain=system.cpu_clk_domain 1225eventq_index=0 1226forward_snoops=true 1227hit_latency=20 1228is_top_level=false 1229max_miss_count=0 1230mshrs=20 1231prefetch_on_access=false 1232prefetcher=Null 1233response_latency=20 1234sequential_access=false 1235size=4194304 1236system=system 1237tags=system.l2c.tags 1238tgts_per_mshr=12 1239two_queue=false 1240write_buffers=8 1241cpu_side=system.toL2Bus.master[0] 1242mem_side=system.membus.slave[1] 1243 1244[system.l2c.tags] 1245type=LRU 1246assoc=8 1247block_size=64 1248clk_domain=system.cpu_clk_domain 1249eventq_index=0 1250hit_latency=20 1251sequential_access=false 1252size=4194304 1253 1254[system.membus] 1255type=CoherentBus 1256children=badaddr_responder 1257clk_domain=system.clk_domain 1258eventq_index=0 1259header_cycles=1 1260system=system 1261use_default_range=false 1262width=8 1263default=system.membus.badaddr_responder.pio 1264master=system.bridge.slave system.realview.nvmem.port system.realview.gic.pio system.realview.l2x0_fake.pio system.realview.a9scu.pio system.realview.local_cpu_timer.pio system.physmem.port 1265slave=system.system_port system.l2c.mem_side system.iocache.mem_side 1266 1267[system.membus.badaddr_responder] 1268type=IsaFake 1269clk_domain=system.clk_domain 1270eventq_index=0 1271fake_mem=false 1272pio_addr=0 1273pio_latency=100000 1274pio_size=8 1275ret_bad_addr=true 1276ret_data16=65535 1277ret_data32=4294967295 1278ret_data64=18446744073709551615 1279ret_data8=255 1280system=system 1281update_data=false 1282warn_access=warn 1283pio=system.membus.default 1284 1285[system.physmem] 1286type=SimpleDRAM 1287activation_limit=4 1288addr_mapping=RaBaChCo 1289banks_per_rank=8 1290burst_length=8 1291channels=1 1292clk_domain=system.clk_domain 1293conf_table_reported=true 1294device_bus_width=8 1295device_rowbuffer_size=1024 1296devices_per_rank=8 1297eventq_index=0 1298in_addr_map=true 1299mem_sched_policy=frfcfs 1300null=false 1301page_policy=open 1302range=0:134217727 1303ranks_per_channel=2 1304read_buffer_size=32 1305static_backend_latency=10000 1306static_frontend_latency=10000 1307tBURST=5000 1308tCL=13750 1309tRAS=35000 1310tRCD=13750 1311tREFI=7800000 1312tRFC=300000 1313tRP=13750 1314tRRD=6250 1315tWTR=7500 1316tXAW=40000 1317write_buffer_size=32 1318write_high_thresh_perc=70 1319write_low_thresh_perc=0 1320port=system.membus.master[6] 1321 1322[system.realview] 1323type=RealView 1324children=a9scu aaci_fake cf_ctrl clcd dmac_fake flash_fake gic gpio0_fake gpio1_fake gpio2_fake kmi0 kmi1 l2x0_fake local_cpu_timer mmc_fake nvmem realview_io rtc sci_fake smc_fake sp810_fake ssp_fake timer0 timer1 uart uart1_fake uart2_fake uart3_fake watchdog_fake 1325eventq_index=0 1326intrctrl=system.intrctrl 1327max_mem_size=268435456 1328mem_start_addr=0 1329pci_cfg_base=0 1330system=system 1331 1332[system.realview.a9scu] 1333type=A9SCU 1334clk_domain=system.clk_domain 1335eventq_index=0 1336pio_addr=520093696 1337pio_latency=100000 1338system=system 1339pio=system.membus.master[4] 1340 1341[system.realview.aaci_fake] 1342type=AmbaFake 1343amba_id=0 1344clk_domain=system.clk_domain 1345eventq_index=0 1346ignore_access=false 1347pio_addr=268451840 1348pio_latency=100000 1349system=system 1350pio=system.iobus.master[21] 1351 1352[system.realview.cf_ctrl] 1353type=IdeController 1354BAR0=402653184 1355BAR0LegacyIO=true 1356BAR0Size=16 1357BAR1=402653440 1358BAR1LegacyIO=true 1359BAR1Size=1 1360BAR2=1 1361BAR2LegacyIO=false 1362BAR2Size=8 1363BAR3=1 1364BAR3LegacyIO=false 1365BAR3Size=4 1366BAR4=1 1367BAR4LegacyIO=false 1368BAR4Size=16 1369BAR5=1 1370BAR5LegacyIO=false 1371BAR5Size=0 1372BIST=0 1373CacheLineSize=0 1374CapabilityPtr=0 1375CardbusCIS=0 1376ClassCode=1 1377Command=1 1378DeviceID=28945 1379ExpansionROM=0 1380HeaderType=0 1381InterruptLine=31 1382InterruptPin=1 1383LatencyTimer=0 1384MSICAPBaseOffset=0 1385MSICAPCapId=0 1386MSICAPMaskBits=0 1387MSICAPMsgAddr=0 1388MSICAPMsgCtrl=0 1389MSICAPMsgData=0 1390MSICAPMsgUpperAddr=0 1391MSICAPNextCapability=0 1392MSICAPPendingBits=0 1393MSIXCAPBaseOffset=0 1394MSIXCAPCapId=0 1395MSIXCAPNextCapability=0 1396MSIXMsgCtrl=0 1397MSIXPbaOffset=0 1398MSIXTableOffset=0 1399MaximumLatency=0 1400MinimumGrant=0 1401PMCAPBaseOffset=0 1402PMCAPCapId=0 1403PMCAPCapabilities=0 1404PMCAPCtrlStatus=0 1405PMCAPNextCapability=0 1406PXCAPBaseOffset=0 1407PXCAPCapId=0 1408PXCAPCapabilities=0 1409PXCAPDevCap2=0 1410PXCAPDevCapabilities=0 1411PXCAPDevCtrl=0 1412PXCAPDevCtrl2=0 1413PXCAPDevStatus=0 1414PXCAPLinkCap=0 1415PXCAPLinkCtrl=0 1416PXCAPLinkStatus=0 1417PXCAPNextCapability=0 1418ProgIF=133 1419Revision=0 1420Status=640 1421SubClassCode=1 1422SubsystemID=0 1423SubsystemVendorID=0 1424VendorID=32902 1425clk_domain=system.clk_domain 1426config_latency=20000 1427ctrl_offset=2 1428disks=system.cf0 1429eventq_index=0 1430io_shift=1 1431pci_bus=2 1432pci_dev=7 1433pci_func=0 1434pio_latency=30000 1435platform=system.realview 1436system=system 1437config=system.iobus.master[8] 1438dma=system.iobus.slave[2] 1439pio=system.iobus.master[7] 1440 1441[system.realview.clcd] 1442type=Pl111 1443amba_id=1315089 1444clk_domain=system.clk_domain 1445enable_capture=true 1446eventq_index=0 1447gic=system.realview.gic 1448int_num=55 1449pio_addr=268566528 1450pio_latency=10000 1451pixel_clock=41667 1452system=system 1453vnc=system.vncserver 1454dma=system.iobus.slave[1] 1455pio=system.iobus.master[4] 1456 1457[system.realview.dmac_fake] 1458type=AmbaFake 1459amba_id=0 1460clk_domain=system.clk_domain 1461eventq_index=0 1462ignore_access=false 1463pio_addr=268632064 1464pio_latency=100000 1465system=system 1466pio=system.iobus.master[9] 1467 1468[system.realview.flash_fake] 1469type=IsaFake 1470clk_domain=system.clk_domain 1471eventq_index=0 1472fake_mem=true 1473pio_addr=1073741824 1474pio_latency=100000 1475pio_size=536870912 1476ret_bad_addr=false 1477ret_data16=65535 1478ret_data32=4294967295 1479ret_data64=18446744073709551615 1480ret_data8=255 1481system=system 1482update_data=false 1483warn_access= 1484pio=system.iobus.master[24] 1485 1486[system.realview.gic] 1487type=Pl390 1488clk_domain=system.clk_domain 1489cpu_addr=520093952 1490cpu_pio_delay=10000 1491dist_addr=520097792 1492dist_pio_delay=10000 1493eventq_index=0 1494int_latency=10000 1495it_lines=128 1496msix_addr=0 1497platform=system.realview 1498system=system 1499pio=system.membus.master[2] 1500 1501[system.realview.gpio0_fake] 1502type=AmbaFake 1503amba_id=0 1504clk_domain=system.clk_domain 1505eventq_index=0 1506ignore_access=false 1507pio_addr=268513280 1508pio_latency=100000 1509system=system 1510pio=system.iobus.master[16] 1511 1512[system.realview.gpio1_fake] 1513type=AmbaFake 1514amba_id=0 1515clk_domain=system.clk_domain 1516eventq_index=0 1517ignore_access=false 1518pio_addr=268517376 1519pio_latency=100000 1520system=system 1521pio=system.iobus.master[17] 1522 1523[system.realview.gpio2_fake] 1524type=AmbaFake 1525amba_id=0 1526clk_domain=system.clk_domain 1527eventq_index=0 1528ignore_access=false 1529pio_addr=268521472 1530pio_latency=100000 1531system=system 1532pio=system.iobus.master[18] 1533 1534[system.realview.kmi0] 1535type=Pl050 1536amba_id=1314896 1537clk_domain=system.clk_domain 1538eventq_index=0 1539gic=system.realview.gic 1540int_delay=1000000 1541int_num=52 1542is_mouse=false 1543pio_addr=268460032 1544pio_latency=100000 1545system=system 1546vnc=system.vncserver 1547pio=system.iobus.master[5] 1548 1549[system.realview.kmi1] 1550type=Pl050 1551amba_id=1314896 1552clk_domain=system.clk_domain 1553eventq_index=0 1554gic=system.realview.gic 1555int_delay=1000000 1556int_num=53 1557is_mouse=true 1558pio_addr=268464128 1559pio_latency=100000 1560system=system 1561vnc=system.vncserver 1562pio=system.iobus.master[6] 1563 1564[system.realview.l2x0_fake] 1565type=IsaFake 1566clk_domain=system.clk_domain 1567eventq_index=0 1568fake_mem=false 1569pio_addr=520101888 1570pio_latency=100000 1571pio_size=4095 1572ret_bad_addr=false 1573ret_data16=65535 1574ret_data32=4294967295 1575ret_data64=18446744073709551615 1576ret_data8=255 1577system=system 1578update_data=false 1579warn_access= 1580pio=system.membus.master[3] 1581 1582[system.realview.local_cpu_timer] 1583type=CpuLocalTimer 1584clk_domain=system.clk_domain 1585eventq_index=0 1586gic=system.realview.gic 1587int_num_timer=29 1588int_num_watchdog=30 1589pio_addr=520095232 1590pio_latency=100000 1591system=system 1592pio=system.membus.master[5] 1593 1594[system.realview.mmc_fake] 1595type=AmbaFake 1596amba_id=0 1597clk_domain=system.clk_domain 1598eventq_index=0 1599ignore_access=false 1600pio_addr=268455936 1601pio_latency=100000 1602system=system 1603pio=system.iobus.master[22] 1604 1605[system.realview.nvmem] 1606type=SimpleMemory 1607bandwidth=73.000000 1608clk_domain=system.clk_domain 1609conf_table_reported=false 1610eventq_index=0 1611in_addr_map=true 1612latency=30000 1613latency_var=0 1614null=false 1615range=2147483648:2214592511 1616port=system.membus.master[1] 1617 1618[system.realview.realview_io] 1619type=RealViewCtrl 1620clk_domain=system.clk_domain 1621eventq_index=0 1622idreg=0 1623pio_addr=268435456 1624pio_latency=100000 1625proc_id0=201326592 1626proc_id1=201327138 1627system=system 1628pio=system.iobus.master[1] 1629 1630[system.realview.rtc] 1631type=PL031 1632amba_id=3412017 1633clk_domain=system.clk_domain 1634eventq_index=0 1635gic=system.realview.gic 1636int_delay=100000 1637int_num=42 1638pio_addr=268529664 1639pio_latency=100000 1640system=system 1641time=Thu Jan 1 00:00:00 2009 1642pio=system.iobus.master[23] 1643 1644[system.realview.sci_fake] 1645type=AmbaFake 1646amba_id=0 1647clk_domain=system.clk_domain 1648eventq_index=0 1649ignore_access=false 1650pio_addr=268492800 1651pio_latency=100000 1652system=system 1653pio=system.iobus.master[20] 1654 1655[system.realview.smc_fake] 1656type=AmbaFake 1657amba_id=0 1658clk_domain=system.clk_domain 1659eventq_index=0 1660ignore_access=false 1661pio_addr=269357056 1662pio_latency=100000 1663system=system 1664pio=system.iobus.master[13] 1665 1666[system.realview.sp810_fake] 1667type=AmbaFake 1668amba_id=0 1669clk_domain=system.clk_domain 1670eventq_index=0 1671ignore_access=true 1672pio_addr=268439552 1673pio_latency=100000 1674system=system 1675pio=system.iobus.master[14] 1676 1677[system.realview.ssp_fake] 1678type=AmbaFake 1679amba_id=0 1680clk_domain=system.clk_domain 1681eventq_index=0 1682ignore_access=false 1683pio_addr=268488704 1684pio_latency=100000 1685system=system 1686pio=system.iobus.master[19] 1687 1688[system.realview.timer0] 1689type=Sp804 1690amba_id=1316868 1691clk_domain=system.clk_domain 1692clock0=1000000 1693clock1=1000000 1694eventq_index=0 1695gic=system.realview.gic 1696int_num0=36 1697int_num1=36 1698pio_addr=268505088 1699pio_latency=100000 1700system=system 1701pio=system.iobus.master[2] 1702 1703[system.realview.timer1] 1704type=Sp804 1705amba_id=1316868 1706clk_domain=system.clk_domain 1707clock0=1000000 1708clock1=1000000 1709eventq_index=0 1710gic=system.realview.gic 1711int_num0=37 1712int_num1=37 1713pio_addr=268509184 1714pio_latency=100000 1715system=system 1716pio=system.iobus.master[3] 1717 1718[system.realview.uart] 1719type=Pl011 1720clk_domain=system.clk_domain 1721end_on_eot=false 1722eventq_index=0 1723gic=system.realview.gic 1724int_delay=100000 1725int_num=44 1726pio_addr=268472320 1727pio_latency=100000 1728platform=system.realview 1729system=system 1730terminal=system.terminal 1731pio=system.iobus.master[0] 1732 1733[system.realview.uart1_fake] 1734type=AmbaFake 1735amba_id=0 1736clk_domain=system.clk_domain 1737eventq_index=0 1738ignore_access=false 1739pio_addr=268476416 1740pio_latency=100000 1741system=system 1742pio=system.iobus.master[10] 1743 1744[system.realview.uart2_fake] 1745type=AmbaFake 1746amba_id=0 1747clk_domain=system.clk_domain 1748eventq_index=0 1749ignore_access=false 1750pio_addr=268480512 1751pio_latency=100000 1752system=system 1753pio=system.iobus.master[11] 1754 1755[system.realview.uart3_fake] 1756type=AmbaFake 1757amba_id=0 1758clk_domain=system.clk_domain 1759eventq_index=0 1760ignore_access=false 1761pio_addr=268484608 1762pio_latency=100000 1763system=system 1764pio=system.iobus.master[12] 1765 1766[system.realview.watchdog_fake] 1767type=AmbaFake 1768amba_id=0 1769clk_domain=system.clk_domain 1770eventq_index=0 1771ignore_access=false 1772pio_addr=268500992 1773pio_latency=100000 1774system=system 1775pio=system.iobus.master[15] 1776 1777[system.terminal] 1778type=Terminal 1779eventq_index=0 1780intr_control=system.intrctrl 1781number=0 1782output=true 1783port=3456 1784 1785[system.toL2Bus] 1786type=CoherentBus 1787clk_domain=system.cpu_clk_domain 1788eventq_index=0 1789header_cycles=1 1790system=system 1791use_default_range=false 1792width=8 1793master=system.l2c.cpu_side 1794slave=system.cpu0.icache.mem_side system.cpu0.dcache.mem_side system.cpu0.itb.walker.port system.cpu0.dtb.walker.port system.cpu1.icache.mem_side system.cpu1.dcache.mem_side system.cpu1.itb.walker.port system.cpu1.dtb.walker.port 1795 1796[system.vncserver] 1797type=VncServer 1798eventq_index=0 1799frame_capture=false 1800number=0 1801port=5900 1802 1803[system.voltage_domain] 1804type=VoltageDomain 1805eventq_index=0 1806voltage=1.000000 1807 1808